^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2010-2012 Hauke Mehrtens <hauke@hauke-m.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * This program is free software; you can redistribute it and/or modify it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * under the terms of the GNU General Public License as published by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Free Software Foundation; either version 2 of the License, or (at your
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * option) any later version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * You should have received a copy of the GNU General Public License along
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * with this program; if not, write to the Free Software Foundation, Inc.,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * 675 Mass Ave, Cambridge, MA 02139, USA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/memblock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/spinlock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/ssb/ssb_driver_chipcommon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/ssb/ssb_regs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <asm/bootinfo.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <bcm47xx.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <bcm47xx_board.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static char bcm47xx_system_type[20] = "Broadcom BCM47XX";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) const char *get_system_type(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) return bcm47xx_system_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) __init void bcm47xx_set_system_type(u16 chip_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) snprintf(bcm47xx_system_type, sizeof(bcm47xx_system_type),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) (chip_id > 0x9999) ? "Broadcom BCM%d" :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) "Broadcom BCM%04X",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) chip_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) static unsigned long lowmem __initdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static __init void prom_init_mem(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) unsigned long mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) unsigned long max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) unsigned long off;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) struct cpuinfo_mips *c = ¤t_cpu_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /* Figure out memory size by finding aliases.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * We should theoretically use the mapping from CFE using cfe_enummem().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * However as the BCM47XX is mostly used on low-memory systems, we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * want to reuse the memory used by CFE (around 4MB). That means cfe_*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * functions stop to work at some point during the boot, we should only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * call them at the beginning of the boot.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * BCM47XX uses 128MB for addressing the ram, if the system contains
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * less that that amount of ram it remaps the ram more often into the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * available space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /* Physical address, without mapping to any kernel segment */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) off = CPHYSADDR((unsigned long)prom_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /* Accessing memory after 128 MiB will cause an exception */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) max = 128 << 20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) for (mem = 1 << 20; mem < max; mem += 1 << 20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* Loop condition may be not enough, off may be over 1 MiB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) if (off + mem >= max) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) mem = max;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) pr_debug("Assume 128MB RAM\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (!memcmp(prom_init, prom_init + mem, 32))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) lowmem = mem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /* Ignoring the last page when ddr size is 128M. Cached
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * accesses to last page is causing the processor to prefetch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * using address above 128M stepping out of the ddr address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) if (c->cputype == CPU_74K && (mem == (128 << 20)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) mem -= 0x1000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) memblock_add(0, mem);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * This is the first serial on the chip common core, it is at this position
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * for sb (ssb) and ai (bcma) bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define BCM47XX_SERIAL_ADDR (SSB_ENUM_BASE + SSB_CHIPCO_UART0_DATA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) void __init prom_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) prom_init_mem();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) setup_8250_early_printk_port(CKSEG1ADDR(BCM47XX_SERIAL_ADDR), 0, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) void __init prom_free_prom_memory(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #if defined(CONFIG_BCM47XX_BCMA) && defined(CONFIG_HIGHMEM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define EXTVBASE 0xc0000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define ENTRYLO(x) ((pte_val(pfn_pte((x) >> _PFN_SHIFT, PAGE_KERNEL_UNCACHED)) >> 6) | 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #include <asm/tlbflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) /* Stripped version of tlb_init, with the call to build_tlb_refill_handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) * dropped. Calling it at this stage causes a hang.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) void early_tlb_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) write_c0_pagemask(PM_DEFAULT_MASK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) write_c0_wired(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) temp_tlb_entry = current_cpu_data.tlbsize - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) local_flush_tlb_all();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) void __init bcm47xx_prom_highmem_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) unsigned long off = (unsigned long)prom_init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) unsigned long extmem = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) bool highmem_region = false;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) if (WARN_ON(bcm47xx_bus_type != BCM47XX_BUS_TYPE_BCMA))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) if (bcm47xx_bus.bcma.bus.chipinfo.id == BCMA_CHIP_ID_BCM4706)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) highmem_region = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (lowmem != 128 << 20 || !highmem_region)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) early_tlb_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) /* Add one temporary TLB entry to map SDRAM Region 2.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) * Physical Virtual
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) * 0x80000000 0xc0000000 (1st: 256MB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) * 0x90000000 0xd0000000 (2nd: 256MB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) add_temporary_entry(ENTRYLO(0x80000000),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) ENTRYLO(0x80000000 + (256 << 20)),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) EXTVBASE, PM_256M);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) off = EXTVBASE + __pa(off);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) for (extmem = 128 << 20; extmem < 512 << 20; extmem <<= 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) if (!memcmp(prom_init, (void *)(off + extmem), 16))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) extmem -= lowmem;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) early_tlb_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) if (!extmem)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) pr_warn("Found %lu MiB of extra memory, but highmem is unsupported yet!\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) extmem >> 20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) /* TODO: Register extra memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) #endif /* defined(CONFIG_BCM47XX_BCMA) && defined(CONFIG_HIGHMEM) */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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