Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2)  *  Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *  This program is free software; you can redistribute  it and/or modify it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *  under  the terms of  the GNU General  Public License as published by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *  Free Software Foundation;  either version 2 of the  License, or (at your
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *  option) any later version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)  *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)  *  You should have received a copy of the  GNU General Public License along
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)  *  with this program; if not, write  to the Free Software Foundation, Inc.,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)  *  675 Mass Ave, Cambridge, MA 02139, USA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include "bcm47xx_private.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <asm/irq_cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <bcm47xx.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) asmlinkage void plat_irq_dispatch(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	u32 cause;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	cause = read_c0_cause() & read_c0_status() & CAUSEF_IP;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	clear_c0_status(cause);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	if (cause & CAUSEF_IP7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 		do_IRQ(7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	if (cause & CAUSEF_IP2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 		do_IRQ(2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	if (cause & CAUSEF_IP3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 		do_IRQ(3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 	if (cause & CAUSEF_IP4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 		do_IRQ(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	if (cause & CAUSEF_IP5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 		do_IRQ(5);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	if (cause & CAUSEF_IP6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 		do_IRQ(6);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define DEFINE_HWx_IRQDISPATCH(x)					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	static void bcm47xx_hw ## x ## _irqdispatch(void)		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	{								\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 		do_IRQ(x);						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) DEFINE_HWx_IRQDISPATCH(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) DEFINE_HWx_IRQDISPATCH(3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) DEFINE_HWx_IRQDISPATCH(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) DEFINE_HWx_IRQDISPATCH(5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) DEFINE_HWx_IRQDISPATCH(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) DEFINE_HWx_IRQDISPATCH(7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) void __init arch_init_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 	 * This is the first arch callback after mm_init (we can use kmalloc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 	 * so let's finish bus initialization now.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 	bcm47xx_bus_setup();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #ifdef CONFIG_BCM47XX_BCMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 	if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 		bcma_write32(bcm47xx_bus.bcma.bus.drv_mips.core,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 			     BCMA_MIPS_MIPS74K_INTMASK(5), 1 << 31);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 		 * the kernel reads the timer irq from some register and thinks
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) 		 * it's #5, but we offset it by 2 and route to #7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) 		cp0_compare_irq = 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) 	mips_cpu_irq_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) 	if (cpu_has_vint) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) 		pr_info("Setting up vectored interrupts\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) 		set_vi_handler(2, bcm47xx_hw2_irqdispatch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) 		set_vi_handler(3, bcm47xx_hw3_irqdispatch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) 		set_vi_handler(4, bcm47xx_hw4_irqdispatch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) 		set_vi_handler(5, bcm47xx_hw5_irqdispatch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) 		set_vi_handler(6, bcm47xx_hw6_irqdispatch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) 		set_vi_handler(7, bcm47xx_hw7_irqdispatch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }