Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2)  * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * License.  See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/serial_reg.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include "devices.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include "ar2315_regs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include "ar5312_regs.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) static inline void prom_uart_wr(void __iomem *base, unsigned reg,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 				unsigned char ch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	__raw_writel(ch, base + 4 * reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) static inline unsigned char prom_uart_rr(void __iomem *base, unsigned reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	return __raw_readl(base + 4 * reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) void prom_putchar(char ch)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	static void __iomem *base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	if (unlikely(base == NULL)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 		if (is_ar2315())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 			base = (void __iomem *)(KSEG1ADDR(AR2315_UART0_BASE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 		else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 			base = (void __iomem *)(KSEG1ADDR(AR5312_UART0_BASE));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	while ((prom_uart_rr(base, UART_LSR) & UART_LSR_THRE) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 		;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	prom_uart_wr(base, UART_TX, (unsigned char)ch);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	while ((prom_uart_rr(base, UART_LSR) & UART_LSR_THRE) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 		;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }