Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #ifndef __ATH25_DEVICES_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #define __ATH25_DEVICES_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) #define ATH25_REG_MS(_val, _field)	(((_val) & _field##_M) >> _field##_S)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #define ATH25_IRQ_CPU_CLOCK	(MIPS_CPU_IRQ_BASE + 7)	/* C0_CAUSE: 0x8000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) enum ath25_soc_type {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 	/* handled by ar5312.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 	ATH25_SOC_AR2312,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 	ATH25_SOC_AR2313,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 	ATH25_SOC_AR5312,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 	/* handled by ar2315.c */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 	ATH25_SOC_AR2315,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 	ATH25_SOC_AR2316,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 	ATH25_SOC_AR2317,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) 	ATH25_SOC_AR2318,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) 	ATH25_SOC_UNKNOWN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) extern enum ath25_soc_type ath25_soc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) extern struct ar231x_board_config ath25_board;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) extern void (*ath25_irq_dispatch)(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) int ath25_find_config(phys_addr_t offset, unsigned long size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) void ath25_serial_setup(u32 mapbase, int irq, unsigned int uartclk);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) int ath25_add_wmac(int nr, u32 base, int irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static inline bool is_ar2315(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	return (current_cpu_data.cputype == CPU_4KEC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static inline bool is_ar5312(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	return !is_ar2315();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #endif