^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-or-later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2006,2007 Felix Fietkau <nbd@openwrt.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2006,2007 Eugene Konev <ejka@openwrt.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/mtd/physmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/serial.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/serial_8250.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/vlynq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/leds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/etherdevice.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/phy.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/phy_fixed.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/gpio.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/clk.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <asm/addrspace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <asm/mach-ar7/ar7.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <asm/mach-ar7/prom.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * VLYNQ Bus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) struct plat_vlynq_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct plat_vlynq_ops ops;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) int gpio_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) int reset_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) static int vlynq_on(struct vlynq_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) struct plat_vlynq_data *pdata = dev->dev.platform_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) ret = gpio_request(pdata->gpio_bit, "vlynq");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) ar7_device_reset(pdata->reset_bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) ret = ar7_gpio_disable(pdata->gpio_bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) goto out_enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) ret = ar7_gpio_enable(pdata->gpio_bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) goto out_enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) ret = gpio_direction_output(pdata->gpio_bit, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) if (ret)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) goto out_gpio_enabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) msleep(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) gpio_set_value(pdata->gpio_bit, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) msleep(50);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) out_gpio_enabled:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) ar7_gpio_disable(pdata->gpio_bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) out_enabled:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) ar7_device_disable(pdata->reset_bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) gpio_free(pdata->gpio_bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static void vlynq_off(struct vlynq_device *dev)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) struct plat_vlynq_data *pdata = dev->dev.platform_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) ar7_gpio_disable(pdata->gpio_bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) gpio_free(pdata->gpio_bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) ar7_device_disable(pdata->reset_bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static struct resource vlynq_low_res[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) .name = "regs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) .start = AR7_REGS_VLYNQ0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .end = AR7_REGS_VLYNQ0 + 0xff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) .name = "irq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) .start = 29,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) .end = 29,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) .name = "mem",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) .start = 0x04000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .end = 0x04ffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) .name = "devirq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) .start = 80,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .end = 111,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static struct resource vlynq_high_res[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) .name = "regs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .start = AR7_REGS_VLYNQ1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) .end = AR7_REGS_VLYNQ1 + 0xff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) .name = "irq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .start = 33,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) .end = 33,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) .name = "mem",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .start = 0x0c000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) .end = 0x0cffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) .name = "devirq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) .start = 112,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .end = 143,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) static struct plat_vlynq_data vlynq_low_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) .ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) .on = vlynq_on,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) .off = vlynq_off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) .reset_bit = 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) .gpio_bit = 18,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static struct plat_vlynq_data vlynq_high_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) .ops = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) .on = vlynq_on,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) .off = vlynq_off,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) .reset_bit = 16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) .gpio_bit = 19,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) static struct platform_device vlynq_low = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) .name = "vlynq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) .platform_data = &vlynq_low_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .resource = vlynq_low_res,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) .num_resources = ARRAY_SIZE(vlynq_low_res),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) static struct platform_device vlynq_high = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) .name = "vlynq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) .platform_data = &vlynq_high_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) .resource = vlynq_high_res,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) .num_resources = ARRAY_SIZE(vlynq_high_res),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) * Flash
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static struct resource physmap_flash_resource = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) .name = "mem",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) .start = 0x10000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) .end = 0x107fffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) static const char *ar7_probe_types[] = { "ar7part", NULL };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static struct physmap_flash_data physmap_flash_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) .width = 2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) .part_probe_types = ar7_probe_types,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static struct platform_device physmap_flash = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) .name = "physmap-flash",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) .platform_data = &physmap_flash_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) .resource = &physmap_flash_resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) .num_resources = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) * Ethernet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) static struct resource cpmac_low_res[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) .name = "regs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) .start = AR7_REGS_MAC0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) .end = AR7_REGS_MAC0 + 0x7ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) .name = "irq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) .start = 27,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) .end = 27,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) static struct resource cpmac_high_res[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) .name = "regs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) .start = AR7_REGS_MAC1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) .end = AR7_REGS_MAC1 + 0x7ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) .name = "irq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) .start = 41,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) .end = 41,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) static struct fixed_phy_status fixed_phy_status __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) .link = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) .speed = 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) .duplex = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) static struct plat_cpmac_data cpmac_low_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) .reset_bit = 17,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) .power_bit = 20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) .phy_mask = 0x80000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) static struct plat_cpmac_data cpmac_high_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) .reset_bit = 21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) .power_bit = 22,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) .phy_mask = 0x7fffffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) static u64 cpmac_dma_mask = DMA_BIT_MASK(32);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) static struct platform_device cpmac_low = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) .name = "cpmac",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) .dma_mask = &cpmac_dma_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) .coherent_dma_mask = DMA_BIT_MASK(32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) .platform_data = &cpmac_low_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) .resource = cpmac_low_res,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) .num_resources = ARRAY_SIZE(cpmac_low_res),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) static struct platform_device cpmac_high = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) .name = "cpmac",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) .dma_mask = &cpmac_dma_mask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) .coherent_dma_mask = DMA_BIT_MASK(32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) .platform_data = &cpmac_high_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) .resource = cpmac_high_res,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) .num_resources = ARRAY_SIZE(cpmac_high_res),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) static void __init cpmac_get_mac(int instance, unsigned char *dev_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) char name[5], *mac;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) sprintf(name, "mac%c", 'a' + instance);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) mac = prom_getenv(name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) if (!mac && instance) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) sprintf(name, "mac%c", 'a');
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) mac = prom_getenv(name);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) if (mac) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) if (!mac_pton(mac, dev_addr)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) pr_warn("cannot parse mac address, using random address\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) eth_random_addr(dev_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) eth_random_addr(dev_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) * USB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) static struct resource usb_res[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) .name = "regs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) .start = AR7_REGS_USB,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) .end = AR7_REGS_USB + 0xff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) .name = "irq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) .start = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) .end = 32,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) .name = "mem",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) .start = 0x03400000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) .end = 0x03401fff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) static struct platform_device ar7_udc = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) .name = "ar7_udc",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) .resource = usb_res,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) .num_resources = ARRAY_SIZE(usb_res),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) * LEDs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) static const struct gpio_led default_leds[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) .name = "status",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) .gpio = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) static const struct gpio_led titan_leds[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) { .name = "status", .gpio = 8, .active_low = 1, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) { .name = "wifi", .gpio = 13, .active_low = 1, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) static const struct gpio_led dsl502t_leds[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) .name = "status",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) .gpio = 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) .name = "ethernet",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) .gpio = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) .name = "usb",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) .gpio = 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) static const struct gpio_led dg834g_leds[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) .name = "ppp",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) .gpio = 6,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) .name = "status",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) .gpio = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) .name = "adsl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) .gpio = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) .name = "wifi",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) .gpio = 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) .name = "power",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) .gpio = 14,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) .default_trigger = "default-on",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) static const struct gpio_led fb_sl_leds[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) .name = "1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) .gpio = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) .name = "2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) .gpio = 13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) .name = "3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) .gpio = 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) .name = "4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) .gpio = 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) .name = "5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) .gpio = 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) static const struct gpio_led fb_fon_leds[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) .name = "1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) .gpio = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) .name = "2",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) .gpio = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) .name = "3",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) .gpio = 5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) .name = "4",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) .gpio = 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) .name = "5",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) .gpio = 11,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) static const struct gpio_led gt701_leds[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) .name = "inet:green",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) .gpio = 13,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) .name = "usb",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) .gpio = 12,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) .name = "inet:red",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) .gpio = 9,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) .name = "power:red",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) .gpio = 7,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) .name = "power:green",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) .gpio = 8,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) .default_trigger = "default-on",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) .name = "ethernet",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) .gpio = 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) .active_low = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) static struct gpio_led_platform_data ar7_led_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) static struct platform_device ar7_gpio_leds = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) .name = "leds-gpio",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) .platform_data = &ar7_led_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) static void __init detect_leds(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) char *prid, *usb_prod;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) /* Default LEDs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) ar7_led_data.num_leds = ARRAY_SIZE(default_leds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) ar7_led_data.leds = default_leds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) /* FIXME: the whole thing is unreliable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) prid = prom_getenv("ProductID");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) usb_prod = prom_getenv("usb_prod");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) /* If we can't get the product id from PROM, use the default LEDs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) if (!prid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) if (strstr(prid, "Fritz_Box_FON")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) ar7_led_data.num_leds = ARRAY_SIZE(fb_fon_leds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) ar7_led_data.leds = fb_fon_leds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) } else if (strstr(prid, "Fritz_Box_")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) ar7_led_data.num_leds = ARRAY_SIZE(fb_sl_leds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) ar7_led_data.leds = fb_sl_leds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) } else if ((!strcmp(prid, "AR7RD") || !strcmp(prid, "AR7DB"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) && usb_prod != NULL && strstr(usb_prod, "DSL-502T")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) ar7_led_data.num_leds = ARRAY_SIZE(dsl502t_leds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) ar7_led_data.leds = dsl502t_leds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) } else if (strstr(prid, "DG834")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) ar7_led_data.num_leds = ARRAY_SIZE(dg834g_leds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) ar7_led_data.leds = dg834g_leds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) } else if (strstr(prid, "CYWM") || strstr(prid, "CYWL")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) ar7_led_data.num_leds = ARRAY_SIZE(titan_leds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) ar7_led_data.leds = titan_leds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) } else if (strstr(prid, "GT701")) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) ar7_led_data.num_leds = ARRAY_SIZE(gt701_leds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) ar7_led_data.leds = gt701_leds;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) * Watchdog
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) static struct resource ar7_wdt_res = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) .name = "regs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) .start = -1, /* Filled at runtime */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) .end = -1, /* Filled at runtime */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) static struct platform_device ar7_wdt = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) .name = "ar7_wdt",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) .resource = &ar7_wdt_res,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) .num_resources = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) /*****************************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) * Init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) ****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) static int __init ar7_register_uarts(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) #ifdef CONFIG_SERIAL_8250
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) static struct uart_port uart_port __initdata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) struct clk *bus_clk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) int res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) memset(&uart_port, 0, sizeof(struct uart_port));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) bus_clk = clk_get(NULL, "bus");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) if (IS_ERR(bus_clk))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) panic("unable to get bus clk");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) uart_port.type = PORT_AR7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) uart_port.uartclk = clk_get_rate(bus_clk) / 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) uart_port.iotype = UPIO_MEM32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) uart_port.flags = UPF_FIXED_TYPE | UPF_BOOT_AUTOCONF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) uart_port.regshift = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) uart_port.line = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) uart_port.irq = AR7_IRQ_UART0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) uart_port.mapbase = AR7_REGS_UART0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) uart_port.membase = ioremap(uart_port.mapbase, 256);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) res = early_serial_setup(&uart_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) if (res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) return res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) /* Only TNETD73xx have a second serial port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) if (ar7_has_second_uart()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) uart_port.line = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) uart_port.irq = AR7_IRQ_UART1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) uart_port.mapbase = UR8_REGS_UART1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) uart_port.membase = ioremap(uart_port.mapbase, 256);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) res = early_serial_setup(&uart_port);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) if (res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) return res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) static void __init titan_fixup_devices(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) /* Set vlynq0 data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) vlynq_low_data.reset_bit = 15;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) vlynq_low_data.gpio_bit = 14;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) /* Set vlynq1 data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) vlynq_high_data.reset_bit = 16;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) vlynq_high_data.gpio_bit = 7;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) /* Set vlynq0 resources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) vlynq_low_res[0].start = TITAN_REGS_VLYNQ0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) vlynq_low_res[0].end = TITAN_REGS_VLYNQ0 + 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) vlynq_low_res[1].start = 33;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) vlynq_low_res[1].end = 33;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) vlynq_low_res[2].start = 0x0c000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) vlynq_low_res[2].end = 0x0fffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) vlynq_low_res[3].start = 80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) vlynq_low_res[3].end = 111;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) /* Set vlynq1 resources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) vlynq_high_res[0].start = TITAN_REGS_VLYNQ1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) vlynq_high_res[0].end = TITAN_REGS_VLYNQ1 + 0xff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) vlynq_high_res[1].start = 34;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) vlynq_high_res[1].end = 34;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) vlynq_high_res[2].start = 0x40000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) vlynq_high_res[2].end = 0x43ffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) vlynq_high_res[3].start = 112;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) vlynq_high_res[3].end = 143;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) /* Set cpmac0 data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) cpmac_low_data.phy_mask = 0x40000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) /* Set cpmac1 data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) cpmac_high_data.phy_mask = 0x80000000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) /* Set cpmac0 resources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) cpmac_low_res[0].start = TITAN_REGS_MAC0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) cpmac_low_res[0].end = TITAN_REGS_MAC0 + 0x7ff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) /* Set cpmac1 resources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) cpmac_high_res[0].start = TITAN_REGS_MAC1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) cpmac_high_res[0].end = TITAN_REGS_MAC1 + 0x7ff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) static int __init ar7_register_devices(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) void __iomem *bootcr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) u32 val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) int res;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) res = ar7_gpio_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) if (res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) pr_warn("unable to register gpios: %d\n", res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) res = ar7_register_uarts();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) if (res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) pr_err("unable to setup uart(s): %d\n", res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) res = platform_device_register(&physmap_flash);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) if (res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) pr_warn("unable to register physmap-flash: %d\n", res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) if (ar7_is_titan())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) titan_fixup_devices();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) ar7_device_disable(vlynq_low_data.reset_bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) res = platform_device_register(&vlynq_low);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) if (res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) pr_warn("unable to register vlynq-low: %d\n", res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) if (ar7_has_high_vlynq()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) ar7_device_disable(vlynq_high_data.reset_bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) res = platform_device_register(&vlynq_high);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) if (res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) pr_warn("unable to register vlynq-high: %d\n", res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) if (ar7_has_high_cpmac()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) res = fixed_phy_add(PHY_POLL, cpmac_high.id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) &fixed_phy_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) if (!res) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) cpmac_get_mac(1, cpmac_high_data.dev_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) res = platform_device_register(&cpmac_high);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) if (res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) pr_warn("unable to register cpmac-high: %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) pr_warn("unable to add cpmac-high phy: %d\n", res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) cpmac_low_data.phy_mask = 0xffffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) res = fixed_phy_add(PHY_POLL, cpmac_low.id, &fixed_phy_status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) if (!res) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) cpmac_get_mac(0, cpmac_low_data.dev_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) res = platform_device_register(&cpmac_low);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) if (res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) pr_warn("unable to register cpmac-low: %d\n", res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) pr_warn("unable to add cpmac-low phy: %d\n", res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) detect_leds();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) res = platform_device_register(&ar7_gpio_leds);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) if (res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) pr_warn("unable to register leds: %d\n", res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) res = platform_device_register(&ar7_udc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) if (res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) pr_warn("unable to register usb slave: %d\n", res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) /* Register watchdog only if enabled in hardware */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) bootcr = ioremap(AR7_REGS_DCL, 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) val = readl(bootcr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) iounmap(bootcr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) if (val & AR7_WDT_HW_ENA) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) if (ar7_has_high_vlynq())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) ar7_wdt_res.start = UR8_REGS_WDT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) ar7_wdt_res.start = AR7_REGS_WDT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) ar7_wdt_res.end = ar7_wdt_res.start + 0x20;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) res = platform_device_register(&ar7_wdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) if (res)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) pr_warn("unable to register watchdog: %d\n", res);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) device_initcall(ar7_register_devices);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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