^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright 2000, 2007-2008 MontaVista Software Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Author: MontaVista Software, Inc. <source@mvista.com
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Updates to 2.6, Pete Popov, Embedded Alley Solutions, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * This program is free software; you can redistribute it and/or modify it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * under the terms of the GNU General Public License as published by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Free Software Foundation; either version 2 of the License, or (at your
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * option) any later version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * You should have received a copy of the GNU General Public License along
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * with this program; if not, write to the Free Software Foundation, Inc.,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * 675 Mass Ave, Cambridge, MA 02139, USA.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <asm/dma-coherence.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <asm/mipsregs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <au1000.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) extern void __init board_setup(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) extern void __init alchemy_set_lpj(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) void __init plat_mem_setup(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) alchemy_set_lpj();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) if (au1xxx_cpu_needs_config_od())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) /* Various early Au1xx0 errata corrected by this */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) set_c0_config(1 << 19); /* Set Config[OD] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /* Clear to obtain best system bus performance */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) clear_c0_config(1 << 19); /* Clear Config[OD] */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) hw_coherentio = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) coherentio = IO_COHERENCE_ENABLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) switch (alchemy_get_cputype()) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) case ALCHEMY_CPU_AU1000:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) case ALCHEMY_CPU_AU1500:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) case ALCHEMY_CPU_AU1100:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) coherentio = IO_COHERENCE_DISABLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) case ALCHEMY_CPU_AU1200:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) /* Au1200 AB USB does not support coherent memory */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) if (0 == (read_c0_prid() & PRID_REV_MASK))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) coherentio = IO_COHERENCE_DISABLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) board_setup(); /* board specific setup */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) /* IO/MEM resources. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) set_io_port_base(0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) ioport_resource.start = IOPORT_RESOURCE_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) ioport_resource.end = IOPORT_RESOURCE_END;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) iomem_resource.start = IOMEM_RESOURCE_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) iomem_resource.end = IOMEM_RESOURCE_END;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #ifdef CONFIG_MIPS_FIXUP_BIGPHYS_ADDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) /* This routine should be valid for all Au1x based boards */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) phys_addr_t fixup_bigphys_addr(phys_addr_t phys_addr, phys_addr_t size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) unsigned long start = ALCHEMY_PCI_MEMWIN_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) unsigned long end = ALCHEMY_PCI_MEMWIN_END;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* Don't fixup 36-bit addresses */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) if ((phys_addr >> 32) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) return phys_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* Check for PCI memory window */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) if (phys_addr >= start && (phys_addr + size - 1) <= end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) return (phys_addr_t)(AU1500_PCI_MEM_PHYS_ADDR + phys_addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) /* default nop */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) return phys_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) int io_remap_pfn_range(struct vm_area_struct *vma, unsigned long vaddr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) unsigned long pfn, unsigned long size, pgprot_t prot)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) phys_addr_t phys_addr = fixup_bigphys_addr(pfn << PAGE_SHIFT, size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) return remap_pfn_range(vma, vaddr, phys_addr >> PAGE_SHIFT, size, prot);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) EXPORT_SYMBOL(io_remap_pfn_range);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #endif /* CONFIG_MIPS_FIXUP_BIGPHYS_ADDR */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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