^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2008-2009 PetaLogix
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2006 Atmark Techno, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * License. See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) OUTPUT_ARCH(microblaze)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) ENTRY(microblaze_start)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define RO_EXCEPTION_TABLE_ALIGN 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/cache.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/page.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm-generic/vmlinux.lds.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/thread_info.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #ifdef __MICROBLAZEEL__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) jiffies = jiffies_64;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) jiffies = jiffies_64 + 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) SECTIONS {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) . = CONFIG_KERNEL_START;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) microblaze_start = CONFIG_KERNEL_BASE_ADDR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) .text : AT(ADDR(.text) - LOAD_OFFSET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) _text = . ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) _stext = . ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) HEAD_TEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) TEXT_TEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) *(.fixup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) EXIT_TEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) EXIT_CALL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) SCHED_TEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) CPUIDLE_TEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) LOCK_TEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) KPROBES_TEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) IRQENTRY_TEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) SOFTIRQENTRY_TEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) . = ALIGN (4) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) _etext = . ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) . = ALIGN (4) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) __fdt_blob : AT(ADDR(__fdt_blob) - LOAD_OFFSET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) _fdt_start = . ; /* place for fdt blob */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) *(__fdt_blob) ; /* Any link-placed DTB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) . = _fdt_start + 0x10000; /* Pad up to 64kbyte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) _fdt_end = . ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) . = ALIGN(16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) RO_DATA(4096)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * sdata2 section can go anywhere, but must be word aligned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * and SDA2_BASE must point to the middle of it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .sdata2 : AT(ADDR(.sdata2) - LOAD_OFFSET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) _ssrw = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) . = ALIGN(PAGE_SIZE); /* page aligned when MMU used */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) *(.sdata2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) . = ALIGN(8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) _essrw = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) _ssrw_size = _essrw - _ssrw;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) _KERNEL_SDA2_BASE_ = _ssrw + (_ssrw_size / 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) _sdata = . ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) RW_DATA(32, PAGE_SIZE, THREAD_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) _edata = . ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) /* Under the microblaze ABI, .sdata and .sbss must be contiguous */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) . = ALIGN(8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .sdata : AT(ADDR(.sdata) - LOAD_OFFSET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) _ssro = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) *(.sdata)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) .sbss : AT(ADDR(.sbss) - LOAD_OFFSET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) _ssbss = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) *(.sbss)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) _esbss = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) _essro = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) _ssro_size = _essro - _ssro ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) _KERNEL_SDA_BASE_ = _ssro + (_ssro_size / 2) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) PERCPU_SECTION(L1_CACHE_BYTES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) . = ALIGN(PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) __init_begin = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) INIT_TEXT_SECTION(PAGE_SIZE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) .init.data : AT(ADDR(.init.data) - LOAD_OFFSET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) INIT_DATA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) . = ALIGN(4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) .init.ivt : AT(ADDR(.init.ivt) - LOAD_OFFSET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) __ivt_start = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) *(.init.ivt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) __ivt_end = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) .init.setup : AT(ADDR(.init.setup) - LOAD_OFFSET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) INIT_SETUP(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) .initcall.init : AT(ADDR(.initcall.init) - LOAD_OFFSET ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) INIT_CALLS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) CON_INITCALL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) __init_end_before_initramfs = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) .init.ramfs : AT(ADDR(.init.ramfs) - LOAD_OFFSET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) INIT_RAM_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) __init_end = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) .bss ALIGN (PAGE_SIZE) : AT(ADDR(.bss) - LOAD_OFFSET) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) /* page aligned when MMU used */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) __bss_start = . ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) *(.bss*)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) *(COMMON)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) . = ALIGN (4) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) __bss_stop = . ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) . = ALIGN(PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) _end = .;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) DISCARDS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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