^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2007-2009 PetaLogix
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2006 Atmark Techno, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * License. See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/clk-provider.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/clocksource.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/seq_file.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/initrd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/console.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/debugfs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/of_fdt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/pgtable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <asm/sections.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <asm/page.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/bug.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/param.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/pci.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/cache.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/dma-mapping.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <asm/cacheflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <asm/entry.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <asm/cpuinfo.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) DEFINE_PER_CPU(unsigned int, KSP); /* Saved kernel stack pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) DEFINE_PER_CPU(unsigned int, KM); /* Kernel/user mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) DEFINE_PER_CPU(unsigned int, ENTRY_SP); /* Saved SP on kernel entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) DEFINE_PER_CPU(unsigned int, R11_SAVE); /* Temp variable for entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) DEFINE_PER_CPU(unsigned int, CURRENT_SAVE); /* Saved current pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * Placed cmd_line to .data section because can be initialized from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * ASM code. Default position is BSS section which is cleared
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * in machine_early_init().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) char cmd_line[COMMAND_LINE_SIZE] __section(".data");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) void __init setup_arch(char **cmdline_p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) *cmdline_p = boot_command_line;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) setup_memory();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) console_verbose();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) unflatten_device_tree();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) setup_cpuinfo();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) microblaze_cache_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) xilinx_pci_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #ifdef CONFIG_MTD_UCLINUX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) /* Handle both romfs and cramfs types, without generating unnecessary
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) code (ie no point checking for CRAMFS if it's not even enabled) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) inline unsigned get_romfs_len(unsigned *addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #ifdef CONFIG_ROMFS_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) if (memcmp(&addr[0], "-rom1fs-", 8) == 0) /* romfs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) return be32_to_cpu(addr[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #ifdef CONFIG_CRAMFS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (addr[0] == le32_to_cpu(0x28cd3d45)) /* cramfs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) return le32_to_cpu(addr[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #endif /* CONFIG_MTD_UCLINUX_EBSS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) unsigned long kernel_tlb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) void __init machine_early_init(const char *cmdline, unsigned int ram,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) unsigned int fdt, unsigned int msr, unsigned int tlb0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) unsigned int tlb1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) unsigned long *src, *dst;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) unsigned int offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /* If CONFIG_MTD_UCLINUX is defined, assume ROMFS is at the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * end of kernel. There are two position which we want to check.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * The first is __init_end and the second __bss_start.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #ifdef CONFIG_MTD_UCLINUX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) int romfs_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) unsigned int romfs_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) char *old_klimit = klimit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) romfs_base = (ram ? ram : (unsigned int)&__init_end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) romfs_size = PAGE_ALIGN(get_romfs_len((unsigned *)romfs_base));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) if (!romfs_size) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) romfs_base = (unsigned int)&__bss_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) romfs_size = PAGE_ALIGN(get_romfs_len((unsigned *)romfs_base));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) /* Move ROMFS out of BSS before clearing it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) if (romfs_size > 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) memmove(&__bss_stop, (int *)romfs_base, romfs_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) klimit += romfs_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) /* clearing bss section */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) memset(__bss_start, 0, __bss_stop-__bss_start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) memset(_ssbss, 0, _esbss-_ssbss);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) /* initialize device tree for usage in early_printk */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) early_init_devtree(_fdt_start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) /* setup kernel_tlb after BSS cleaning
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) * Maybe worth to move to asm code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) kernel_tlb = tlb0 + tlb1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) /* printk("TLB1 0x%08x, TLB0 0x%08x, tlb 0x%x\n", tlb0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) tlb1, kernel_tlb); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) pr_info("Ramdisk addr 0x%08x, ", ram);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) if (fdt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) pr_info("FDT at 0x%08x\n", fdt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) pr_info("Compiled-in FDT at %p\n", _fdt_start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) #ifdef CONFIG_MTD_UCLINUX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) pr_info("Found romfs @ 0x%08x (0x%08x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) romfs_base, romfs_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) pr_info("#### klimit %p ####\n", old_klimit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) BUG_ON(romfs_size < 0); /* What else can we do? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) pr_info("Moved 0x%08x bytes from 0x%08x to 0x%08x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) romfs_size, romfs_base, (unsigned)&__bss_stop);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) pr_info("New klimit: 0x%08x\n", (unsigned)klimit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) #if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) if (msr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) pr_info("!!!Your kernel has setup MSR instruction but ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) pr_cont("CPU don't have it %x\n", msr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (!msr) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) pr_info("!!!Your kernel not setup MSR instruction but ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) pr_cont("CPU have it %x\n", msr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) /* Do not copy reset vectors. offset = 0x2 means skip the first
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) * two instructions. dst is pointer to MB vectors which are placed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) * in block ram. If you want to copy reset vector setup offset to 0x0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #if !CONFIG_MANUAL_RESET_VECTOR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) offset = 0x2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) dst = (unsigned long *) (offset * sizeof(u32));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) for (src = __ivt_start + offset; src < __ivt_end; src++, dst++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) *dst = *src;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) /* Initialize global data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) per_cpu(KM, 0) = 0x1; /* We start in kernel mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) per_cpu(CURRENT_SAVE, 0) = (unsigned long)current;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) void __init time_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) of_clk_init(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) setup_cpuinfo_clk();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) timer_probe();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) #ifdef CONFIG_DEBUG_FS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) struct dentry *of_debugfs_root;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) static int microblaze_debugfs_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) of_debugfs_root = debugfs_create_dir("microblaze", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) arch_initcall(microblaze_debugfs_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) # ifdef CONFIG_MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) static int __init debugfs_tlb(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) debugfs_create_u32("tlb_skip", S_IRUGO, of_debugfs_root, &tlb_skip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) device_initcall(debugfs_tlb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) # endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #endif