^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2007-2009 PetaLogix
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 2006 Atmark Techno, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * License. See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/linkage.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/thread_info.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/entry.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/asm-offsets.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/registers.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/unistd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/percpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/signal.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) .macro disable_irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) msrclr r0, MSR_IE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) .macro enable_irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) msrset r0, MSR_IE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) .macro clear_bip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) msrclr r0, MSR_BIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) .macro disable_irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) mfs r11, rmsr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) andi r11, r11, ~MSR_IE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) mts rmsr, r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) .macro enable_irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) mfs r11, rmsr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) ori r11, r11, MSR_IE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) mts rmsr, r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .macro clear_bip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) mfs r11, rmsr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) andi r11, r11, ~MSR_BIP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) mts rmsr, r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) ENTRY(_interrupt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) swi r1, r0, PER_CPU(ENTRY_SP) /* save the current sp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) swi r11, r0, PER_CPU(R11_SAVE) /* temporarily save r11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) lwi r11, r0, PER_CPU(KM) /* load mode indicator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) beqid r11, 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) brid 2f /* jump over */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) addik r1, r1, (-PT_SIZE) /* room for pt_regs (delay slot) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 1: /* switch to kernel stack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) lwi r1, r0, PER_CPU(CURRENT_SAVE) /* get the saved current */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) lwi r1, r1, TS_THREAD_INFO /* get the thread info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) /* calculate kernel stack pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) addik r1, r1, THREAD_SIZE - PT_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) swi r11, r1, PT_MODE /* store the mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) lwi r11, r0, PER_CPU(R11_SAVE) /* reload r11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) swi r2, r1, PT_R2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) swi r3, r1, PT_R3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) swi r4, r1, PT_R4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) swi r5, r1, PT_R5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) swi r6, r1, PT_R6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) swi r7, r1, PT_R7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) swi r8, r1, PT_R8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) swi r9, r1, PT_R9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) swi r10, r1, PT_R10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) swi r11, r1, PT_R11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) swi r12, r1, PT_R12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) swi r13, r1, PT_R13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) swi r14, r1, PT_R14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) swi r14, r1, PT_PC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) swi r15, r1, PT_R15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) swi r16, r1, PT_R16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) swi r17, r1, PT_R17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) swi r18, r1, PT_R18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) swi r19, r1, PT_R19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) swi r20, r1, PT_R20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) swi r21, r1, PT_R21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) swi r22, r1, PT_R22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) swi r23, r1, PT_R23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) swi r24, r1, PT_R24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) swi r25, r1, PT_R25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) swi r26, r1, PT_R26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) swi r27, r1, PT_R27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) swi r28, r1, PT_R28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) swi r29, r1, PT_R29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) swi r30, r1, PT_R30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) swi r31, r1, PT_R31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) /* special purpose registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) mfs r11, rmsr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) swi r11, r1, PT_MSR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) mfs r11, rear
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) swi r11, r1, PT_EAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) mfs r11, resr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) swi r11, r1, PT_ESR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) mfs r11, rfsr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) swi r11, r1, PT_FSR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) /* reload original stack pointer and save it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) lwi r11, r0, PER_CPU(ENTRY_SP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) swi r11, r1, PT_R1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) /* update mode indicator we are in kernel mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) addik r11, r0, 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) swi r11, r0, PER_CPU(KM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /* restore r31 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) lwi r31, r0, PER_CPU(CURRENT_SAVE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /* prepare the link register, the argument and jump */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) addik r15, r0, ret_from_intr - 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) addk r6, r0, r15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) braid do_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) add r5, r0, r1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) ret_from_intr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) lwi r11, r1, PT_MODE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) bneid r11, no_intr_resched
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) lwi r6, r31, TS_THREAD_INFO /* get thread info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) lwi r19, r6, TI_FLAGS /* get flags in thread info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) /* do an extra work if any bits are set */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) andi r11, r19, _TIF_NEED_RESCHED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) beqi r11, 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) bralid r15, schedule
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) bri 3b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 1: andi r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) beqid r11, no_intr_resched
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) addk r5, r1, r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) bralid r15, do_notify_resume
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) addk r6, r0, r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) bri 3b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) no_intr_resched:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /* Disable interrupts, we are now committed to the state restore */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) disable_irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) /* save mode indicator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) lwi r11, r1, PT_MODE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) swi r11, r0, PER_CPU(KM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) /* save r31 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) swi r31, r0, PER_CPU(CURRENT_SAVE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) restore_context:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) /* special purpose registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) lwi r11, r1, PT_FSR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) mts rfsr, r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) lwi r11, r1, PT_ESR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) mts resr, r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) lwi r11, r1, PT_EAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) mts rear, r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) lwi r11, r1, PT_MSR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) mts rmsr, r11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) lwi r31, r1, PT_R31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) lwi r30, r1, PT_R30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) lwi r29, r1, PT_R29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) lwi r28, r1, PT_R28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) lwi r27, r1, PT_R27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) lwi r26, r1, PT_R26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) lwi r25, r1, PT_R25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) lwi r24, r1, PT_R24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) lwi r23, r1, PT_R23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) lwi r22, r1, PT_R22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) lwi r21, r1, PT_R21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) lwi r20, r1, PT_R20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) lwi r19, r1, PT_R19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) lwi r18, r1, PT_R18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) lwi r17, r1, PT_R17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) lwi r16, r1, PT_R16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) lwi r15, r1, PT_R15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) lwi r14, r1, PT_PC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) lwi r13, r1, PT_R13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) lwi r12, r1, PT_R12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) lwi r11, r1, PT_R11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) lwi r10, r1, PT_R10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) lwi r9, r1, PT_R9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) lwi r8, r1, PT_R8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) lwi r7, r1, PT_R7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) lwi r6, r1, PT_R6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) lwi r5, r1, PT_R5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) lwi r4, r1, PT_R4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) lwi r3, r1, PT_R3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) lwi r2, r1, PT_R2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) lwi r1, r1, PT_R1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) rtid r14, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) ENTRY(_reset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) brai 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) ENTRY(_user_exception)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) swi r1, r0, PER_CPU(ENTRY_SP) /* save the current sp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) swi r11, r0, PER_CPU(R11_SAVE) /* temporarily save r11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) lwi r11, r0, PER_CPU(KM) /* load mode indicator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) beqid r11, 1f /* Already in kernel mode? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) brid 2f /* jump over */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) addik r1, r1, (-PT_SIZE) /* Room for pt_regs (delay slot) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 1: /* Switch to kernel stack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) lwi r1, r0, PER_CPU(CURRENT_SAVE) /* get the saved current */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) lwi r1, r1, TS_THREAD_INFO /* get the thread info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) /* calculate kernel stack pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) addik r1, r1, THREAD_SIZE - PT_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) swi r11, r1, PT_MODE /* store the mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) lwi r11, r0, PER_CPU(R11_SAVE) /* reload r11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) /* save them on stack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) swi r2, r1, PT_R2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) swi r3, r1, PT_R3 /* r3: _always_ in clobber list; see unistd.h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) swi r4, r1, PT_R4 /* r4: _always_ in clobber list; see unistd.h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) swi r5, r1, PT_R5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) swi r6, r1, PT_R6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) swi r7, r1, PT_R7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) swi r8, r1, PT_R8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) swi r9, r1, PT_R9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) swi r10, r1, PT_R10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) swi r11, r1, PT_R11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) /* r12: _always_ in clobber list; see unistd.h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) swi r12, r1, PT_R12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) swi r13, r1, PT_R13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) /* r14: _always_ in clobber list; see unistd.h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) swi r14, r1, PT_R14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) /* but we want to return to the next inst. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) addik r14, r14, 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) swi r14, r1, PT_PC /* increment by 4 and store in pc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) swi r15, r1, PT_R15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) swi r16, r1, PT_R16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) swi r17, r1, PT_R17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) swi r18, r1, PT_R18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) swi r19, r1, PT_R19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) swi r20, r1, PT_R20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) swi r21, r1, PT_R21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) swi r22, r1, PT_R22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) swi r23, r1, PT_R23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) swi r24, r1, PT_R24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) swi r25, r1, PT_R25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) swi r26, r1, PT_R26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) swi r27, r1, PT_R27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) swi r28, r1, PT_R28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) swi r29, r1, PT_R29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) swi r30, r1, PT_R30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) swi r31, r1, PT_R31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) disable_irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) nop /* make sure IE bit is in effect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) clear_bip /* once IE is in effect it is safe to clear BIP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) /* special purpose registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) mfs r11, rmsr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) swi r11, r1, PT_MSR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) mfs r11, rear
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) swi r11, r1, PT_EAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) mfs r11, resr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) swi r11, r1, PT_ESR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) mfs r11, rfsr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) swi r11, r1, PT_FSR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) /* reload original stack pointer and save it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) lwi r11, r0, PER_CPU(ENTRY_SP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) swi r11, r1, PT_R1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) /* update mode indicator we are in kernel mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) addik r11, r0, 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) swi r11, r0, PER_CPU(KM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) /* restore r31 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) lwi r31, r0, PER_CPU(CURRENT_SAVE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) /* re-enable interrupts now we are in kernel mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) enable_irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) /* See if the system call number is valid. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) addi r11, r12, -__NR_syscalls
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) bgei r11, 1f /* return to user if not valid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) /* Figure out which function to use for this system call. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) /* Note Microblaze barrel shift is optional, so don't rely on it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) add r12, r12, r12 /* convert num -> ptr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) addik r30, r0, 1 /* restarts allowed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) add r12, r12, r12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) lwi r12, r12, sys_call_table /* Get function pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) addik r15, r0, ret_to_user-8 /* set return address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) bra r12 /* Make the system call. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) bri 0 /* won't reach here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) brid ret_to_user /* jump to syscall epilogue */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) addi r3, r0, -ENOSYS /* set errno in delay slot */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) * Debug traps are like a system call, but entered via brki r14, 0x60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) * All we need to do is send the SIGTRAP signal to current, ptrace and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) * do_notify_resume will handle the rest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) ENTRY(_debug_exception)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) swi r1, r0, PER_CPU(ENTRY_SP) /* save the current sp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) lwi r1, r0, PER_CPU(CURRENT_SAVE) /* get the saved current */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) lwi r1, r1, TS_THREAD_INFO /* get the thread info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) addik r1, r1, THREAD_SIZE - PT_SIZE /* get the kernel stack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) swi r11, r0, PER_CPU(R11_SAVE) /* temporarily save r11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) lwi r11, r0, PER_CPU(KM) /* load mode indicator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) //save_context:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) swi r11, r1, PT_MODE /* store the mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) lwi r11, r0, PER_CPU(R11_SAVE) /* reload r11 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) /* save them on stack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) swi r2, r1, PT_R2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) swi r3, r1, PT_R3 /* r3: _always_ in clobber list; see unistd.h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) swi r4, r1, PT_R4 /* r4: _always_ in clobber list; see unistd.h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) swi r5, r1, PT_R5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) swi r6, r1, PT_R6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) swi r7, r1, PT_R7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) swi r8, r1, PT_R8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) swi r9, r1, PT_R9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) swi r10, r1, PT_R10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) swi r11, r1, PT_R11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) /* r12: _always_ in clobber list; see unistd.h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) swi r12, r1, PT_R12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) swi r13, r1, PT_R13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) /* r14: _always_ in clobber list; see unistd.h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) swi r14, r1, PT_R14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) swi r14, r1, PT_PC /* Will return to interrupted instruction */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) swi r15, r1, PT_R15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) swi r16, r1, PT_R16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) swi r17, r1, PT_R17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) swi r18, r1, PT_R18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) swi r19, r1, PT_R19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) swi r20, r1, PT_R20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) swi r21, r1, PT_R21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) swi r22, r1, PT_R22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) swi r23, r1, PT_R23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) swi r24, r1, PT_R24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) swi r25, r1, PT_R25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) swi r26, r1, PT_R26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) swi r27, r1, PT_R27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) swi r28, r1, PT_R28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) swi r29, r1, PT_R29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) swi r30, r1, PT_R30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) swi r31, r1, PT_R31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) disable_irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) nop /* make sure IE bit is in effect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) clear_bip /* once IE is in effect it is safe to clear BIP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) /* special purpose registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) mfs r11, rmsr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) swi r11, r1, PT_MSR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) mfs r11, rear
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) swi r11, r1, PT_EAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) mfs r11, resr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) swi r11, r1, PT_ESR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) mfs r11, rfsr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) swi r11, r1, PT_FSR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) /* reload original stack pointer and save it */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) lwi r11, r0, PER_CPU(ENTRY_SP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) swi r11, r1, PT_R1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) /* update mode indicator we are in kernel mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) addik r11, r0, 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) swi r11, r0, PER_CPU(KM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) /* restore r31 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) lwi r31, r0, PER_CPU(CURRENT_SAVE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) /* re-enable interrupts now we are in kernel mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) enable_irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) addi r5, r0, SIGTRAP /* sending the trap signal */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) add r6, r0, r31 /* to current */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) bralid r15, send_sig
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) add r7, r0, r0 /* 3rd param zero */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) addik r30, r0, 1 /* restarts allowed ??? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) /* Restore r3/r4 to work around how ret_to_user works */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) lwi r3, r1, PT_R3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) lwi r4, r1, PT_R4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) bri ret_to_user
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) ENTRY(_break)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) bri 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) /* struct task_struct *_switch_to(struct thread_info *prev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) struct thread_info *next); */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) ENTRY(_switch_to)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) /* prepare return value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) addk r3, r0, r31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) /* save registers in cpu_context */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) /* use r11 and r12, volatile registers, as temp register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) addik r11, r5, TI_CPU_CONTEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) swi r1, r11, CC_R1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) swi r2, r11, CC_R2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) /* skip volatile registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) * they are saved on stack when we jumped to _switch_to() */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) /* dedicated registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) swi r13, r11, CC_R13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) swi r14, r11, CC_R14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) swi r15, r11, CC_R15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) swi r16, r11, CC_R16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) swi r17, r11, CC_R17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) swi r18, r11, CC_R18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) /* save non-volatile registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) swi r19, r11, CC_R19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) swi r20, r11, CC_R20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) swi r21, r11, CC_R21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) swi r22, r11, CC_R22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) swi r23, r11, CC_R23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) swi r24, r11, CC_R24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) swi r25, r11, CC_R25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) swi r26, r11, CC_R26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) swi r27, r11, CC_R27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) swi r28, r11, CC_R28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) swi r29, r11, CC_R29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) swi r30, r11, CC_R30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) /* special purpose registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) mfs r12, rmsr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) swi r12, r11, CC_MSR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) mfs r12, rear
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) swi r12, r11, CC_EAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) mfs r12, resr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) swi r12, r11, CC_ESR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) mfs r12, rfsr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) swi r12, r11, CC_FSR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) /* update r31, the current */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) lwi r31, r6, TI_TASK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) swi r31, r0, PER_CPU(CURRENT_SAVE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) /* get new process' cpu context and restore */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) addik r11, r6, TI_CPU_CONTEXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) /* special purpose registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) lwi r12, r11, CC_FSR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) mts rfsr, r12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) lwi r12, r11, CC_ESR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) mts resr, r12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) lwi r12, r11, CC_EAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) mts rear, r12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) lwi r12, r11, CC_MSR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) mts rmsr, r12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) /* non-volatile registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) lwi r30, r11, CC_R30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) lwi r29, r11, CC_R29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) lwi r28, r11, CC_R28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) lwi r27, r11, CC_R27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) lwi r26, r11, CC_R26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) lwi r25, r11, CC_R25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) lwi r24, r11, CC_R24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) lwi r23, r11, CC_R23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) lwi r22, r11, CC_R22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) lwi r21, r11, CC_R21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) lwi r20, r11, CC_R20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) lwi r19, r11, CC_R19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) /* dedicated registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) lwi r18, r11, CC_R18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) lwi r17, r11, CC_R17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) lwi r16, r11, CC_R16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) lwi r15, r11, CC_R15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) lwi r14, r11, CC_R14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) lwi r13, r11, CC_R13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) /* skip volatile registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) lwi r2, r11, CC_R2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) lwi r1, r11, CC_R1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) rtsd r15, 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) ENTRY(ret_from_fork)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) addk r5, r0, r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) brlid r15, schedule_tail
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) swi r31, r1, PT_R31 /* save r31 in user context. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) /* will soon be restored to r31 in ret_to_user */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) addk r3, r0, r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) brid ret_to_user
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) ENTRY(ret_from_kernel_thread)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) brlid r15, schedule_tail
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) addk r5, r0, r3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) brald r15, r20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) addk r5, r0, r19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) brid ret_to_user
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) addk r3, r0, r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) work_pending:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) lwi r11, r1, PT_MODE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) bneid r11, 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) enable_irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) andi r11, r19, _TIF_NEED_RESCHED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) beqi r11, 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) bralid r15, schedule
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) bri 4f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) 1: andi r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) beqi r11, no_work_pending
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) addk r5, r30, r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) bralid r15, do_notify_resume
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) addik r6, r0, 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) addk r30, r0, r0 /* no restarts from now on */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) disable_irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) lwi r6, r31, TS_THREAD_INFO /* get thread info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) lwi r19, r6, TI_FLAGS /* get flags in thread info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) bri 3b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) ENTRY(ret_to_user)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) disable_irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) swi r4, r1, PT_R4 /* return val */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) swi r3, r1, PT_R3 /* return val */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) lwi r6, r31, TS_THREAD_INFO /* get thread info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) lwi r19, r6, TI_FLAGS /* get flags in thread info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) bnei r19, work_pending /* do an extra work if any bits are set */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) no_work_pending:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) disable_irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) /* save r31 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) swi r31, r0, PER_CPU(CURRENT_SAVE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) /* save mode indicator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) lwi r18, r1, PT_MODE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) swi r18, r0, PER_CPU(KM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) //restore_context:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) /* special purpose registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) lwi r18, r1, PT_FSR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) mts rfsr, r18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) lwi r18, r1, PT_ESR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) mts resr, r18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) lwi r18, r1, PT_EAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) mts rear, r18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) lwi r18, r1, PT_MSR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) mts rmsr, r18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) lwi r31, r1, PT_R31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) lwi r30, r1, PT_R30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) lwi r29, r1, PT_R29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) lwi r28, r1, PT_R28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) lwi r27, r1, PT_R27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) lwi r26, r1, PT_R26
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) lwi r25, r1, PT_R25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) lwi r24, r1, PT_R24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) lwi r23, r1, PT_R23
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) lwi r22, r1, PT_R22
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) lwi r21, r1, PT_R21
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) lwi r20, r1, PT_R20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) lwi r19, r1, PT_R19
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) lwi r18, r1, PT_R18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) lwi r17, r1, PT_R17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) lwi r16, r1, PT_R16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) lwi r15, r1, PT_R15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) lwi r14, r1, PT_PC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) lwi r13, r1, PT_R13
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) lwi r12, r1, PT_R12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) lwi r11, r1, PT_R11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) lwi r10, r1, PT_R10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) lwi r9, r1, PT_R9
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) lwi r8, r1, PT_R8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) lwi r7, r1, PT_R7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) lwi r6, r1, PT_R6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) lwi r5, r1, PT_R5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) lwi r4, r1, PT_R4 /* return val */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) lwi r3, r1, PT_R3 /* return val */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) lwi r2, r1, PT_R2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) lwi r1, r1, PT_R1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) rtid r14, 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) sys_rt_sigreturn_wrapper:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) addk r30, r0, r0 /* no restarts for this one */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) brid sys_rt_sigreturn
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) addk r5, r1, r0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) /* Interrupt vector table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) .section .init.ivt, "ax"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) .org 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) brai _reset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) brai _user_exception
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) brai _interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) brai _break
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) brai _hw_exception_handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) .org 0x60
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) brai _debug_exception
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) .section .rodata,"a"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) #include "syscall_table.S"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) syscall_table_size=(.-sys_call_table)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) type_SYSCALL:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) .ascii "SYSCALL\0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) type_IRQ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) .ascii "IRQ\0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) type_IRQ_PREEMPT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) .ascii "IRQ (PREEMPTED)\0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) type_SYSCALL_PREEMPT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) .ascii " SYSCALL (PREEMPTED)\0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) * Trap decoding for stack unwinder
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) * Tuples are (start addr, end addr, string)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) * If return address lies on [start addr, end addr],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) * unwinder displays 'string'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) .align 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) .global microblaze_trap_handlers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) microblaze_trap_handlers:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) /* Exact matches come first */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) .word ret_to_user ; .word ret_to_user ; .word type_SYSCALL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) .word ret_from_intr; .word ret_from_intr ; .word type_IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) /* Fuzzy matches go here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) .word ret_from_intr; .word no_intr_resched; .word type_IRQ_PREEMPT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) .word work_pending ; .word no_work_pending; .word type_SYSCALL_PREEMPT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) /* End of table */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) .word 0 ; .word 0 ; .word 0
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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