Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  * Copyright (C) 2006 Atmark Techno, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) #ifndef _ASM_MICROBLAZE_IRQFLAGS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) #define _ASM_MICROBLAZE_IRQFLAGS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <asm/registers.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) static inline notrace unsigned long arch_local_irq_save(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 	asm volatile("	msrclr %0, %1	\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) 		     "	nop		\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 		     : "=r"(flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 		     : "i"(MSR_IE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 		     : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) 	return flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) static inline notrace void arch_local_irq_disable(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) 	/* this uses r0 without declaring it - is that correct? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 	asm volatile("	msrclr r0, %0	\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) 		     "	nop		\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 		     :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 		     : "i"(MSR_IE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) 		     : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) static inline notrace void arch_local_irq_enable(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	/* this uses r0 without declaring it - is that correct? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 	asm volatile("	msrset	r0, %0	\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 		     "	nop		\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 		     :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 		     : "i"(MSR_IE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 		     : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #else /* !CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) static inline notrace unsigned long arch_local_irq_save(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) 	unsigned long flags, tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	asm volatile ("	mfs	%0, rmsr	\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 		      "	nop			\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 		      "	andi	%1, %0, %2	\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 		      "	mts	rmsr, %1	\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 		      "	nop			\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 		      : "=r"(flags), "=r"(tmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 		      : "i"(~MSR_IE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 		      : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 	return flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) static inline notrace void arch_local_irq_disable(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	unsigned long tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	asm volatile("	mfs	%0, rmsr	\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 		     "	nop			\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 		     "	andi	%0, %0, %1	\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 		     "	mts	rmsr, %0	\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 		     "	nop			\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 		     : "=r"(tmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 		     : "i"(~MSR_IE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 		     : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) static inline notrace void arch_local_irq_enable(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 	unsigned long tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	asm volatile("	mfs	%0, rmsr	\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		     "	nop			\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 		     "	ori	%0, %0, %1	\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 		     "	mts	rmsr, %0	\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 		     "	nop			\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 		     : "=r"(tmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 		     : "i"(MSR_IE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 		     : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) #endif /* CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) static inline notrace unsigned long arch_local_save_flags(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	asm volatile("	mfs	%0, rmsr	\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 		     "	nop			\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 		     : "=r"(flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 		     :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 		     : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	return flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) static inline notrace void arch_local_irq_restore(unsigned long flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	asm volatile("	mts	rmsr, %0	\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 		     "	nop			\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 		     :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 		     : "r"(flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 		     : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) static inline notrace bool arch_irqs_disabled_flags(unsigned long flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 	return (flags & MSR_IE) == 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) static inline notrace bool arch_irqs_disabled(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	return arch_irqs_disabled_flags(arch_local_save_flags());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #endif /* _ASM_MICROBLAZE_IRQFLAGS_H */