Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Preliminary support for HW exception handing for Microblaze
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Copyright (C) 2008-2009 PetaLogix
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * Copyright (C) 2005 John Williams <jwilliams@itee.uq.edu.au>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef _ASM_MICROBLAZE_EXCEPTIONS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define _ASM_MICROBLAZE_EXCEPTIONS_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #ifdef __KERNEL__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #ifndef CONFIG_MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define EX_HANDLER_STACK_SIZ	(4*19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #ifndef __ASSEMBLY__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /* Macros to enable and disable HW exceptions in the MSR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /* Define MSR enable bit for HW exceptions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define HWEX_MSR_BIT (1 << 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define __enable_hw_exceptions()					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	__asm__ __volatile__ ("	msrset	r0, %0;				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 				nop;"					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 				:					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 				: "i" (HWEX_MSR_BIT)			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 				: "memory")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define __disable_hw_exceptions()					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 	__asm__ __volatile__ ("	msrclr r0, %0;				\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 				nop;"					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 				:					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 				: "i" (HWEX_MSR_BIT)			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 				: "memory")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #else /* !CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define __enable_hw_exceptions()					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	__asm__ __volatile__ ("						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 				mfs	r12, rmsr;			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 				nop;					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 				ori	r12, r12, %0;			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 				mts	rmsr, r12;			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 				nop;"					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 				:					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) 				: "i" (HWEX_MSR_BIT)			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 				: "memory", "r12")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define __disable_hw_exceptions()					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	__asm__ __volatile__ ("						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 				mfs	r12, rmsr;			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 				nop;					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 				andi	r12, r12, ~%0;			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 				mts	rmsr, r12;			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 				nop;"					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 				:					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 				: "i" (HWEX_MSR_BIT)			\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 				: "memory", "r12")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #endif /* CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) asmlinkage void full_exception(struct pt_regs *regs, unsigned int type,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 							int fsr, int addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) asmlinkage void sw_exception(struct pt_regs *regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) void die(const char *str, struct pt_regs *fp, long err);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #endif /*__ASSEMBLY__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #endif /* __KERNEL__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #endif /* _ASM_MICROBLAZE_EXCEPTIONS_H */