^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Copyright (C) 2006 Atmark Techno, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #ifndef _ASM_MICROBLAZE_DMA_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) #define _ASM_MICROBLAZE_DMA_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #ifndef CONFIG_MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) /* we don't have dma address limit. define it as zero to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * unlimited. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define MAX_DMA_ADDRESS (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /* Virtual address corresponding to last available physical memory address. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define MAX_DMA_ADDRESS (CONFIG_KERNEL_START + memory_size - 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #ifdef CONFIG_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) extern int isa_dma_bridge_buggy;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define isa_dma_bridge_buggy (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #endif /* _ASM_MICROBLAZE_DMA_H */