^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Generic support for queying CPU info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 2007-2009 PetaLogix
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2007 John Williams <jwilliams@itee.uq.edu.au>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef _ASM_MICROBLAZE_CPUINFO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define _ASM_MICROBLAZE_CPUINFO_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/of.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) /* CPU Version and FPGA Family code conversion table type */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) struct cpu_ver_key {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) const char *s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) const unsigned k;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) extern const struct cpu_ver_key cpu_ver_lookup[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) struct family_string_key {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) const char *s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) const unsigned k;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) extern const struct family_string_key family_string_lookup[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) struct cpuinfo {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) /* Core CPU configuration */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) u32 use_instr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) u32 use_mult;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) u32 use_fpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) u32 use_exc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) u32 ver_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) u32 mmu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) u32 mmu_privins;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) u32 endian;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* CPU caches */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) u32 use_icache;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) u32 icache_tagbits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) u32 icache_write;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) u32 icache_line_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) u32 icache_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) unsigned long icache_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) unsigned long icache_high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) u32 use_dcache;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) u32 dcache_tagbits;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) u32 dcache_write;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) u32 dcache_line_length;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) u32 dcache_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) u32 dcache_wb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) unsigned long dcache_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) unsigned long dcache_high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) /* Bus connections */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) u32 use_dopb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) u32 use_iopb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) u32 use_dlmb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) u32 use_ilmb;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) u32 num_fsl;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) /* CPU interrupt line info */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) u32 irq_edge;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) u32 irq_positive;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) u32 area_optimised;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* HW debug support */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) u32 hw_debug;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) u32 num_pc_brk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) u32 num_rd_brk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) u32 num_wr_brk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) u32 cpu_clock_freq; /* store real freq of cpu */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /* FPGA family */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) u32 fpga_family_code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) /* User define */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) u32 pvr_user1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) u32 pvr_user2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) extern struct cpuinfo cpuinfo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /* fwd declarations of the various CPUinfo populators */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) void setup_cpuinfo(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) void setup_cpuinfo_clk(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) void set_cpuinfo_static(struct cpuinfo *ci, struct device_node *cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) static inline unsigned int fcpu(struct device_node *cpu, char *n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) u32 val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) of_property_read_u32(cpu, n, &val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) return val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #endif /* _ASM_MICROBLAZE_CPUINFO_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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