Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * fp_movem.S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * Copyright Roman Zippel, 1997.  All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * Redistribution and use in source and binary forms, with or without
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  * modification, are permitted provided that the following conditions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * are met:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  * 1. Redistributions of source code must retain the above copyright
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  *    notice, and the entire permission notice in its entirety,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  *    including the disclaimer of warranties.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  * 2. Redistributions in binary form must reproduce the above copyright
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  *    notice, this list of conditions and the following disclaimer in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  *    documentation and/or other materials provided with the distribution.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15)  * 3. The name of the author may not be used to endorse or promote
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16)  *    products derived from this software without specific prior
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  *    written permission.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  * ALTERNATIVELY, this product may be distributed under the terms of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20)  * the GNU General Public License, in which case the provisions of the GPL are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21)  * required INSTEAD OF the above restrictions.  (This clause is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22)  * necessary due to a potential bad interaction between the GPL and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23)  * the restrictions contained in a BSD-style copyright.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25)  * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26)  * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27)  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28)  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29)  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30)  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31)  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33)  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34)  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35)  * OF THE POSSIBILITY OF SUCH DAMAGE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #include "fp_emu.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #include "fp_decode.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) | set flags for decode macros for fmovem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) do_fmovem=1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) 	.globl	fp_fmovem_fp, fp_fmovem_cr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) | %d1 contains the mask and count of the register list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) | for other register usage see fp_decode.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) fp_fmovem_fp:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 	printf	PDECODE,"fmovem.x "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) 	| get register list and count them
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) 	btst	#11,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) 	jne	1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 	bfextu	%d2{#24,#8},%d0		| static register list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) 	jra	2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 1:	bfextu	%d2{#25,#3},%d0		| dynamic register list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) 	jsr	fp_get_data_reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) 2:	move.l	%d0,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	swap	%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 	jra	2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 1:	addq.w	#1,%d1			| count the # of registers in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 2:	lsr.b	#1,%d0			| register list and keep it in %d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	jcs	1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	jne	2b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	printf	PDECODE,"#%08x",1,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) #ifdef FPU_EMU_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) 	btst	#12,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) 	jne	1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) 	printf	PDECODE,"-"		| decremental move
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) 	jra	2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) 1:	printf	PDECODE,"+"		| incremental move
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) 2:	btst	#13,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) 	jeq	1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 	printf	PDECODE,"->"		| fpu -> cpu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) 	jra	2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) 1:	printf	PDECODE,"<-"		| fpu <- cpu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	| decode address mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	fp_decode_addr_mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	.long	fp_ill, fp_ill
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 	.long	fpr_indirect, fpr_postinc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 	.long	fpr_predecr, fpr_disp16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) 	.long	fpr_extmode0, fpr_extmode1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	| addressing mode: address register indirect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) fpr_indirect:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	fp_mode_addr_indirect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	jra	fpr_do_movem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	| addressing mode: address register indirect with postincrement
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) fpr_postinc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	fp_mode_addr_indirect_postinc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	jra	fpr_do_movem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) fpr_predecr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	fp_mode_addr_indirect_predec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	jra	fpr_do_movem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	| addressing mode: address register/programm counter indirect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 	|		   with 16bit displacement
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) fpr_disp16:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 	fp_mode_addr_indirect_disp16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) 	jra	fpr_do_movem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) fpr_extmode0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 	fp_mode_addr_indirect_extmode0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	jra	fpr_do_movem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) fpr_extmode1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	fp_decode_addr_reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 	jmp	([0f:w,%pc,%d0*4])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	.align	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	.long	fpr_absolute_short, fpr_absolute_long
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	.long	fpr_disp16, fpr_extmode0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	.long	fp_ill, fp_ill
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	.long	fp_ill, fp_ill
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) fpr_absolute_short:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	fp_mode_abs_short
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	jra	fpr_do_movem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) fpr_absolute_long:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 	fp_mode_abs_long
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) |	jra	fpr_do_movem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) fpr_do_movem:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	swap	%d1			| get fpu register list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	lea	(FPD_FPREG,FPDATA),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	moveq	#12,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	btst	#12,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	jne	1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	lea	(-12,%a1,%d0*8),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	neg.l	%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 1:	btst	#13,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	jne	4f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	| move register from memory into fpu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	jra	3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 1:	printf	PMOVEM,"(%p>%p)",2,%a0,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	getuser.l (%a0)+,%d2,fp_err_ua1,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	lsr.l	#8,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	lsr.l	#7,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	lsr.w	#1,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	move.l	%d2,(%a1)+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	getuser.l (%a0)+,%d2,fp_err_ua1,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	move.l	%d2,(%a1)+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	getuser.l (%a0),%d2,fp_err_ua1,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	move.l	%d2,(%a1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	subq.l	#8,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	subq.l	#8,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 	add.l	%d0,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 2:	add.l	%d0,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 3:	lsl.b	#1,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	jcs	1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	jne	2b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	jra	5f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	| move register from fpu into memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 1:	printf	PMOVEM,"(%p>%p)",2,%a1,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	move.l	(%a1)+,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	lsl.w	#1,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	lsl.l	#7,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 	lsl.l	#8,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	putuser.l %d2,(%a0)+,fp_err_ua1,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	move.l	(%a1)+,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 	putuser.l %d2,(%a0)+,fp_err_ua1,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 	move.l	(%a1),%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 	putuser.l %d2,(%a0),fp_err_ua1,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 	subq.l	#8,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	subq.l	#8,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	add.l	%d0,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 2:	add.l	%d0,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 4:	lsl.b	#1,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	jcs	1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	jne	2b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	printf	PDECODE,"\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 	lea	(FPD_FPREG,FPDATA),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 	printf	PMOVEM,"fp:"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 	printx	PMOVEM,%a0@(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 	printx	PMOVEM,%a0@(12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	printf	PMOVEM,"\n   "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	printx	PMOVEM,%a0@(24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	printx	PMOVEM,%a0@(36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 	printf	PMOVEM,"\n   "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 	printx	PMOVEM,%a0@(48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 	printx	PMOVEM,%a0@(60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	printf	PMOVEM,"\n   "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 	printx	PMOVEM,%a0@(72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	printx	PMOVEM,%a0@(84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	printf	PMOVEM,"\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	jra	fp_end
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) | set flags for decode macros for fmovem control register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) do_fmovem=1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) do_fmovem_cr=1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) fp_fmovem_cr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	printf	PDECODE,"fmovem.cr "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	| get register list and count them
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 	bfextu	%d2{#19,#3},%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 	move.l	%d0,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 	swap	%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 	jra	2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 1:	addq.w	#1,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 2:	lsr.l	#1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	jcs	1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	jne	2b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	printf	PDECODE,"#%08x",1,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) #ifdef FPU_EMU_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	btst	#13,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 	jeq	1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 	printf	PDECODE,"->"		| fpu -> cpu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 	jra	2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 1:	printf	PDECODE,"<-"		| fpu <- cpu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 	| decode address mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 	fp_decode_addr_mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 	.long	fpc_data, fpc_addr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 	.long	fpc_indirect, fpc_postinc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	.long	fpc_predecr, fpc_disp16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	.long	fpc_extmode0, fpc_extmode1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) fpc_data:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	fp_mode_data_direct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	move.w	%d0,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	bfffo	%d2{#19,#3},%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	sub.w	#19,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	lea	(FPD_FPCR,FPDATA,%d0.w*4),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 	btst	#13,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	jne	1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	move.w	%d1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 	jsr	fp_get_data_reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) 	move.l	%d0,(%a1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) 	jra	fpc_movem_fin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) 1:	move.l	(%a1),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) 	jsr	fp_put_data_reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) 	jra	fpc_movem_fin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) fpc_addr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) 	fp_decode_addr_reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 	printf	PDECODE,"a%d",1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	btst	#13,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) 	jne	1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	jsr	fp_get_addr_reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 	move.l	%a0,(FPD_FPIAR,FPDATA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) 	jra	fpc_movem_fin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 1:	move.l	(FPD_FPIAR,FPDATA),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) 	jsr	fp_put_addr_reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) 	jra	fpc_movem_fin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) fpc_indirect:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	fp_mode_addr_indirect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) 	jra	fpc_do_movem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) fpc_postinc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	fp_mode_addr_indirect_postinc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) 	jra	fpc_do_movem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) fpc_predecr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	fp_mode_addr_indirect_predec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) 	jra	fpc_do_movem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) fpc_disp16:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	fp_mode_addr_indirect_disp16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) 	jra	fpc_do_movem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) fpc_extmode0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	fp_mode_addr_indirect_extmode0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 	jra	fpc_do_movem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) fpc_extmode1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	fp_decode_addr_reg
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) 	jmp	([0f:w,%pc,%d0*4])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 	.align	4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) 	.long	fpc_absolute_short, fpc_absolute_long
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	.long	fpc_disp16, fpc_extmode0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 	.long	fpc_immediate, fp_ill
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	.long	fp_ill, fp_ill
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) fpc_absolute_short:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 	fp_mode_abs_short
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	jra	fpc_do_movem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) fpc_absolute_long:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 	fp_mode_abs_long
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) 	jra	fpc_do_movem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) fpc_immediate:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) 	fp_get_pc %a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) 	lea	(%a0,%d1.w*4),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 	fp_put_pc %a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) 	printf	PDECODE,"#imm"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) |	jra	fpc_do_movem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	swap	%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	lsl.l	#5,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	lea	(FPD_FPCR,FPDATA),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	jra	3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 1:	move.l	%d0,(%a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 2:	addq.l	#4,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 3:	lsl.b	#1,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	jcs	1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	jne	2b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	jra	fpc_movem_fin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) fpc_do_movem:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 	swap	%d1			| get fpu register list
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	lsl.l	#5,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 	lea	(FPD_FPCR,FPDATA),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 1:	btst	#13,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	jne	4f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	| move register from memory into fpu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	jra	3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 1:	printf	PMOVEM,"(%p>%p)",2,%a0,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	getuser.l (%a0)+,%d0,fp_err_ua1,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	move.l	%d0,(%a1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 2:	addq.l	#4,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 3:	lsl.b	#1,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	jcs	1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 	jne	2b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	jra	fpc_movem_fin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	| move register from fpu into memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 1:	printf	PMOVEM,"(%p>%p)",2,%a1,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) 	move.l	(%a1),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 	putuser.l %d0,(%a0)+,fp_err_ua1,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) 2:	addq.l	#4,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 4:	lsl.b	#1,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) 	jcs	1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) 	jne	2b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) fpc_movem_fin:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) 	and.l	#0x0000fff0,(FPD_FPCR,FPDATA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) 	and.l	#0x0ffffff8,(FPD_FPSR,FPDATA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) 	move.l	(FPD_FPCR,FPDATA),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) 	lsr.l	#4,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) 	moveq	#3,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) 	and.l	%d0,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) 	move.w	%d1,(FPD_RND,FPDATA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) 	lsr.l	#2,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) 	moveq	#3,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) 	and.l	%d0,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) 	move.w	%d1,(FPD_PREC,FPDATA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) 	printf	PDECODE,"\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) 	printf	PMOVEM,"fpcr : %08x\n",1,FPDATA@(FPD_FPCR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) 	printf	PMOVEM,"fpsr : %08x\n",1,FPDATA@(FPD_FPSR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) 	printf	PMOVEM,"fpiar: %08x\n",1,FPDATA@(FPD_FPIAR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) 	clr.l	%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) 	move.w	(FPD_PREC,FPDATA),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) 	printf	PMOVEM,"prec : %04x\n",1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) 	move.w	(FPD_RND,FPDATA),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) 	printf	PMOVEM,"rnd  : %04x\n",1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) 	jra	fp_end