^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * 6522 Versatile Interface Adapter (VIA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * There are two of these on the Mac II. Some IRQs are vectored
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * via them as are assorted bits and bobs - eg RTC, ADB.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * CSA: Motorola seems to have removed documentation on the 6522 from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * their web site; try
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * http://nerini.drf.com/vectrex/other/text/chips/6522/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * http://www.zymurgy.net/classic/vic20/vicdet1.htm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * http://193.23.168.87/mikro_laborversuche/via_iobaustein/via6522_1.html
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * for info. A full-text web search on 6522 AND VIA will probably also
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * net some usefulness. <cananian@alumni.princeton.edu> 20apr1999
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * Additional data is here (the SY6522 was used in the Mac II etc):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * http://www.6502.org/documents/datasheets/synertek/synertek_sy6522.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * http://www.6502.org/documents/datasheets/synertek/synertek_sy6522_programming_reference.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * PRAM/RTC access algorithms are from the NetBSD RTC toolkit version 1.08b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * by Erik Vogan and adapted to Linux by Joshua M. Thompson (funaho@jurai.org)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/clocksource.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <asm/macintosh.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <asm/macints.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <asm/mac_via.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <asm/mac_psc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <asm/mac_oss.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) volatile __u8 *via1, *via2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) int rbv_present;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) int via_alt_mapping;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) EXPORT_SYMBOL(via_alt_mapping);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static __u8 rbv_clear;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * Globals for accessing the VIA chip registers without having to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * check if we're hitting a real VIA or an RBV. Normally you could
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * just hit the combined register (ie, vIER|rIER) but that seems to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * break on AV Macs...probably because they actually decode more than
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * eight address bits. Why can't Apple engineers at least be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * _consistently_ lazy? - 1999-05-21 (jmt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static int gIER,gIFR,gBufA,gBufB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * On Macs with a genuine VIA chip there is no way to mask an individual slot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * interrupt. This limitation also seems to apply to VIA clone logic cores in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * Quadra-like ASICs. (RBV and OSS machines don't have this limitation.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * We used to fake it by configuring the relevant VIA pin as an output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * (to mask the interrupt) or input (to unmask). That scheme did not work on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * (at least) the Quadra 700. A NuBus card's /NMRQ signal is an open-collector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * circuit (see Designing Cards and Drivers for Macintosh II and Macintosh SE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * p. 10-11 etc) but VIA outputs are not (see datasheet).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * Driving these outputs high must cause the VIA to source current and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * card to sink current when it asserts /NMRQ. Current will flow but the pin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * voltage is uncertain and so the /NMRQ condition may still cause a transition
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * at the VIA2 CA1 input (which explains the lost interrupts). A side effect
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * is that a disabled slot IRQ can never be tested as pending or not.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * Driving these outputs low doesn't work either. All the slot /NMRQ lines are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * (active low) OR'd together to generate the CA1 (aka "SLOTS") interrupt (see
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * The Guide To Macintosh Family Hardware, 2nd edition p. 167). If we drive a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * disabled /NMRQ line low, the falling edge immediately triggers a CA1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * interrupt and all slot interrupts after that will generate no transition
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * and therefore no interrupt, even after being re-enabled.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * So we make the VIA port A I/O lines inputs and use nubus_disabled to keep
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * track of their states. When any slot IRQ becomes disabled we mask the CA1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) * umbrella interrupt. Only when all slot IRQs become enabled do we unmask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * the CA1 interrupt. It must remain enabled even when cards have no interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * handler registered. Drivers must therefore disable a slot interrupt at the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * device before they call free_irq (like shared and autovector interrupts).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * There is also a related problem when MacOS is used to boot Linux. A network
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * card brought up by a MacOS driver may raise an interrupt while Linux boots.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * This can be fatal since it can't be handled until the right driver loads
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * (if such a driver exists at all). Apparently related to this hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * limitation, "Designing Cards and Drivers", p. 9-8, says that a slot
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * interrupt with no driver would crash MacOS (the book was written before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * the appearance of Macs with RBV or OSS).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) static u8 nubus_disabled;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) void via_debug_dump(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static void via_nubus_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * Initialize the VIAs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * First we figure out where they actually _are_ as well as what type of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * VIA we have for VIA2 (it could be a real VIA or an RBV or even an OSS.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * Then we pretty much clear them out and disable all IRQ sources.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) void __init via_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) via1 = (void *)VIA1_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) pr_debug("VIA1 detected at %p\n", via1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) if (oss_present) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) via2 = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) rbv_present = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) switch (macintosh_config->via_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) /* IIci, IIsi, IIvx, IIvi (P6xx), LC series */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) case MAC_VIA_IICI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) via2 = (void *)RBV_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) pr_debug("VIA2 (RBV) detected at %p\n", via2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) rbv_present = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) if (macintosh_config->ident == MAC_MODEL_LCIII) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) rbv_clear = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) /* on most RBVs (& unlike the VIAs), you */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) /* need to set bit 7 when you write to IFR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) /* in order for your clear to occur. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) rbv_clear = 0x80;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) gIER = rIER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) gIFR = rIFR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) gBufA = rSIFR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) gBufB = rBufB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) /* Quadra and early MacIIs agree on the VIA locations */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) case MAC_VIA_QUADRA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) case MAC_VIA_II:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) via2 = (void *) VIA2_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) pr_debug("VIA2 detected at %p\n", via2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) rbv_present = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) rbv_clear = 0x00;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) gIER = vIER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) gIFR = vIFR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) gBufA = vBufA;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) gBufB = vBufB;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) panic("UNKNOWN VIA TYPE");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #ifdef DEBUG_VIA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) via_debug_dump();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) * Shut down all IRQ sources, reset the timers, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) * kill the timer latch on VIA1.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) via1[vIER] = 0x7F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) via1[vIFR] = 0x7F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) via1[vT1LL] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) via1[vT1LH] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) via1[vT1CL] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) via1[vT1CH] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) via1[vT2CL] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) via1[vT2CH] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) via1[vACR] &= ~0xC0; /* setup T1 timer with no PB7 output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) via1[vACR] &= ~0x03; /* disable port A & B latches */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) * SE/30: disable video IRQ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) if (macintosh_config->ident == MAC_MODEL_SE30) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) via1[vDirB] |= 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) via1[vBufB] |= 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) switch (macintosh_config->adb_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) case MAC_ADB_IOP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) case MAC_ADB_II:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) case MAC_ADB_PB1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) * Set the RTC bits to a known state: all lines to outputs and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) * RTC disabled (yes that's 0 to enable and 1 to disable).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) via1[vDirB] |= VIA1B_vRTCEnb | VIA1B_vRTCClk | VIA1B_vRTCData;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) via1[vBufB] |= VIA1B_vRTCEnb | VIA1B_vRTCClk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) /* Everything below this point is VIA2/RBV only... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) if (oss_present)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) if ((macintosh_config->via_type == MAC_VIA_QUADRA) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) (macintosh_config->adb_type != MAC_ADB_PB1) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) (macintosh_config->adb_type != MAC_ADB_PB2) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) (macintosh_config->ident != MAC_MODEL_C660) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) (macintosh_config->ident != MAC_MODEL_Q840)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) via_alt_mapping = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) via1[vDirB] |= 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) via1[vBufB] &= ~0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) via_alt_mapping = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) * Now initialize VIA2. For RBV we just kill all interrupts;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) * for a regular VIA we also reset the timers and stuff.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) via2[gIER] = 0x7F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) via2[gIFR] = 0x7F | rbv_clear;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) if (!rbv_present) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) via2[vT1LL] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) via2[vT1LH] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) via2[vT1CL] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) via2[vT1CH] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) via2[vT2CL] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) via2[vT2CH] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) via2[vACR] &= ~0xC0; /* setup T1 timer with no PB7 output */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) via2[vACR] &= ~0x03; /* disable port A & B latches */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) via_nubus_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) /* Everything below this point is VIA2 only... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) if (rbv_present)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) * Set vPCR for control line interrupts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) * CA1 (SLOTS IRQ), CB1 (ASC IRQ): negative edge trigger.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) * Macs with ESP SCSI have a negative edge triggered SCSI interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) * Testing reveals that PowerBooks do too. However, the SE/30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) * schematic diagram shows an active high NCR5380 IRQ line.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) pr_debug("VIA2 vPCR is 0x%02X\n", via2[vPCR]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) if (macintosh_config->via_type == MAC_VIA_II) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) /* CA2 (SCSI DRQ), CB2 (SCSI IRQ): indep. input, pos. edge */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) via2[vPCR] = 0x66;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) /* CA2 (SCSI DRQ), CB2 (SCSI IRQ): indep. input, neg. edge */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) via2[vPCR] = 0x22;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) * Debugging dump, used in various places to see what's going on.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) void via_debug_dump(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) printk(KERN_DEBUG "VIA1: DDRA = 0x%02X DDRB = 0x%02X ACR = 0x%02X\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) (uint) via1[vDirA], (uint) via1[vDirB], (uint) via1[vACR]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) printk(KERN_DEBUG " PCR = 0x%02X IFR = 0x%02X IER = 0x%02X\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) (uint) via1[vPCR], (uint) via1[vIFR], (uint) via1[vIER]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) if (!via2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) if (rbv_present) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) printk(KERN_DEBUG "VIA2: IFR = 0x%02X IER = 0x%02X\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) (uint) via2[rIFR], (uint) via2[rIER]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) printk(KERN_DEBUG " SIFR = 0x%02X SIER = 0x%02X\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) (uint) via2[rSIFR], (uint) via2[rSIER]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) printk(KERN_DEBUG "VIA2: DDRA = 0x%02X DDRB = 0x%02X ACR = 0x%02X\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) (uint) via2[vDirA], (uint) via2[vDirB],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) (uint) via2[vACR]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) printk(KERN_DEBUG " PCR = 0x%02X IFR = 0x%02X IER = 0x%02X\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) (uint) via2[vPCR],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) (uint) via2[vIFR], (uint) via2[vIER]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) * Flush the L2 cache on Macs that have it by flipping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) * the system into 24-bit mode for an instant.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) void via_l2_flush(int writeback)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) via2[gBufB] &= ~VIA2B_vMode32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) via2[gBufB] |= VIA2B_vMode32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) * Return the status of the L2 cache on a IIci
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) int via_get_cache_disable(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) /* Safeguard against being called accidentally */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) if (!via2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) printk(KERN_ERR "via_get_cache_disable called on a non-VIA machine!\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) return (int) via2[gBufB] & VIA2B_vCDis;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) * Initialize VIA2 for Nubus access
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) static void __init via_nubus_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) /* unlock nubus transactions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) if ((macintosh_config->adb_type != MAC_ADB_PB1) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) (macintosh_config->adb_type != MAC_ADB_PB2)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) /* set the line to be an output on non-RBV machines */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) if (!rbv_present)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) via2[vDirB] |= 0x02;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) /* this seems to be an ADB bit on PMU machines */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) /* according to MkLinux. -- jmt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) via2[gBufB] |= 0x02;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) * Disable the slot interrupts. On some hardware that's not possible.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) * On some hardware it's unclear what all of these I/O lines do.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) switch (macintosh_config->via_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) case MAC_VIA_II:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) case MAC_VIA_QUADRA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) pr_debug("VIA2 vDirA is 0x%02X\n", via2[vDirA]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) case MAC_VIA_IICI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) /* RBV. Disable all the slot interrupts. SIER works like IER. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) via2[rSIER] = 0x7F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) void via_nubus_irq_startup(int irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) int irq_idx = IRQ_IDX(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) switch (macintosh_config->via_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) case MAC_VIA_II:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) case MAC_VIA_QUADRA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) /* Make the port A line an input. Probably redundant. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (macintosh_config->via_type == MAC_VIA_II) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) /* The top two bits are RAM size outputs. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) via2[vDirA] &= 0xC0 | ~(1 << irq_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) /* Allow NuBus slots 9 through F. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) via2[vDirA] &= 0x80 | ~(1 << irq_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) case MAC_VIA_IICI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) via_irq_enable(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) void via_nubus_irq_shutdown(int irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) switch (macintosh_config->via_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) case MAC_VIA_II:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) case MAC_VIA_QUADRA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) /* Ensure that the umbrella CA1 interrupt remains enabled. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) via_irq_enable(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) case MAC_VIA_IICI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) via_irq_disable(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) * The generic VIA interrupt routines (shamelessly stolen from Alan Cox's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) * via6522.c :-), disable/pending masks added.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) #define VIA_TIMER_1_INT BIT(6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) void via1_irq(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) int irq_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) unsigned char irq_bit, events;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) events = via1[vIFR] & via1[vIER] & 0x7F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) if (!events)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) irq_num = IRQ_MAC_TIMER_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) irq_bit = VIA_TIMER_1_INT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) if (events & irq_bit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) via1[vIFR] = irq_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) generic_handle_irq(irq_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) events &= ~irq_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) if (!events)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) irq_num = VIA1_SOURCE_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) irq_bit = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) if (events & irq_bit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) via1[vIFR] = irq_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) generic_handle_irq(irq_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) ++irq_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) irq_bit <<= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) } while (events >= irq_bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) static void via2_irq(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) int irq_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) unsigned char irq_bit, events;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) events = via2[gIFR] & via2[gIER] & 0x7F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) if (!events)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) irq_num = VIA2_SOURCE_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) irq_bit = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) if (events & irq_bit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) via2[gIFR] = irq_bit | rbv_clear;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) generic_handle_irq(irq_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) ++irq_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) irq_bit <<= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) } while (events >= irq_bit);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) * Dispatch Nubus interrupts. We are called as a secondary dispatch by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) * VIA2 dispatcher as a fast interrupt handler.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) static void via_nubus_irq(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) int slot_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) unsigned char slot_bit, events;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) events = ~via2[gBufA] & 0x7F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) if (rbv_present)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) events &= via2[rSIER];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) events &= ~via2[vDirA];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) if (!events)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) slot_irq = IRQ_NUBUS_F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) slot_bit = 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) if (events & slot_bit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) events &= ~slot_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) generic_handle_irq(slot_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) --slot_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) slot_bit >>= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) } while (events);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) /* clear the CA1 interrupt and make certain there's no more. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) via2[gIFR] = 0x02 | rbv_clear;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) events = ~via2[gBufA] & 0x7F;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) if (rbv_present)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) events &= via2[rSIER];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) events &= ~via2[vDirA];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) } while (events);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) * Register the interrupt dispatchers for VIA or RBV machines only.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) void __init via_register_interrupts(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) if (via_alt_mapping) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) /* software interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) irq_set_chained_handler(IRQ_AUTO_1, via1_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) /* via1 interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) irq_set_chained_handler(IRQ_AUTO_6, via1_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) irq_set_chained_handler(IRQ_AUTO_1, via1_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) irq_set_chained_handler(IRQ_AUTO_2, via2_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) irq_set_chained_handler(IRQ_MAC_NUBUS, via_nubus_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) void via_irq_enable(int irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) int irq_src = IRQ_SRC(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) int irq_idx = IRQ_IDX(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) if (irq_src == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) via1[vIER] = IER_SET_BIT(irq_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) } else if (irq_src == 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) if (irq != IRQ_MAC_NUBUS || nubus_disabled == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) via2[gIER] = IER_SET_BIT(irq_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) } else if (irq_src == 7) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) switch (macintosh_config->via_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) case MAC_VIA_II:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) case MAC_VIA_QUADRA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) nubus_disabled &= ~(1 << irq_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) /* Enable the CA1 interrupt when no slot is disabled. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) if (!nubus_disabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) via2[gIER] = IER_SET_BIT(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) case MAC_VIA_IICI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) /* On RBV, enable the slot interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) * SIER works like IER.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) via2[rSIER] = IER_SET_BIT(irq_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) void via_irq_disable(int irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) int irq_src = IRQ_SRC(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) int irq_idx = IRQ_IDX(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) if (irq_src == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) via1[vIER] = IER_CLR_BIT(irq_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) } else if (irq_src == 2) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) via2[gIER] = IER_CLR_BIT(irq_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) } else if (irq_src == 7) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) switch (macintosh_config->via_type) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) case MAC_VIA_II:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) case MAC_VIA_QUADRA:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) nubus_disabled |= 1 << irq_idx;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) if (nubus_disabled)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) via2[gIER] = IER_CLR_BIT(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) case MAC_VIA_IICI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) via2[rSIER] = IER_CLR_BIT(irq_idx);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) void via1_set_head(int head)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) if (head == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) via1[vBufA] &= ~VIA1A_vHeadSel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) via1[vBufA] |= VIA1A_vHeadSel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) EXPORT_SYMBOL(via1_set_head);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) int via2_scsi_drq_pending(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) return via2[gIFR] & (1 << IRQ_IDX(IRQ_MAC_SCSIDRQ));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) EXPORT_SYMBOL(via2_scsi_drq_pending);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) /* timer and clock source */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) #define VIA_CLOCK_FREQ 783360 /* VIA "phase 2" clock in Hz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) #define VIA_TIMER_CYCLES (VIA_CLOCK_FREQ / HZ) /* clock cycles per jiffy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) #define VIA_TC (VIA_TIMER_CYCLES - 2) /* including 0 and -1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) #define VIA_TC_LOW (VIA_TC & 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) #define VIA_TC_HIGH (VIA_TC >> 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) static u64 mac_read_clk(struct clocksource *cs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) static struct clocksource mac_clk = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) .name = "via1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) .rating = 250,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) .read = mac_read_clk,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) .mask = CLOCKSOURCE_MASK(32),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) .flags = CLOCK_SOURCE_IS_CONTINUOUS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) static u32 clk_total, clk_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) static irqreturn_t via_timer_handler(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) irq_handler_t timer_routine = dev_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) clk_total += VIA_TIMER_CYCLES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) clk_offset = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) timer_routine(0, NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) void __init via_init_clock(irq_handler_t timer_routine)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) if (request_irq(IRQ_MAC_TIMER_1, via_timer_handler, IRQF_TIMER, "timer",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) timer_routine)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) pr_err("Couldn't register %s interrupt\n", "timer");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) via1[vT1LL] = VIA_TC_LOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) via1[vT1LH] = VIA_TC_HIGH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) via1[vT1CL] = VIA_TC_LOW;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) via1[vT1CH] = VIA_TC_HIGH;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) via1[vACR] |= 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) clocksource_register_hz(&mac_clk, VIA_CLOCK_FREQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) static u64 mac_read_clk(struct clocksource *cs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) u8 count_high;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) u16 count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) u32 ticks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) * Timer counter wrap-around is detected with the timer interrupt flag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) * but reading the counter low byte (vT1CL) would reset the flag.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) * Also, accessing both counter registers is essentially a data race.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) * These problems are avoided by ignoring the low byte. Clock accuracy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) * is 256 times worse (error can reach 0.327 ms) but CPU overhead is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) * reduced by avoiding slow VIA register accesses.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) count_high = via1[vT1CH];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) if (count_high == 0xFF)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) count_high = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) if (count_high > 0 && (via1[vIFR] & VIA_TIMER_1_INT))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) clk_offset = VIA_TIMER_CYCLES;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) count = count_high << 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) ticks = VIA_TIMER_CYCLES - count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) ticks += clk_offset + clk_total;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) return ticks;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
3 Commits
0 Branches
0 Tags