^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Operating System Services (OSS) chip handling
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Written by Joshua M. Thompson (funaho@jurai.org)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * This chip is used in the IIfx in place of VIA #2. It acts like a fancy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * VIA chip with prorammable interrupt levels.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * 990502 (jmt) - Major rewrite for new interrupt architecture as well as some
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * recent insights into OSS operational details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * 990610 (jmt) - Now taking full advantage of the OSS. Interrupts are mapped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * to mostly match the A/UX interrupt scheme supported on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * VIA side. Also added support for enabling the ISM irq again
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * since we now have a functional IOP manager.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <asm/macintosh.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <asm/macints.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <asm/mac_via.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <asm/mac_oss.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) int oss_present;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) volatile struct mac_oss *oss;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * Initialize the OSS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) void __init oss_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) if (macintosh_config->ident != MAC_MODEL_IIFX)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) oss = (struct mac_oss *) OSS_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) pr_debug("OSS detected at %p", oss);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) oss_present = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /* Disable all interrupts. Unlike a VIA it looks like we */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) /* do this by setting the source's interrupt level to zero. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) for (i = 0; i < OSS_NUM_SOURCES; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) oss->irq_level[i] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * Handle OSS interrupts.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * XXX how do you clear a pending IRQ? is it even necessary?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static void oss_iopism_irq(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) generic_handle_irq(IRQ_MAC_ADB);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) static void oss_scsi_irq(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) generic_handle_irq(IRQ_MAC_SCSI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static void oss_nubus_irq(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) u16 events, irq_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) int irq_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) events = oss->irq_pending & OSS_IP_NUBUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) irq_num = NUBUS_SOURCE_BASE + 5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) irq_bit = OSS_IP_NUBUS5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (events & irq_bit) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) events &= ~irq_bit;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) generic_handle_irq(irq_num);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) --irq_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) irq_bit >>= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) } while (events);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) static void oss_iopscc_irq(struct irq_desc *desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) generic_handle_irq(IRQ_MAC_SCC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * Register the OSS and NuBus interrupt dispatchers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * This IRQ mapping is laid out with two things in mind: first, we try to keep
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * things on their own levels to avoid having to do double-dispatches. Second,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * the levels match as closely as possible the alternate IRQ mapping mode (aka
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * "A/UX mode") available on some VIA machines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define OSS_IRQLEV_IOPISM IRQ_AUTO_1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define OSS_IRQLEV_SCSI IRQ_AUTO_2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define OSS_IRQLEV_NUBUS IRQ_AUTO_3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define OSS_IRQLEV_IOPSCC IRQ_AUTO_4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define OSS_IRQLEV_VIA1 IRQ_AUTO_6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) void __init oss_register_interrupts(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) irq_set_chained_handler(OSS_IRQLEV_IOPISM, oss_iopism_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) irq_set_chained_handler(OSS_IRQLEV_SCSI, oss_scsi_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) irq_set_chained_handler(OSS_IRQLEV_NUBUS, oss_nubus_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) irq_set_chained_handler(OSS_IRQLEV_IOPSCC, oss_iopscc_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) irq_set_chained_handler(OSS_IRQLEV_VIA1, via1_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) /* OSS_VIA1 gets enabled here because it has no machspec interrupt. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) oss->irq_level[OSS_VIA1] = OSS_IRQLEV_VIA1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * Enable an OSS interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * It looks messy but it's rather straightforward. The switch() statement
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * just maps the machspec interrupt numbers to the right OSS interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * source (if the OSS handles that interrupt) and then sets the interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) * level for that source to nonzero, thus enabling the interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) void oss_irq_enable(int irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) switch(irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) case IRQ_MAC_SCC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) oss->irq_level[OSS_IOPSCC] = OSS_IRQLEV_IOPSCC;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) case IRQ_MAC_ADB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) oss->irq_level[OSS_IOPISM] = OSS_IRQLEV_IOPISM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) case IRQ_MAC_SCSI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) oss->irq_level[OSS_SCSI] = OSS_IRQLEV_SCSI;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) case IRQ_NUBUS_9:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) case IRQ_NUBUS_A:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) case IRQ_NUBUS_B:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) case IRQ_NUBUS_C:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) case IRQ_NUBUS_D:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) case IRQ_NUBUS_E:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) irq -= NUBUS_SOURCE_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) oss->irq_level[irq] = OSS_IRQLEV_NUBUS;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) if (IRQ_SRC(irq) == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) via_irq_enable(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) * Disable an OSS interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) * Same as above except we set the source's interrupt level to zero,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) * to disable the interrupt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) void oss_irq_disable(int irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) switch(irq) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) case IRQ_MAC_SCC:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) oss->irq_level[OSS_IOPSCC] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) case IRQ_MAC_ADB:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) oss->irq_level[OSS_IOPISM] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) case IRQ_MAC_SCSI:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) oss->irq_level[OSS_SCSI] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) case IRQ_NUBUS_9:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) case IRQ_NUBUS_A:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) case IRQ_NUBUS_B:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) case IRQ_NUBUS_C:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) case IRQ_NUBUS_D:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) case IRQ_NUBUS_E:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) irq -= NUBUS_SOURCE_BASE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) oss->irq_level[irq] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) if (IRQ_SRC(irq) == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) via_irq_disable(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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