^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Macintosh interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * General design:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * In contrary to the Amiga and Atari platforms, the Mac hardware seems to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * exclusively use the autovector interrupts (the 'generic level0-level7'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * interrupts with exception vectors 0x19-0x1f). The following interrupt levels
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * are used:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * 1 - VIA1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * - slot 0: one second interrupt (CA2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * - slot 1: VBlank (CA1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * - slot 2: ADB data ready (SR full)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * - slot 3: ADB data (CB2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * - slot 4: ADB clock (CB1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * - slot 5: timer 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * - slot 6: timer 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * - slot 7: status of IRQ; signals 'any enabled int.'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * 2 - VIA2 or RBV
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * - slot 0: SCSI DRQ (CA2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * - slot 1: NUBUS IRQ (CA1) need to read port A to find which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * - slot 2: /EXP IRQ (only on IIci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * - slot 3: SCSI IRQ (CB2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * - slot 4: ASC IRQ (CB1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * - slot 5: timer 2 (not on IIci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * - slot 6: timer 1 (not on IIci)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * - slot 7: status of IRQ; signals 'any enabled int.'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * Levels 3-6 vary by machine type. For VIA or RBV Macintoshes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * 3 - unused (?)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * 4 - SCC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * 5 - unused (?)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * [serial errors or special conditions seem to raise level 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * interrupts on some models (LC4xx?)]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * 6 - off switch (?)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * Machines with Quadra-like VIA hardware, except PSC and PMU machines, support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * an alternate interrupt mapping, as used by A/UX. It spreads ethernet and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * sound out to their own autovector IRQs and gives VIA1 a higher priority:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * 1 - unused (?)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * 3 - on-board SONIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * 5 - Apple Sound Chip (ASC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * 6 - VIA1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * For OSS Macintoshes (IIfx only), we apply an interrupt mapping similar to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * the Quadra (A/UX) mapping:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * 1 - ISM IOP (ADB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * 2 - SCSI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * 3 - NuBus
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) * 4 - SCC IOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * 6 - VIA1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * For PSC Macintoshes (660AV, 840AV):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * 3 - PSC level 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * - slot 0: MACE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * 4 - PSC level 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * - slot 1: SCC channel A interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * - slot 2: SCC channel B interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * - slot 3: MACE DMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * 5 - PSC level 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * 6 - PSC level 6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * Finally we have good 'ole level 7, the non-maskable interrupt:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * 7 - NMI (programmer's switch on the back of some Macs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) * Also RAM parity error on models which support it (IIc, IIfx?)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * The current interrupt logic looks something like this:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * - We install dispatchers for the autovector interrupts (1-7). These
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * dispatchers are responsible for querying the hardware (the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) * VIA/RBV/OSS/PSC chips) to determine the actual interrupt source. Using
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * this information a machspec interrupt number is generated by placing the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * index of the interrupt hardware into the low three bits and the original
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * autovector interrupt number in the upper 5 bits. The handlers for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * resulting machspec interrupt are then called.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * - Nubus is a special case because its interrupts are hidden behind two
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * layers of hardware. Nubus interrupts come in as index 1 on VIA #2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * which translates to IRQ number 17. In this spot we install _another_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) * dispatcher. This dispatcher finds the interrupting slot number (9-F) and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * then forms a new machspec interrupt number as above with the slot number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * minus 9 in the low three bits and the pseudo-level 7 in the upper five
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * bits. The handlers for this new machspec interrupt number are then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * called. This puts Nubus interrupts into the range 56-62.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * - The Baboon interrupts (used on some PowerBooks) are an even more special
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * case. They're hidden behind the Nubus slot $C interrupt thus adding a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * third layer of indirection. Why oh why did the Apple engineers do that?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #include <linux/sched/debug.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #include <asm/macintosh.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #include <asm/macints.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #include <asm/mac_via.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #include <asm/mac_psc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #include <asm/mac_oss.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #include <asm/mac_iop.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #include <asm/mac_baboon.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #include <asm/hwtest.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #include <asm/irq_regs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) extern void show_registers(struct pt_regs *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) irqreturn_t mac_nmi_handler(int, void *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) static unsigned int mac_irq_startup(struct irq_data *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) static void mac_irq_shutdown(struct irq_data *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) static struct irq_chip mac_irq_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) .name = "mac",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) .irq_enable = mac_irq_enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) .irq_disable = mac_irq_disable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) .irq_startup = mac_irq_startup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) .irq_shutdown = mac_irq_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) void __init mac_init_IRQ(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) m68k_setup_irq_controller(&mac_irq_chip, handle_simple_irq, IRQ_USER,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) NUM_MAC_SOURCES - IRQ_USER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) * Now register the handlers for the master IRQ handlers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) * at levels 1-7. Most of the work is done elsewhere.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (oss_present)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) oss_register_interrupts();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) via_register_interrupts();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) if (psc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) psc_register_interrupts();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) if (baboon_present)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) baboon_register_interrupts();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) iop_register_interrupts();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) if (request_irq(IRQ_AUTO_7, mac_nmi_handler, 0, "NMI",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) mac_nmi_handler))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) pr_err("Couldn't register NMI\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * mac_irq_enable - enable an interrupt source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) * mac_irq_disable - disable an interrupt source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) * These routines are just dispatchers to the VIA/OSS/PSC routines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) void mac_irq_enable(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) int irq = data->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) int irq_src = IRQ_SRC(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) switch(irq_src) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) case 7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) if (oss_present)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) oss_irq_enable(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) via_irq_enable(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) case 5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) case 6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) if (psc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) psc_irq_enable(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) else if (oss_present)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) oss_irq_enable(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) case 8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) if (baboon_present)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) baboon_irq_enable(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) void mac_irq_disable(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) int irq = data->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) int irq_src = IRQ_SRC(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) switch(irq_src) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) case 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) case 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) case 7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) if (oss_present)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) oss_irq_disable(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) via_irq_disable(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) case 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) case 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) case 5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) case 6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) if (psc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) psc_irq_disable(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) else if (oss_present)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) oss_irq_disable(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) case 8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) if (baboon_present)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) baboon_irq_disable(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) static unsigned int mac_irq_startup(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) int irq = data->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) if (IRQ_SRC(irq) == 7 && !oss_present)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) via_nubus_irq_startup(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) mac_irq_enable(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) static void mac_irq_shutdown(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) int irq = data->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) if (IRQ_SRC(irq) == 7 && !oss_present)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) via_nubus_irq_shutdown(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) mac_irq_disable(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) static volatile int in_nmi;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) irqreturn_t mac_nmi_handler(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) if (in_nmi)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) in_nmi = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) pr_info("Non-Maskable Interrupt\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) show_registers(get_irq_regs());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) in_nmi = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) }
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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