^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* libgcc1 routines for 68000 w/o floating-point hardware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) Copyright (C) 1994, 1996, 1997, 1998 Free Software Foundation, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) This file is part of GNU CC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) GNU CC is free software; you can redistribute it and/or modify it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) under the terms of the GNU General Public License as published by the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) Free Software Foundation; either version 2, or (at your option) any
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) later version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) In addition to the permissions in the GNU General Public License, the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) Free Software Foundation gives you unlimited permission to link the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) compiled version of this file with other programs, and to distribute
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) those programs without any restriction coming from the use of this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) file. (The General Public License restrictions do apply in other
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) respects; for example, they cover modification of the file, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) distribution when not linked into another program.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) This file is distributed in the hope that it will be useful, but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) WITHOUT ANY WARRANTY; without even the implied warranty of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) General Public License for more details. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) /* As a special exception, if you link this library with files
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) compiled with GCC to produce an executable, this does not cause
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) the resulting executable to be covered by the GNU General Public License.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) This exception does not however invalidate any other reasons why
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) the executable file might be covered by the GNU General Public License. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /* Use this one for any 680x0; assumes no floating point hardware.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) The trailing " '" appearing on some lines is for ANSI preprocessors. Yuk.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) Some of this code comes from MINIX, via the folks at ericsson.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) D. V. Henkel-Wallace (gumby@cygnus.com) Fete Bastille, 1992
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <asm/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) /* These are predefined by new versions of GNU cpp. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #ifndef __USER_LABEL_PREFIX__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define __USER_LABEL_PREFIX__ _
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #ifndef __REGISTER_PREFIX__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define __REGISTER_PREFIX__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #ifndef __IMMEDIATE_PREFIX__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define __IMMEDIATE_PREFIX__ #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) /* ANSI concatenation macros. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define CONCAT1(a, b) CONCAT2(a, b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define CONCAT2(a, b) a ## b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) /* Use the right prefix for global labels. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define SYM(x) CONCAT1 (__USER_LABEL_PREFIX__, x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) /* Use the right prefix for registers. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define REG(x) CONCAT1 (__REGISTER_PREFIX__, x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) /* Use the right prefix for immediate values. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define IMM(x) CONCAT1 (__IMMEDIATE_PREFIX__, x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define d0 REG (d0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define d1 REG (d1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define d2 REG (d2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define d3 REG (d3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define d4 REG (d4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define d5 REG (d5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define d6 REG (d6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define d7 REG (d7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define a0 REG (a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define a1 REG (a1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define a2 REG (a2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define a3 REG (a3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define a4 REG (a4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define a5 REG (a5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define a6 REG (a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define fp REG (fp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define sp REG (sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) .text
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .proc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) .globl SYM (__divsi3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) SYM (__divsi3):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) movel d2, sp@-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) moveq IMM (1), d2 /* sign of result stored in d2 (=1 or =-1) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) movel sp@(12), d1 /* d1 = divisor */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) jpl L1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) negl d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #if !(defined(__mcf5200__) || defined(__mcoldfire__))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) negb d2 /* change sign because divisor <0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) negl d2 /* change sign because divisor <0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) L1: movel sp@(8), d0 /* d0 = dividend */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) jpl L2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) negl d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #if !(defined(__mcf5200__) || defined(__mcoldfire__))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) negb d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) negl d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) L2: movel d1, sp@-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) movel d0, sp@-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) jbsr SYM (__udivsi3) /* divide abs(dividend) by abs(divisor) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) addql IMM (8), sp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) tstb d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) jpl L3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) negl d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) L3: movel sp@+, d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) EXPORT_SYMBOL(__divsi3)