Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    2)  *  linux/arch/m68k/kernel/signal.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    4)  *  Copyright (C) 1991, 1992  Linus Torvalds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    6)  * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    7)  * License.  See the file COPYING in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    8)  * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300    9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   11) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   12)  * Linux/m68k support by Hamish Macdonald
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   13)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   14)  * 68060 fixes by Jesper Skov
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   15)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   16)  * 1997-12-01  Modified for POSIX.1b signals by Andreas Schwab
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   17)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   18)  * mathemu support by Roman Zippel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   19)  *  (Note: fpstate in the signal context is completely ignored for the emulator
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   20)  *         and the internal floating point format is put on stack)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   21)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   23) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   24)  * ++roman (07/09/96): implemented signal stacks (specially for tosemu on
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   25)  * Atari :-) Current limitation: Only one sigstack can be active at one time.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   26)  * If a second signal with SA_ONSTACK set arrives while working on a sigstack,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   27)  * SA_ONSTACK is ignored. This behaviour avoids lots of trouble with nested
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   28)  * signal handlers!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   29)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   31) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   32) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   33) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   34) #include <linux/signal.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   35) #include <linux/syscalls.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   36) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   37) #include <linux/wait.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   38) #include <linux/ptrace.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   39) #include <linux/unistd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   40) #include <linux/stddef.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   41) #include <linux/highuid.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   42) #include <linux/personality.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   43) #include <linux/tty.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   44) #include <linux/binfmts.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   45) #include <linux/extable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   46) #include <linux/tracehook.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   48) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   49) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   50) #include <asm/traps.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   51) #include <asm/ucontext.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   52) #include <asm/cacheflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   53) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   54) #ifdef CONFIG_MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   55) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   56) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   57)  * Handle the slight differences in classic 68k and ColdFire trap frames.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   58)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   59) #ifdef CONFIG_COLDFIRE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   60) #define	FORMAT		4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   61) #define	FMT4SIZE	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   62) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   63) #define	FORMAT		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   64) #define	FMT4SIZE	sizeof_field(struct frame, un.fmt4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   65) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   67) static const int frame_size_change[16] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   68)   [1]	= -1, /* sizeof_field(struct frame, un.fmt1), */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   69)   [2]	= sizeof_field(struct frame, un.fmt2),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   70)   [3]	= sizeof_field(struct frame, un.fmt3),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   71)   [4]	= FMT4SIZE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   72)   [5]	= -1, /* sizeof_field(struct frame, un.fmt5), */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   73)   [6]	= -1, /* sizeof_field(struct frame, un.fmt6), */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   74)   [7]	= sizeof_field(struct frame, un.fmt7),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   75)   [8]	= -1, /* sizeof_field(struct frame, un.fmt8), */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   76)   [9]	= sizeof_field(struct frame, un.fmt9),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   77)   [10]	= sizeof_field(struct frame, un.fmta),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   78)   [11]	= sizeof_field(struct frame, un.fmtb),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   79)   [12]	= -1, /* sizeof_field(struct frame, un.fmtc), */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   80)   [13]	= -1, /* sizeof_field(struct frame, un.fmtd), */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   81)   [14]	= -1, /* sizeof_field(struct frame, un.fmte), */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   82)   [15]	= -1, /* sizeof_field(struct frame, un.fmtf), */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   83) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   85) static inline int frame_extra_sizes(int f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   87) 	return frame_size_change[f];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   88) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   90) int fixup_exception(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   91) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   92) 	const struct exception_table_entry *fixup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   93) 	struct pt_regs *tregs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   95) 	/* Are we prepared to handle this kernel fault? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   96) 	fixup = search_exception_tables(regs->pc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   97) 	if (!fixup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   98) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   99) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  100) 	/* Create a new four word stack frame, discarding the old one. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  101) 	regs->stkadj = frame_extra_sizes(regs->format);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  102) 	tregs =	(struct pt_regs *)((long)regs + regs->stkadj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  103) 	tregs->vector = regs->vector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  104) 	tregs->format = FORMAT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  105) 	tregs->pc = fixup->fixup;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  106) 	tregs->sr = regs->sr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  107) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  108) 	return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  109) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  111) static inline void push_cache (unsigned long vaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  112) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  113) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  114) 	 * Using the old cache_push_v() was really a big waste.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  115) 	 *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  116) 	 * What we are trying to do is to flush 8 bytes to ram.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  117) 	 * Flushing 2 cache lines of 16 bytes is much cheaper than
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  118) 	 * flushing 1 or 2 pages, as previously done in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  119) 	 * cache_push_v().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  120) 	 *                                                     Jes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  121) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  122) 	if (CPU_IS_040) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  123) 		unsigned long temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  125) 		__asm__ __volatile__ (".chip 68040\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  126) 				      "nop\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  127) 				      "ptestr (%1)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  128) 				      "movec %%mmusr,%0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  129) 				      ".chip 68k"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  130) 				      : "=r" (temp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  131) 				      : "a" (vaddr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  132) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  133) 		temp &= PAGE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  134) 		temp |= vaddr & ~PAGE_MASK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  136) 		__asm__ __volatile__ (".chip 68040\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  137) 				      "nop\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  138) 				      "cpushl %%bc,(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  139) 				      ".chip 68k"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  140) 				      : : "a" (temp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  141) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  142) 	else if (CPU_IS_060) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  143) 		unsigned long temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  144) 		__asm__ __volatile__ (".chip 68060\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  145) 				      "plpar (%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  146) 				      ".chip 68k"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  147) 				      : "=a" (temp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  148) 				      : "0" (vaddr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  149) 		__asm__ __volatile__ (".chip 68060\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  150) 				      "cpushl %%bc,(%0)\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  151) 				      ".chip 68k"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  152) 				      : : "a" (temp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  153) 	} else if (!CPU_IS_COLDFIRE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  154) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  155) 		 * 68030/68020 have no writeback cache;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  156) 		 * still need to clear icache.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  157) 		 * Note that vaddr is guaranteed to be long word aligned.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  158) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  159) 		unsigned long temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  160) 		asm volatile ("movec %%cacr,%0" : "=r" (temp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  161) 		temp += 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  162) 		asm volatile ("movec %0,%%caar\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  163) 			      "movec %1,%%cacr"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  164) 			      : : "r" (vaddr), "r" (temp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  165) 		asm volatile ("movec %0,%%caar\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  166) 			      "movec %1,%%cacr"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  167) 			      : : "r" (vaddr + 4), "r" (temp));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  168) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  169) 		/* CPU_IS_COLDFIRE */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  170) #if defined(CONFIG_CACHE_COPYBACK)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  171) 		flush_cf_dcache(0, DCACHE_MAX_ADDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  172) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  173) 		/* Invalidate instruction cache for the pushed bytes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  174) 		clear_cf_icache(vaddr, vaddr + 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  175) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  176) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  178) static inline void adjustformat(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  179) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  182) static inline void save_a5_state(struct sigcontext *sc, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  183) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  184) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  185) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  186) #else /* CONFIG_MMU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  188) void ret_from_user_signal(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  189) void ret_from_user_rt_signal(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  191) static inline int frame_extra_sizes(int f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  192) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  193) 	/* No frame size adjustments required on non-MMU CPUs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  194) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  197) static inline void adjustformat(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  199) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  200) 	 * set format byte to make stack appear modulo 4, which it will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  201) 	 * be when doing the rte
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  202) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  203) 	regs->format = 0x4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  204) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  206) static inline void save_a5_state(struct sigcontext *sc, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  207) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  208) 	sc->sc_a5 = ((struct switch_stack *)regs - 1)->a5;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  209) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  210) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  211) static inline void push_cache(unsigned long vaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  212) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  213) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  214) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  215) #endif /* CONFIG_MMU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  216) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  217) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  218)  * Do a signal return; undo the signal stack.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  219)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  220)  * Keep the return code on the stack quadword aligned!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  221)  * That makes the cache flush below easier.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  222)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  223) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  224) struct sigframe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  225) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  226) 	char __user *pretcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  227) 	int sig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  228) 	int code;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  229) 	struct sigcontext __user *psc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  230) 	char retcode[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  231) 	unsigned long extramask[_NSIG_WORDS-1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  232) 	struct sigcontext sc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  233) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  234) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  235) struct rt_sigframe
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  236) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  237) 	char __user *pretcode;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  238) 	int sig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  239) 	struct siginfo __user *pinfo;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  240) 	void __user *puc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  241) 	char retcode[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  242) 	struct siginfo info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  243) 	struct ucontext uc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  244) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  245) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  246) #define FPCONTEXT_SIZE	216
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  247) #define uc_fpstate	uc_filler[0]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  248) #define uc_formatvec	uc_filler[FPCONTEXT_SIZE/4]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  249) #define uc_extra	uc_filler[FPCONTEXT_SIZE/4+1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  250) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  251) #ifdef CONFIG_FPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  252) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  253) static unsigned char fpu_version;	/* version number of fpu, set by setup_frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  255) static inline int restore_fpu_state(struct sigcontext *sc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  256) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  257) 	int err = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  258) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  259) 	if (FPU_IS_EMU) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  260) 	    /* restore registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  261) 	    memcpy(current->thread.fpcntl, sc->sc_fpcntl, 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  262) 	    memcpy(current->thread.fp, sc->sc_fpregs, 24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  263) 	    return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  264) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  265) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  266) 	if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  267) 	    /* Verify the frame format.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  268) 	    if (!(CPU_IS_060 || CPU_IS_COLDFIRE) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  269) 		 (sc->sc_fpstate[0] != fpu_version))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  270) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  271) 	    if (CPU_IS_020_OR_030) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  272) 		if (m68k_fputype & FPU_68881 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  273) 		    !(sc->sc_fpstate[1] == 0x18 || sc->sc_fpstate[1] == 0xb4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  274) 		    goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  275) 		if (m68k_fputype & FPU_68882 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  276) 		    !(sc->sc_fpstate[1] == 0x38 || sc->sc_fpstate[1] == 0xd4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  277) 		    goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  278) 	    } else if (CPU_IS_040) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  279) 		if (!(sc->sc_fpstate[1] == 0x00 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  280)                       sc->sc_fpstate[1] == 0x28 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  281)                       sc->sc_fpstate[1] == 0x60))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  282) 		    goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  283) 	    } else if (CPU_IS_060) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  284) 		if (!(sc->sc_fpstate[3] == 0x00 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  285)                       sc->sc_fpstate[3] == 0x60 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  286) 		      sc->sc_fpstate[3] == 0xe0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  287) 		    goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  288) 	    } else if (CPU_IS_COLDFIRE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  289) 		if (!(sc->sc_fpstate[0] == 0x00 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  290) 		      sc->sc_fpstate[0] == 0x05 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  291) 		      sc->sc_fpstate[0] == 0xe5))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  292) 		    goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  293) 	    } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  294) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  295) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  296) 	    if (CPU_IS_COLDFIRE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  297) 		__asm__ volatile ("fmovemd %0,%%fp0-%%fp1\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  298) 				  "fmovel %1,%%fpcr\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  299) 				  "fmovel %2,%%fpsr\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  300) 				  "fmovel %3,%%fpiar"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  301) 				  : /* no outputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  302) 				  : "m" (sc->sc_fpregs[0]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  303) 				    "m" (sc->sc_fpcntl[0]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  304) 				    "m" (sc->sc_fpcntl[1]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  305) 				    "m" (sc->sc_fpcntl[2]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  306) 	    } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  307) 		__asm__ volatile (".chip 68k/68881\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  308) 				  "fmovemx %0,%%fp0-%%fp1\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  309) 				  "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  310) 				  ".chip 68k"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  311) 				  : /* no outputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  312) 				  : "m" (*sc->sc_fpregs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  313) 				    "m" (*sc->sc_fpcntl));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  314) 	    }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  315) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  316) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  317) 	if (CPU_IS_COLDFIRE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  318) 		__asm__ volatile ("frestore %0" : : "m" (*sc->sc_fpstate));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  319) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  320) 		__asm__ volatile (".chip 68k/68881\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  321) 				  "frestore %0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  322) 				  ".chip 68k"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  323) 				  : : "m" (*sc->sc_fpstate));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  324) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  325) 	err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  326) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  327) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  328) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  330) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  331) static inline int rt_restore_fpu_state(struct ucontext __user *uc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  332) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  333) 	unsigned char fpstate[FPCONTEXT_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  334) 	int context_size = CPU_IS_060 ? 8 : (CPU_IS_COLDFIRE ? 12 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  335) 	fpregset_t fpregs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  336) 	int err = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  337) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  338) 	if (FPU_IS_EMU) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  339) 		/* restore fpu control register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  340) 		if (__copy_from_user(current->thread.fpcntl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  341) 				uc->uc_mcontext.fpregs.f_fpcntl, 12))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  342) 			goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  343) 		/* restore all other fpu register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  344) 		if (__copy_from_user(current->thread.fp,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  345) 				uc->uc_mcontext.fpregs.f_fpregs, 96))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  346) 			goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  347) 		return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  348) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  349) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  350) 	if (__get_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  351) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  352) 	if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  353) 		if (!(CPU_IS_060 || CPU_IS_COLDFIRE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  354) 			context_size = fpstate[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  355) 		/* Verify the frame format.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  356) 		if (!(CPU_IS_060 || CPU_IS_COLDFIRE) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  357) 		     (fpstate[0] != fpu_version))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  358) 			goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  359) 		if (CPU_IS_020_OR_030) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  360) 			if (m68k_fputype & FPU_68881 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  361) 			    !(context_size == 0x18 || context_size == 0xb4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  362) 				goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  363) 			if (m68k_fputype & FPU_68882 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  364) 			    !(context_size == 0x38 || context_size == 0xd4))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  365) 				goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  366) 		} else if (CPU_IS_040) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  367) 			if (!(context_size == 0x00 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  368) 			      context_size == 0x28 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  369) 			      context_size == 0x60))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  370) 				goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  371) 		} else if (CPU_IS_060) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  372) 			if (!(fpstate[3] == 0x00 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  373) 			      fpstate[3] == 0x60 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  374) 			      fpstate[3] == 0xe0))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  375) 				goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  376) 		} else if (CPU_IS_COLDFIRE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  377) 			if (!(fpstate[3] == 0x00 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  378) 			      fpstate[3] == 0x05 ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  379) 			      fpstate[3] == 0xe5))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  380) 				goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  381) 		} else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  382) 			goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  383) 		if (__copy_from_user(&fpregs, &uc->uc_mcontext.fpregs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  384) 				     sizeof(fpregs)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  385) 			goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  386) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  387) 		if (CPU_IS_COLDFIRE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  388) 			__asm__ volatile ("fmovemd %0,%%fp0-%%fp7\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  389) 					  "fmovel %1,%%fpcr\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  390) 					  "fmovel %2,%%fpsr\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  391) 					  "fmovel %3,%%fpiar"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  392) 					  : /* no outputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  393) 					  : "m" (fpregs.f_fpregs[0]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  394) 					    "m" (fpregs.f_fpcntl[0]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  395) 					    "m" (fpregs.f_fpcntl[1]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  396) 					    "m" (fpregs.f_fpcntl[2]));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  397) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  398) 			__asm__ volatile (".chip 68k/68881\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  399) 					  "fmovemx %0,%%fp0-%%fp7\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  400) 					  "fmoveml %1,%%fpcr/%%fpsr/%%fpiar\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  401) 					  ".chip 68k"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  402) 					  : /* no outputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  403) 					  : "m" (*fpregs.f_fpregs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  404) 					    "m" (*fpregs.f_fpcntl));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  405) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  406) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  407) 	if (context_size &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  408) 	    __copy_from_user(fpstate + 4, (long __user *)&uc->uc_fpstate + 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  409) 			     context_size))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  410) 		goto out;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  411) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  412) 	if (CPU_IS_COLDFIRE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  413) 		__asm__ volatile ("frestore %0" : : "m" (*fpstate));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  414) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  415) 		__asm__ volatile (".chip 68k/68881\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  416) 				  "frestore %0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  417) 				  ".chip 68k"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  418) 				  : : "m" (*fpstate));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  419) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  420) 	err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  421) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  422) out:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  423) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  424) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  425) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  426) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  427)  * Set up a signal frame.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  428)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  429) static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  430) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  431) 	if (FPU_IS_EMU) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  432) 		/* save registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  433) 		memcpy(sc->sc_fpcntl, current->thread.fpcntl, 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  434) 		memcpy(sc->sc_fpregs, current->thread.fp, 24);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  435) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  436) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  437) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  438) 	if (CPU_IS_COLDFIRE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  439) 		__asm__ volatile ("fsave %0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  440) 				  : : "m" (*sc->sc_fpstate) : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  441) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  442) 		__asm__ volatile (".chip 68k/68881\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  443) 				  "fsave %0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  444) 				  ".chip 68k"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  445) 				  : : "m" (*sc->sc_fpstate) : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  446) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  447) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  448) 	if (CPU_IS_060 ? sc->sc_fpstate[2] : sc->sc_fpstate[0]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  449) 		fpu_version = sc->sc_fpstate[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  450) 		if (CPU_IS_020_OR_030 && !regs->stkadj &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  451) 		    regs->vector >= (VEC_FPBRUC * 4) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  452) 		    regs->vector <= (VEC_FPNAN * 4)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  453) 			/* Clear pending exception in 68882 idle frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  454) 			if (*(unsigned short *) sc->sc_fpstate == 0x1f38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  455) 				sc->sc_fpstate[0x38] |= 1 << 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  456) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  457) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  458) 		if (CPU_IS_COLDFIRE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  459) 			__asm__ volatile ("fmovemd %%fp0-%%fp1,%0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  460) 					  "fmovel %%fpcr,%1\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  461) 					  "fmovel %%fpsr,%2\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  462) 					  "fmovel %%fpiar,%3"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  463) 					  : "=m" (sc->sc_fpregs[0]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  464) 					    "=m" (sc->sc_fpcntl[0]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  465) 					    "=m" (sc->sc_fpcntl[1]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  466) 					    "=m" (sc->sc_fpcntl[2])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  467) 					  : /* no inputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  468) 					  : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  469) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  470) 			__asm__ volatile (".chip 68k/68881\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  471) 					  "fmovemx %%fp0-%%fp1,%0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  472) 					  "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  473) 					  ".chip 68k"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  474) 					  : "=m" (*sc->sc_fpregs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  475) 					    "=m" (*sc->sc_fpcntl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  476) 					  : /* no inputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  477) 					  : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  478) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  479) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  480) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  481) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  482) static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  483) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  484) 	unsigned char fpstate[FPCONTEXT_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  485) 	int context_size = CPU_IS_060 ? 8 : (CPU_IS_COLDFIRE ? 12 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  486) 	int err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  487) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  488) 	if (FPU_IS_EMU) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  489) 		/* save fpu control register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  490) 		err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpcntl,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  491) 				current->thread.fpcntl, 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  492) 		/* save all other fpu register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  493) 		err |= copy_to_user(uc->uc_mcontext.fpregs.f_fpregs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  494) 				current->thread.fp, 96);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  495) 		return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  496) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  497) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  498) 	if (CPU_IS_COLDFIRE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  499) 		__asm__ volatile ("fsave %0" : : "m" (*fpstate) : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  500) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  501) 		__asm__ volatile (".chip 68k/68881\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  502) 				  "fsave %0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  503) 				  ".chip 68k"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  504) 				  : : "m" (*fpstate) : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  505) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  506) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  507) 	err |= __put_user(*(long *)fpstate, (long __user *)&uc->uc_fpstate);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  508) 	if (CPU_IS_060 ? fpstate[2] : fpstate[0]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  509) 		fpregset_t fpregs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  510) 		if (!(CPU_IS_060 || CPU_IS_COLDFIRE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  511) 			context_size = fpstate[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  512) 		fpu_version = fpstate[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  513) 		if (CPU_IS_020_OR_030 && !regs->stkadj &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  514) 		    regs->vector >= (VEC_FPBRUC * 4) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  515) 		    regs->vector <= (VEC_FPNAN * 4)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  516) 			/* Clear pending exception in 68882 idle frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  517) 			if (*(unsigned short *) fpstate == 0x1f38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  518) 				fpstate[0x38] |= 1 << 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  519) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  520) 		if (CPU_IS_COLDFIRE) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  521) 			__asm__ volatile ("fmovemd %%fp0-%%fp7,%0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  522) 					  "fmovel %%fpcr,%1\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  523) 					  "fmovel %%fpsr,%2\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  524) 					  "fmovel %%fpiar,%3"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  525) 					  : "=m" (fpregs.f_fpregs[0]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  526) 					    "=m" (fpregs.f_fpcntl[0]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  527) 					    "=m" (fpregs.f_fpcntl[1]),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  528) 					    "=m" (fpregs.f_fpcntl[2])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  529) 					  : /* no inputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  530) 					  : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  531) 		} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  532) 			__asm__ volatile (".chip 68k/68881\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  533) 					  "fmovemx %%fp0-%%fp7,%0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  534) 					  "fmoveml %%fpcr/%%fpsr/%%fpiar,%1\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  535) 					  ".chip 68k"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  536) 					  : "=m" (*fpregs.f_fpregs),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  537) 					    "=m" (*fpregs.f_fpcntl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  538) 					  : /* no inputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  539) 					  : "memory");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  540) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  541) 		err |= copy_to_user(&uc->uc_mcontext.fpregs, &fpregs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  542) 				    sizeof(fpregs));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  543) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  544) 	if (context_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  545) 		err |= copy_to_user((long __user *)&uc->uc_fpstate + 1, fpstate + 4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  546) 				    context_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  547) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  548) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  549) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  550) #else /* CONFIG_FPU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  551) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  552) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  553)  * For the case with no FPU configured these all do nothing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  554)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  555) static inline int restore_fpu_state(struct sigcontext *sc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  556) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  557) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  558) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  559) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  560) static inline int rt_restore_fpu_state(struct ucontext __user *uc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  561) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  562) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  563) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  564) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  565) static inline void save_fpu_state(struct sigcontext *sc, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  566) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  567) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  568) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  569) static inline int rt_save_fpu_state(struct ucontext __user *uc, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  570) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  571) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  572) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  573) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  574) #endif /* CONFIG_FPU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  575) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  576) static inline void siginfo_build_tests(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  577) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  578) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  579) 	 * This needs to be tested on m68k as it has a lesser
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  580) 	 * alignment requirement than x86 and that can cause surprises.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  581) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  582) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  583) 	/* This is part of the ABI and can never change in size: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  584) 	BUILD_BUG_ON(sizeof(siginfo_t) != 128);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  585) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  586) 	/* Ensure the known fields never change in location */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  587) 	BUILD_BUG_ON(offsetof(siginfo_t, si_signo) != 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  588) 	BUILD_BUG_ON(offsetof(siginfo_t, si_errno) != 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  589) 	BUILD_BUG_ON(offsetof(siginfo_t, si_code)  != 8);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  590) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  591) 	/* _kill */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  592) 	BUILD_BUG_ON(offsetof(siginfo_t, si_pid) != 0x0c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  593) 	BUILD_BUG_ON(offsetof(siginfo_t, si_uid) != 0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  594) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  595) 	/* _timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  596) 	BUILD_BUG_ON(offsetof(siginfo_t, si_tid)     != 0x0c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  597) 	BUILD_BUG_ON(offsetof(siginfo_t, si_overrun) != 0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  598) 	BUILD_BUG_ON(offsetof(siginfo_t, si_value)   != 0x14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  599) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  600) 	/* _rt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  601) 	BUILD_BUG_ON(offsetof(siginfo_t, si_pid)   != 0x0c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  602) 	BUILD_BUG_ON(offsetof(siginfo_t, si_uid)   != 0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  603) 	BUILD_BUG_ON(offsetof(siginfo_t, si_value) != 0x14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  604) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  605) 	/* _sigchld */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  606) 	BUILD_BUG_ON(offsetof(siginfo_t, si_pid)    != 0x0c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  607) 	BUILD_BUG_ON(offsetof(siginfo_t, si_uid)    != 0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  608) 	BUILD_BUG_ON(offsetof(siginfo_t, si_status) != 0x14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  609) 	BUILD_BUG_ON(offsetof(siginfo_t, si_utime)  != 0x18);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  610) 	BUILD_BUG_ON(offsetof(siginfo_t, si_stime)  != 0x1c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  611) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  612) 	/* _sigfault */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  613) 	BUILD_BUG_ON(offsetof(siginfo_t, si_addr) != 0x0c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  614) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  615) 	/* _sigfault._mcerr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  616) 	BUILD_BUG_ON(offsetof(siginfo_t, si_addr_lsb) != 0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  617) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  618) 	/* _sigfault._addr_bnd */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  619) 	BUILD_BUG_ON(offsetof(siginfo_t, si_lower) != 0x12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  620) 	BUILD_BUG_ON(offsetof(siginfo_t, si_upper) != 0x16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  621) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  622) 	/* _sigfault._addr_pkey */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  623) 	BUILD_BUG_ON(offsetof(siginfo_t, si_pkey) != 0x12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  624) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  625) 	/* _sigpoll */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  626) 	BUILD_BUG_ON(offsetof(siginfo_t, si_band)   != 0x0c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  627) 	BUILD_BUG_ON(offsetof(siginfo_t, si_fd)     != 0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  628) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  629) 	/* _sigsys */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  630) 	BUILD_BUG_ON(offsetof(siginfo_t, si_call_addr) != 0x0c);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  631) 	BUILD_BUG_ON(offsetof(siginfo_t, si_syscall)   != 0x10);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  632) 	BUILD_BUG_ON(offsetof(siginfo_t, si_arch)      != 0x14);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  633) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  634) 	/* any new si_fields should be added here */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  635) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  636) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  637) static int mangle_kernel_stack(struct pt_regs *regs, int formatvec,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  638) 			       void __user *fp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  639) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  640) 	int fsize = frame_extra_sizes(formatvec >> 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  641) 	if (fsize < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  642) 		/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  643) 		 * user process trying to return with weird frame format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  644) 		 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  645) 		pr_debug("user process returning with weird frame format\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  646) 		return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  647) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  648) 	if (!fsize) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  649) 		regs->format = formatvec >> 12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  650) 		regs->vector = formatvec & 0xfff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  651) 	} else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  652) 		struct switch_stack *sw = (struct switch_stack *)regs - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  653) 		/* yes, twice as much as max(sizeof(frame.un.fmt<x>)) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  654) 		unsigned long buf[sizeof_field(struct frame, un) / 2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  655) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  656) 		/* that'll make sure that expansion won't crap over data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  657) 		if (copy_from_user(buf + fsize / 4, fp, fsize))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  658) 			return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  659) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  660) 		/* point of no return */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  661) 		regs->format = formatvec >> 12;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  662) 		regs->vector = formatvec & 0xfff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  663) #define frame_offset (sizeof(struct pt_regs)+sizeof(struct switch_stack))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  664) 		__asm__ __volatile__ (
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  665) #ifdef CONFIG_COLDFIRE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  666) 			 "   movel %0,%/sp\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  667) 			 "   bra ret_from_signal\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  668) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  669) 			 "   movel %0,%/a0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  670) 			 "   subl %1,%/a0\n\t"     /* make room on stack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  671) 			 "   movel %/a0,%/sp\n\t"  /* set stack pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  672) 			 /* move switch_stack and pt_regs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  673) 			 "1: movel %0@+,%/a0@+\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  674) 			 "   dbra %2,1b\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  675) 			 "   lea %/sp@(%c3),%/a0\n\t" /* add offset of fmt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  676) 			 "   lsrl  #2,%1\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  677) 			 "   subql #1,%1\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  678) 			 /* copy to the gap we'd made */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  679) 			 "2: movel %4@+,%/a0@+\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  680) 			 "   dbra %1,2b\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  681) 			 "   bral ret_from_signal\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  682) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  683) 			 : /* no outputs, it doesn't ever return */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  684) 			 : "a" (sw), "d" (fsize), "d" (frame_offset/4-1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  685) 			   "n" (frame_offset), "a" (buf + fsize/4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  686) 			 : "a0");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  687) #undef frame_offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  688) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  689) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  690) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  691) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  692) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  693) restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *usc, void __user *fp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  694) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  695) 	int formatvec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  696) 	struct sigcontext context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  697) 	int err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  698) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  699) 	siginfo_build_tests();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  700) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  701) 	/* Always make any pending restarted system calls return -EINTR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  702) 	current->restart_block.fn = do_no_restart_syscall;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  703) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  704) 	/* get previous context */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  705) 	if (copy_from_user(&context, usc, sizeof(context)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  706) 		goto badframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  707) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  708) 	/* restore passed registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  709) 	regs->d0 = context.sc_d0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  710) 	regs->d1 = context.sc_d1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  711) 	regs->a0 = context.sc_a0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  712) 	regs->a1 = context.sc_a1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  713) 	regs->sr = (regs->sr & 0xff00) | (context.sc_sr & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  714) 	regs->pc = context.sc_pc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  715) 	regs->orig_d0 = -1;		/* disable syscall checks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  716) 	wrusp(context.sc_usp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  717) 	formatvec = context.sc_formatvec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  718) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  719) 	err = restore_fpu_state(&context);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  720) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  721) 	if (err || mangle_kernel_stack(regs, formatvec, fp))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  722) 		goto badframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  723) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  724) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  725) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  726) badframe:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  727) 	return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  728) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  729) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  730) static inline int
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  731) rt_restore_ucontext(struct pt_regs *regs, struct switch_stack *sw,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  732) 		    struct ucontext __user *uc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  733) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  734) 	int temp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  735) 	greg_t __user *gregs = uc->uc_mcontext.gregs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  736) 	unsigned long usp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  737) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  738) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  739) 	/* Always make any pending restarted system calls return -EINTR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  740) 	current->restart_block.fn = do_no_restart_syscall;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  741) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  742) 	err = __get_user(temp, &uc->uc_mcontext.version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  743) 	if (temp != MCONTEXT_VERSION)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  744) 		goto badframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  745) 	/* restore passed registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  746) 	err |= __get_user(regs->d0, &gregs[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  747) 	err |= __get_user(regs->d1, &gregs[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  748) 	err |= __get_user(regs->d2, &gregs[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  749) 	err |= __get_user(regs->d3, &gregs[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  750) 	err |= __get_user(regs->d4, &gregs[4]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  751) 	err |= __get_user(regs->d5, &gregs[5]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  752) 	err |= __get_user(sw->d6, &gregs[6]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  753) 	err |= __get_user(sw->d7, &gregs[7]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  754) 	err |= __get_user(regs->a0, &gregs[8]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  755) 	err |= __get_user(regs->a1, &gregs[9]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  756) 	err |= __get_user(regs->a2, &gregs[10]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  757) 	err |= __get_user(sw->a3, &gregs[11]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  758) 	err |= __get_user(sw->a4, &gregs[12]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  759) 	err |= __get_user(sw->a5, &gregs[13]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  760) 	err |= __get_user(sw->a6, &gregs[14]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  761) 	err |= __get_user(usp, &gregs[15]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  762) 	wrusp(usp);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  763) 	err |= __get_user(regs->pc, &gregs[16]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  764) 	err |= __get_user(temp, &gregs[17]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  765) 	regs->sr = (regs->sr & 0xff00) | (temp & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  766) 	regs->orig_d0 = -1;		/* disable syscall checks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  767) 	err |= __get_user(temp, &uc->uc_formatvec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  768) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  769) 	err |= rt_restore_fpu_state(uc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  770) 	err |= restore_altstack(&uc->uc_stack);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  771) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  772) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  773) 		goto badframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  774) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  775) 	if (mangle_kernel_stack(regs, temp, &uc->uc_extra))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  776) 		goto badframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  777) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  778) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  779) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  780) badframe:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  781) 	return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  782) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  783) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  784) asmlinkage int do_sigreturn(struct pt_regs *regs, struct switch_stack *sw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  785) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  786) 	unsigned long usp = rdusp();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  787) 	struct sigframe __user *frame = (struct sigframe __user *)(usp - 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  788) 	sigset_t set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  789) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  790) 	if (!access_ok(frame, sizeof(*frame)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  791) 		goto badframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  792) 	if (__get_user(set.sig[0], &frame->sc.sc_mask) ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  793) 	    (_NSIG_WORDS > 1 &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  794) 	     __copy_from_user(&set.sig[1], &frame->extramask,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  795) 			      sizeof(frame->extramask))))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  796) 		goto badframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  797) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  798) 	set_current_blocked(&set);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  799) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  800) 	if (restore_sigcontext(regs, &frame->sc, frame + 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  801) 		goto badframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  802) 	return regs->d0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  803) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  804) badframe:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  805) 	force_sig(SIGSEGV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  806) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  807) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  808) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  809) asmlinkage int do_rt_sigreturn(struct pt_regs *regs, struct switch_stack *sw)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  810) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  811) 	unsigned long usp = rdusp();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  812) 	struct rt_sigframe __user *frame = (struct rt_sigframe __user *)(usp - 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  813) 	sigset_t set;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  814) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  815) 	if (!access_ok(frame, sizeof(*frame)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  816) 		goto badframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  817) 	if (__copy_from_user(&set, &frame->uc.uc_sigmask, sizeof(set)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  818) 		goto badframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  819) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  820) 	set_current_blocked(&set);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  821) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  822) 	if (rt_restore_ucontext(regs, sw, &frame->uc))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  823) 		goto badframe;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  824) 	return regs->d0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  825) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  826) badframe:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  827) 	force_sig(SIGSEGV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  828) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  829) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  830) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  831) static inline struct pt_regs *rte_regs(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  832) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  833) 	return (void *)regs + regs->stkadj;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  834) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  835) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  836) static void setup_sigcontext(struct sigcontext *sc, struct pt_regs *regs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  837) 			     unsigned long mask)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  838) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  839) 	struct pt_regs *tregs = rte_regs(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  840) 	sc->sc_mask = mask;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  841) 	sc->sc_usp = rdusp();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  842) 	sc->sc_d0 = regs->d0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  843) 	sc->sc_d1 = regs->d1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  844) 	sc->sc_a0 = regs->a0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  845) 	sc->sc_a1 = regs->a1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  846) 	sc->sc_sr = tregs->sr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  847) 	sc->sc_pc = tregs->pc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  848) 	sc->sc_formatvec = tregs->format << 12 | tregs->vector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  849) 	save_a5_state(sc, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  850) 	save_fpu_state(sc, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  851) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  852) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  853) static inline int rt_setup_ucontext(struct ucontext __user *uc, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  854) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  855) 	struct switch_stack *sw = (struct switch_stack *)regs - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  856) 	struct pt_regs *tregs = rte_regs(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  857) 	greg_t __user *gregs = uc->uc_mcontext.gregs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  858) 	int err = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  859) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  860) 	err |= __put_user(MCONTEXT_VERSION, &uc->uc_mcontext.version);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  861) 	err |= __put_user(regs->d0, &gregs[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  862) 	err |= __put_user(regs->d1, &gregs[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  863) 	err |= __put_user(regs->d2, &gregs[2]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  864) 	err |= __put_user(regs->d3, &gregs[3]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  865) 	err |= __put_user(regs->d4, &gregs[4]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  866) 	err |= __put_user(regs->d5, &gregs[5]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  867) 	err |= __put_user(sw->d6, &gregs[6]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  868) 	err |= __put_user(sw->d7, &gregs[7]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  869) 	err |= __put_user(regs->a0, &gregs[8]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  870) 	err |= __put_user(regs->a1, &gregs[9]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  871) 	err |= __put_user(regs->a2, &gregs[10]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  872) 	err |= __put_user(sw->a3, &gregs[11]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  873) 	err |= __put_user(sw->a4, &gregs[12]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  874) 	err |= __put_user(sw->a5, &gregs[13]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  875) 	err |= __put_user(sw->a6, &gregs[14]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  876) 	err |= __put_user(rdusp(), &gregs[15]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  877) 	err |= __put_user(tregs->pc, &gregs[16]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  878) 	err |= __put_user(tregs->sr, &gregs[17]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  879) 	err |= __put_user((tregs->format << 12) | tregs->vector, &uc->uc_formatvec);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  880) 	err |= rt_save_fpu_state(uc, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  881) 	return err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  882) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  883) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  884) static inline void __user *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  885) get_sigframe(struct ksignal *ksig, size_t frame_size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  886) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  887) 	unsigned long usp = sigsp(rdusp(), ksig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  888) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  889) 	return (void __user *)((usp - frame_size) & -8UL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  890) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  891) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  892) static int setup_frame(struct ksignal *ksig, sigset_t *set,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  893) 			struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  894) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  895) 	struct sigframe __user *frame;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  896) 	struct pt_regs *tregs = rte_regs(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  897) 	int fsize = frame_extra_sizes(tregs->format);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  898) 	struct sigcontext context;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  899) 	int err = 0, sig = ksig->sig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  900) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  901) 	if (fsize < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  902) 		pr_debug("setup_frame: Unknown frame format %#x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  903) 			 tregs->format);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  904) 		return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  905) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  906) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  907) 	frame = get_sigframe(ksig, sizeof(*frame) + fsize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  908) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  909) 	if (fsize)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  910) 		err |= copy_to_user (frame + 1, regs + 1, fsize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  911) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  912) 	err |= __put_user(sig, &frame->sig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  913) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  914) 	err |= __put_user(tregs->vector, &frame->code);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  915) 	err |= __put_user(&frame->sc, &frame->psc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  916) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  917) 	if (_NSIG_WORDS > 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  918) 		err |= copy_to_user(frame->extramask, &set->sig[1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  919) 				    sizeof(frame->extramask));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  920) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  921) 	setup_sigcontext(&context, regs, set->sig[0]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  922) 	err |= copy_to_user (&frame->sc, &context, sizeof(context));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  923) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  924) 	/* Set up to return from userspace.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  925) #ifdef CONFIG_MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  926) 	err |= __put_user(frame->retcode, &frame->pretcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  927) 	/* moveq #,d0; trap #0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  928) 	err |= __put_user(0x70004e40 + (__NR_sigreturn << 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  929) 			  (long __user *)(frame->retcode));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  930) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  931) 	err |= __put_user((long) ret_from_user_signal,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  932) 			  (long __user *) &frame->pretcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  933) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  934) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  935) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  936) 		return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  937) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  938) 	push_cache ((unsigned long) &frame->retcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  939) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  940) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  941) 	 * This is subtle; if we build more than one sigframe, all but the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  942) 	 * first one will see frame format 0 and have fsize == 0, so we won't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  943) 	 * screw stkadj.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  944) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  945) 	if (fsize) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  946) 		regs->stkadj = fsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  947) 		tregs = rte_regs(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  948) 		pr_debug("Performing stackadjust=%04lx\n", regs->stkadj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  949) 		tregs->vector = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  950) 		tregs->format = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  951) 		tregs->sr = regs->sr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  952) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  953) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  954) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  955) 	 * Set up registers for signal handler.  All the state we are about
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  956) 	 * to destroy is successfully copied to sigframe.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  957) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  958) 	wrusp ((unsigned long) frame);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  959) 	tregs->pc = (unsigned long) ksig->ka.sa.sa_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  960) 	adjustformat(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  961) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  962) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  963) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  964) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  965) static int setup_rt_frame(struct ksignal *ksig, sigset_t *set,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  966) 			   struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  967) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  968) 	struct rt_sigframe __user *frame;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  969) 	struct pt_regs *tregs = rte_regs(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  970) 	int fsize = frame_extra_sizes(tregs->format);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  971) 	int err = 0, sig = ksig->sig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  972) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  973) 	if (fsize < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  974) 		pr_debug("setup_frame: Unknown frame format %#x\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  975) 			 regs->format);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  976) 		return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  977) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  978) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  979) 	frame = get_sigframe(ksig, sizeof(*frame));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  980) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  981) 	if (fsize)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  982) 		err |= copy_to_user (&frame->uc.uc_extra, regs + 1, fsize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  983) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  984) 	err |= __put_user(sig, &frame->sig);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  985) 	err |= __put_user(&frame->info, &frame->pinfo);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  986) 	err |= __put_user(&frame->uc, &frame->puc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  987) 	err |= copy_siginfo_to_user(&frame->info, &ksig->info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  988) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  989) 	/* Create the ucontext.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  990) 	err |= __put_user(0, &frame->uc.uc_flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  991) 	err |= __put_user(NULL, &frame->uc.uc_link);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  992) 	err |= __save_altstack(&frame->uc.uc_stack, rdusp());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  993) 	err |= rt_setup_ucontext(&frame->uc, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  994) 	err |= copy_to_user (&frame->uc.uc_sigmask, set, sizeof(*set));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  995) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  996) 	/* Set up to return from userspace.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  997) #ifdef CONFIG_MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  998) 	err |= __put_user(frame->retcode, &frame->pretcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  999) #ifdef __mcoldfire__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000) 	/* movel #__NR_rt_sigreturn,d0; trap #0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) 	err |= __put_user(0x203c0000, (long __user *)(frame->retcode + 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) 	err |= __put_user(0x00004e40 + (__NR_rt_sigreturn << 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) 			  (long __user *)(frame->retcode + 4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) 	/* moveq #,d0; notb d0; trap #0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) 	err |= __put_user(0x70004600 + ((__NR_rt_sigreturn ^ 0xff) << 16),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) 			  (long __user *)(frame->retcode + 0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008) 	err |= __put_user(0x4e40, (short __user *)(frame->retcode + 4));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) 	err |= __put_user((long) ret_from_user_rt_signal,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012) 			  (long __user *) &frame->pretcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) #endif /* CONFIG_MMU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) 	if (err)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016) 		return -EFAULT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) 	push_cache ((unsigned long) &frame->retcode);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) 	 * This is subtle; if we build more than one sigframe, all but the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) 	 * first one will see frame format 0 and have fsize == 0, so we won't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) 	 * screw stkadj.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) 	if (fsize) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) 		regs->stkadj = fsize;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) 		tregs = rte_regs(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028) 		pr_debug("Performing stackadjust=%04lx\n", regs->stkadj);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) 		tregs->vector = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030) 		tregs->format = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) 		tregs->sr = regs->sr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035) 	 * Set up registers for signal handler.  All the state we are about
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) 	 * to destroy is successfully copied to sigframe.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038) 	wrusp ((unsigned long) frame);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) 	tregs->pc = (unsigned long) ksig->ka.sa.sa_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) 	adjustformat(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) static inline void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) 	switch (regs->d0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048) 	case -ERESTARTNOHAND:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) 		if (!has_handler)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) 			goto do_restart;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) 		regs->d0 = -EINTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) 	case -ERESTART_RESTARTBLOCK:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055) 		if (!has_handler) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) 			regs->d0 = __NR_restart_syscall;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) 			regs->pc -= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) 		regs->d0 = -EINTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063) 	case -ERESTARTSYS:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) 		if (has_handler && !(ka->sa.sa_flags & SA_RESTART)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) 			regs->d0 = -EINTR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066) 			break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) 		}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068) 		fallthrough;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) 	case -ERESTARTNOINTR:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070) 	do_restart:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) 		regs->d0 = regs->orig_d0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) 		regs->pc -= 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) 		break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078)  * OK, we're invoking a handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081) handle_signal(struct ksignal *ksig, struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) 	sigset_t *oldset = sigmask_to_save();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084) 	int err;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) 	/* are we from a system call? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086) 	if (regs->orig_d0 >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) 		/* If so, check system call restarting.. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088) 		handle_restart(regs, &ksig->ka, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) 	/* set up the stack frame */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) 	if (ksig->ka.sa.sa_flags & SA_SIGINFO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) 		err = setup_rt_frame(ksig, oldset, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) 		err = setup_frame(ksig, oldset, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) 	signal_setup_done(err, ksig, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) 	if (test_thread_flag(TIF_DELAYED_TRACE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) 		regs->sr &= ~0x8000;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) 		send_sig(SIGTRAP, current, 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105)  * Note that 'init' is a special process: it doesn't get signals it doesn't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106)  * want to handle. Thus you cannot kill init even with a SIGKILL even by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107)  * mistake.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) static void do_signal(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) 	struct ksignal ksig;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) 	current->thread.esp0 = (unsigned long) regs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) 	if (get_signal(&ksig)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) 		/* Whee!  Actually deliver the signal.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) 		handle_signal(&ksig, regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121) 	/* Did we come from a system call? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) 	if (regs->orig_d0 >= 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123) 		/* Restart the system call - no handlers present */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) 		handle_restart(regs, NULL, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) 	/* If there's no signal to deliver, we just restore the saved mask.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) 	restore_saved_sigmask();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) void do_notify_resume(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) 	if (test_thread_flag(TIF_SIGPENDING))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) 		do_signal(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) 	if (test_thread_flag(TIF_NOTIFY_RESUME))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) 		tracehook_notify_resume(regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) }