Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *  linux/arch/m68knommu/kernel/setup.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  *  Copyright (C) 1999-2007  Greg Ungerer (gerg@snapgear.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  *  Copyright (C) 1998,1999  D. Jeff Dionne <jeff@uClinux.org>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *  Copyleft  ()) 2000       James D. Schettine {james@telos-systems.com}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  *  Copyright (C) 1998       Kenneth Albanowski <kjahds@kjahds.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *  Copyright (C) 1995       Hamish Macdonald
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  *  Copyright (C) 2000       Lineo Inc. (www.lineo.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11)  *  Copyright (C) 2001 	     Lineo, Inc. <www.lineo.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13)  *  68VZ328 Fixes/support    Evan Stawnyczy <e@lineo.ca>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17)  * This file handles the architecture-dependent parts of system setup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) #include <linux/fb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #include <linux/console.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #include <linux/string.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #include <linux/memblock.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #include <linux/seq_file.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #include <linux/initrd.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) #include <linux/root_dev.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #include <linux/rtc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #include <asm/bootinfo.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) #include <asm/machdep.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #include <asm/sections.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) unsigned long memory_start;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) unsigned long memory_end;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) EXPORT_SYMBOL(memory_start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) EXPORT_SYMBOL(memory_end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) char __initdata command_line[COMMAND_LINE_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) /* machine dependent timer functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) void (*mach_sched_init)(irq_handler_t handler) __initdata = NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) int (*mach_hwclk) (int, struct rtc_time*);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) /* machine dependent reboot functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) void (*mach_reset)(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) void (*mach_halt)(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) void (*mach_power_off)(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) #ifdef CONFIG_M68000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) #if defined(CONFIG_M68328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) #define CPU_NAME	"MC68328"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) #elif defined(CONFIG_M68EZ328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) #define CPU_NAME	"MC68EZ328"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) #elif defined(CONFIG_M68VZ328)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) #define CPU_NAME	"MC68VZ328"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) #define CPU_NAME	"MC68000"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) #endif /* CONFIG_M68000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) #ifndef CPU_NAME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) #define	CPU_NAME	"UNKNOWN"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76)  * Different cores have different instruction execution timings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77)  * The old/traditional 68000 cores are basically all the same, at 16.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78)  * The ColdFire cores vary a little, their values are defined in their
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79)  * headers. We default to the standard 68000 value here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) #ifndef CPU_INSTR_PER_JIFFY
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) #define	CPU_INSTR_PER_JIFFY	16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) void __init setup_arch(char **cmdline_p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) 	memory_start = PAGE_ALIGN(_ramstart);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) 	memory_end = _ramend;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) 	init_mm.start_code = (unsigned long) &_stext;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 	init_mm.end_code = (unsigned long) &_etext;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) 	init_mm.end_data = (unsigned long) &_edata;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	init_mm.brk = (unsigned long) 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	config_BSP(&command_line[0], sizeof(command_line));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) #if defined(CONFIG_BOOTPARAM)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 	strncpy(&command_line[0], CONFIG_BOOTPARAM_STRING, sizeof(command_line));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	command_line[sizeof(command_line) - 1] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #endif /* CONFIG_BOOTPARAM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	process_uboot_commandline(&command_line[0], sizeof(command_line));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 	pr_info("uClinux with CPU " CPU_NAME "\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #ifdef CONFIG_UCDIMM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) 	pr_info("uCdimm by Lineo, Inc. <www.lineo.com>\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #ifdef CONFIG_M68VZ328
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 	pr_info("M68VZ328 support by Evan Stawnyczy <e@lineo.ca>\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #ifdef CONFIG_COLDFIRE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) 	pr_info("COLDFIRE port done by Greg Ungerer, gerg@snapgear.com\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #ifdef CONFIG_M5307
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) 	pr_info("Modified for M5307 by Dave Miller, dmiller@intellistor.com\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #ifdef CONFIG_ELITE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	pr_info("Modified for M5206eLITE by Rob Scott, rscott@mtrob.fdns.net\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	pr_info("Flat model support (C) 1998,1999 Kenneth Albanowski, D. Jeff Dionne\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #if defined( CONFIG_PILOT ) && defined( CONFIG_M68328 )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 	pr_info("TRG SuperPilot FLASH card support <info@trgnet.com>\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #if defined( CONFIG_PILOT ) && defined( CONFIG_M68EZ328 )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 	pr_info("PalmV support by Lineo Inc. <jeff@uclinux.com>\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #ifdef CONFIG_DRAGEN2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	pr_info("DragonEngine II board support by Georges Menie\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #ifdef CONFIG_M5235EVB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 	pr_info("Motorola M5235EVB support (C)2005 Syn-tech Systems, Inc. (Jate Sujjavanich)\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 	pr_debug("KERNEL -> TEXT=0x%p-0x%p DATA=0x%p-0x%p BSS=0x%p-0x%p\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 		 _stext, _etext, _sdata, _edata, __bss_start, __bss_stop);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	pr_debug("MEMORY -> ROMFS=0x%p-0x%06lx MEM=0x%06lx-0x%06lx\n ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 		 __bss_stop, memory_start, memory_start, memory_end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	memblock_add(_rambase, memory_end - _rambase);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 	memblock_reserve(_rambase, memory_start - _rambase);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	/* Keep a copy of command line */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 	*cmdline_p = &command_line[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 	boot_command_line[COMMAND_LINE_SIZE-1] = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 	 * Give all the memory to the bootmap allocator, tell it to put the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 	 * boot mem_map at the start of memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 	min_low_pfn = PFN_DOWN(memory_start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	max_pfn = max_low_pfn = PFN_DOWN(memory_end);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #if defined(CONFIG_UBOOT) && defined(CONFIG_BLK_DEV_INITRD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	if ((initrd_start > 0) && (initrd_start < initrd_end) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 			(initrd_end < memory_end))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 		memblock_reserve(initrd_start, initrd_end - initrd_start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #endif /* if defined(CONFIG_BLK_DEV_INITRD) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 	/*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 	 * Get kmalloc into gear.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 	 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 	paging_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)  *	Get CPU information for use by the procfs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) static int show_cpuinfo(struct seq_file *m, void *v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	char *cpu, *mmu, *fpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 	u_long clockfreq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	cpu = CPU_NAME;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	mmu = "none";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	fpu = "none";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	clockfreq = (loops_per_jiffy * HZ) * CPU_INSTR_PER_JIFFY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 	seq_printf(m, "CPU:\t\t%s\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 		      "MMU:\t\t%s\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 		      "FPU:\t\t%s\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 		      "Clocking:\t%lu.%1luMHz\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 		      "BogoMips:\t%lu.%02lu\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 		      "Calibration:\t%lu loops\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 		      cpu, mmu, fpu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 		      clockfreq / 1000000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 		      (clockfreq / 100000) % 10,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 		      (loops_per_jiffy * HZ) / 500000,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 		      ((loops_per_jiffy * HZ) / 5000) % 100,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 		      (loops_per_jiffy * HZ));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) static void *c_start(struct seq_file *m, loff_t *pos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 	return *pos < NR_CPUS ? ((void *) 0x12345678) : NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) static void *c_next(struct seq_file *m, void *v, loff_t *pos)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	++*pos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 	return c_start(m, pos);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) static void c_stop(struct seq_file *m, void *v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) const struct seq_operations cpuinfo_op = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	.start	= c_start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	.next	= c_next,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	.stop	= c_stop,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 	.show	= show_cpuinfo,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)