Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2)  * linux/arch/m68k/kernel/ints.c -- Linux/m68k general interrupt handling code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4)  * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5)  * License.  See the file COPYING in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <linux/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #include <asm/traps.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #include <asm/page.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <asm/machdep.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <asm/cacheflush.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) #include <asm/irq_regs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #ifdef CONFIG_Q40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #include <asm/q40ints.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) extern u32 auto_irqhandler_fixup[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) extern u16 user_irqvec_fixup[];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) static int m68k_first_user_vec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) static struct irq_chip auto_irq_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) 	.name		= "auto",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 	.irq_startup	= m68k_irq_startup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) 	.irq_shutdown	= m68k_irq_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) static struct irq_chip user_irq_chip = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) 	.name		= "user",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 	.irq_startup	= m68k_irq_startup,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) 	.irq_shutdown	= m68k_irq_shutdown,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47)  * void init_IRQ(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49)  * Parameters:	None
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51)  * Returns:	Nothing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53)  * This function should be called during kernel startup to initialize
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54)  * the IRQ handling routines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) void __init init_IRQ(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) 	for (i = IRQ_AUTO_1; i <= IRQ_AUTO_7; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) 		irq_set_chip_and_handler(i, &auto_irq_chip, handle_simple_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) 	mach_init_IRQ();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68)  * m68k_setup_auto_interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69)  * @handler: called from auto vector interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71)  * setup the handler to be called from auto vector interrupts instead of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72)  * standard do_IRQ(), it will be called with irq numbers in the range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73)  * from IRQ_AUTO_1 - IRQ_AUTO_7.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) void __init m68k_setup_auto_interrupt(void (*handler)(unsigned int, struct pt_regs *))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) 	if (handler)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 		*auto_irqhandler_fixup = (u32)handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) 	flush_icache();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83)  * m68k_setup_user_interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84)  * @vec: first user vector interrupt to handle
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85)  * @cnt: number of active user vector interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87)  * setup user vector interrupts, this includes activating the specified range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88)  * of interrupts, only then these interrupts can be requested (note: this is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89)  * different from auto vector interrupts).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) void __init m68k_setup_user_interrupt(unsigned int vec, unsigned int cnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) 	BUG_ON(IRQ_USER + cnt > NR_IRQS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) 	m68k_first_user_vec = vec;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	for (i = 0; i < cnt; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) 		irq_set_chip_and_handler(i, &user_irq_chip, handle_simple_irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	*user_irqvec_fixup = vec - IRQ_USER;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	flush_icache();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)  * m68k_setup_irq_controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)  * @chip: irq chip which controls specified irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)  * @handle: flow handler which handles specified irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)  * @irq: first irq to be managed by the controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)  * @cnt: number of irqs to be managed by the controller
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)  * Change the controller for the specified range of irq, which will be used to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111)  * manage these irq. auto/user irq already have a default controller, which can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)  * be changed as well, but the controller probably should use m68k_irq_startup/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)  * m68k_irq_shutdown.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) void m68k_setup_irq_controller(struct irq_chip *chip,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 			       irq_flow_handler_t handle, unsigned int irq,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) 			       unsigned int cnt)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	for (i = 0; i < cnt; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 		irq_set_chip(irq + i, chip);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) 		if (handle)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 			irq_set_handler(irq + i, handle);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) unsigned int m68k_irq_startup_irq(unsigned int irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	if (irq <= IRQ_AUTO_7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		vectors[VEC_SPUR + irq] = auto_inthandler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 		vectors[m68k_first_user_vec + irq - IRQ_USER] = user_inthandler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 	return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) unsigned int m68k_irq_startup(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	return m68k_irq_startup_irq(data->irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) void m68k_irq_shutdown(struct irq_data *data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 	unsigned int irq = data->irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	if (irq <= IRQ_AUTO_7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		vectors[VEC_SPUR + irq] = bad_inthandler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 		vectors[m68k_first_user_vec + irq - IRQ_USER] = bad_inthandler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) unsigned int irq_canonicalize(unsigned int irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #ifdef CONFIG_Q40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	if (MACH_IS_Q40 && irq == 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 		irq = 10;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	return irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) EXPORT_SYMBOL(irq_canonicalize);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) asmlinkage void handle_badint(struct pt_regs *regs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	atomic_inc(&irq_err_count);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	pr_warn("unexpected interrupt from %u\n", regs->vector);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }