^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* -*- mode: asm -*-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) **
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ** head.S -- This file contains the initial boot code for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) ** Linux/68k kernel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) **
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) ** Copyright 1993 by Hamish Macdonald
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) **
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) ** 68040 fixes by Michael Rausch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) ** 68060 fixes by Roman Hodek
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) ** MMU cleanup by Randy Thelen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) ** Final MMU cleanup by Roman Zippel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) **
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) ** Atari support by Andreas Schwab, using ideas of Robert de Vries
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) ** and Bjoern Brauel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) ** VME Support by Richard Hirst
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) **
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) ** 94/11/14 Andreas Schwab: put kernel at PAGESIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) ** 94/11/18 Andreas Schwab: remove identity mapping of STRAM for Atari
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) ** ++ Bjoern & Roman: ATARI-68040 support for the Medusa
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) ** 95/11/18 Richard Hirst: Added MVME166 support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) ** 96/04/26 Guenther Kelleter: fixed identity mapping for Falcon with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) ** Magnum- and FX-alternate ram
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) ** 98/04/25 Phil Blundell: added HP300 support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) ** 1998/08/30 David Kilzer: Added support for font_desc structures
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) ** for linux-2.1.115
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) ** 1999/02/11 Richard Zidlicky: added Q40 support (initial version 99/01/01)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) ** 2004/05/13 Kars de Jong: Finalised HP300 support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) **
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) ** This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) ** License. See the file README.legal in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) ** for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) **
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) * Linux startup code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * At this point, the boot loader has:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * Disabled interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * Disabled caches
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * Put us in supervisor state.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * The kernel setup code takes the following steps:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) * . Raise interrupt level
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) * . Set up initial kernel memory mapping.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * . This sets up a mapping of the 4M of memory the kernel is located in.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) * . It also does a mapping of any initial machine specific areas.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) * . Enable the MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * . Enable cache memories
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * . Jump to kernel startup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) * Much of the file restructuring was to accomplish:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) * 1) Remove register dependency through-out the file.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) * 2) Increase use of subroutines to perform functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) * 3) Increase readability of the code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) * Of course, readability is a subjective issue, so it will never be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) * argued that that goal was accomplished. It was merely a goal.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) * A key way to help make code more readable is to give good
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) * documentation. So, the first thing you will find is exhaustive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) * write-ups on the structure of the file, and the features of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) * functional subroutines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) * General Structure:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) * ------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) * Without a doubt the single largest chunk of head.S is spent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) * mapping the kernel and I/O physical space into the logical range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * for the kernel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * There are new subroutines and data structures to make MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * support cleaner and easier to understand.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * First, you will find a routine call "mmu_map" which maps
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * a logical to a physical region for some length given a cache
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * type on behalf of the caller. This routine makes writing the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) * actual per-machine specific code very simple.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) * A central part of the code, but not a subroutine in itself,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) * is the mmu_init code which is broken down into mapping the kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * (the same for all machines) and mapping machine-specific I/O
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * regions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) * Also, there will be a description of engaging the MMU and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) * caches.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) * You will notice that there is a chunk of code which
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) * can emit the entire MMU mapping of the machine. This is present
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) * only in debug modes and can be very helpful.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) * Further, there is a new console driver in head.S that is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * also only engaged in debug mode. Currently, it's only supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * on the Macintosh class of machines. However, it is hoped that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * others will plug-in support for specific machines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * ######################################################################
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) * mmu_map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) * -------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * mmu_map was written for two key reasons. First, it was clear
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * that it was very difficult to read the previous code for mapping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * regions of memory. Second, the Macintosh required such extensive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * memory allocations that it didn't make sense to propagate the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * existing code any further.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * mmu_map requires some parameters:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * mmu_map (logical, physical, length, cache_type)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) * While this essentially describes the function in the abstract, you'll
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * find more indepth description of other parameters at the implementation site.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) * mmu_get_root_table_entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) * ------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) * mmu_get_ptr_table_entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * -----------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * mmu_get_page_table_entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * ------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * These routines are used by other mmu routines to get a pointer into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) * a table, if necessary a new table is allocated. These routines are working
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) * basically like pmd_alloc() and pte_alloc() in <asm/pgtable.h>. The root
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) * table needs of course only to be allocated once in mmu_get_root_table_entry,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * so that here also some mmu specific initialization is done. The second page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * at the start of the kernel (the first page is unmapped later) is used for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * the kernel_pg_dir. It must be at a position known at link time (as it's used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * to initialize the init task struct) and since it needs special cache
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * settings, it's the easiest to use this page, the rest of the page is used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * for further pointer tables.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * mmu_get_page_table_entry allocates always a whole page for page tables, this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * means 1024 pages and so 4MB of memory can be mapped. It doesn't make sense
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * to manage page tables in smaller pieces as nearly all mappings have that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) * size.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) * ######################################################################
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) * ######################################################################
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) * mmu_engage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) * ----------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) * Thanks to a small helping routine enabling the mmu got quite simple
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) * and there is only one way left. mmu_engage makes a complete a new mapping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) * that only includes the absolute necessary to be able to jump to the final
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) * position and to restore the original mapping.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) * As this code doesn't need a transparent translation register anymore this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) * means all registers are free to be used by machines that needs them for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) * other purposes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * ######################################################################
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) * mmu_print
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) * ---------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) * This algorithm will print out the page tables of the system as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) * appropriate for an 030 or an 040. This is useful for debugging purposes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) * and as such is enclosed in #ifdef MMU_PRINT/#endif clauses.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) * ######################################################################
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) * console_init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) * ------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) * The console is also able to be turned off. The console in head.S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) * is specifically for debugging and can be very useful. It is surrounded by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) * #ifdef / #endif clauses so it doesn't have to ship in known-good
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) * kernels. It's basic algorithm is to determine the size of the screen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) * (in height/width and bit depth) and then use that information for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) * displaying an 8x8 font or an 8x16 (widthxheight). I prefer the 8x8 for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) * debugging so I can see more good data. But it was trivial to add support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) * for both fonts, so I included it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) * Also, the algorithm for plotting pixels is abstracted so that in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) * theory other platforms could add support for different kinds of frame
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) * buffers. This could be very useful.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) * console_put_penguin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) * -------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) * An important part of any Linux bring up is the penguin and there's
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) * nothing like getting the Penguin on the screen! This algorithm will work
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) * on any machine for which there is a console_plot_pixel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) * console_scroll
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) * --------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) * My hope is that the scroll algorithm does the right thing on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) * various platforms, but it wouldn't be hard to add the test conditions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) * and new code if it doesn't.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) * console_putc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) * -------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) * ######################################################################
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) * Register usage has greatly simplified within head.S. Every subroutine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) * saves and restores all registers that it modifies (except it returns a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) * value in there of course). So the only register that needs to be initialized
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) * is the stack pointer.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) * All other init code and data is now placed in the init section, so it will
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) * be automatically freed at the end of the kernel initialization.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) * ######################################################################
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) * options
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) * -------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) * There are many options available in a build of this file. I've
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) * taken the time to describe them here to save you the time of searching
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) * for them and trying to understand what they mean.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) * CONFIG_xxx: These are the obvious machine configuration defines created
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) * during configuration. These are defined in autoconf.h.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) * CONSOLE_DEBUG: Only supports a Mac frame buffer but could easily be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) * extended to support other platforms.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) * TEST_MMU: This is a test harness for running on any given machine but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) * getting an MMU dump for another class of machine. The classes of machines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) * that can be tested are any of the makes (Atari, Amiga, Mac, VME, etc.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) * and any of the models (030, 040, 060, etc.).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) * NOTE: TEST_MMU is NOT permanent! It is scheduled to be removed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) * When head.S boots on Atari, Amiga, Macintosh, and VME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) * machines. At that point the underlying logic will be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) * believed to be solid enough to be trusted, and TEST_MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) * can be dropped. Do note that that will clean up the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) * head.S code significantly as large blocks of #if/#else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) * clauses can be removed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) * MMU_NOCACHE_KERNEL: On the Macintosh platform there was an inquiry into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) * determing why devices don't appear to work. A test case was to remove
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) * the cacheability of the kernel bits.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) * MMU_PRINT: There is a routine built into head.S that can display the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) * MMU data structures. It outputs its result through the serial_putc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) * interface. So where ever that winds up driving data, that's where the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) * mmu struct will appear.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) * SERIAL_DEBUG: There are a series of putc() macro statements
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) * scattered through out the code to give progress of status to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) * person sitting at the console. This constant determines whether those
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) * are used.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) * DEBUG: This is the standard DEBUG flag that can be set for building
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) * the kernel. It has the effect adding additional tests into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) * the code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) * FONT_6x11:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) * FONT_8x8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) * FONT_8x16:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) * In theory these could be determined at run time or handed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) * over by the booter. But, let's be real, it's a fine hard
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) * coded value. (But, you will notice the code is run-time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) * flexible!) A pointer to the font's struct font_desc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) * is kept locally in Lconsole_font. It is used to determine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) * font size information dynamically.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) * Atari constants:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) * USE_PRINTER: Use the printer port for serial debug.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) * USE_SCC_B: Use the SCC port A (Serial2) for serial debug.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) * USE_SCC_A: Use the SCC port B (Modem2) for serial debug.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) * USE_MFP: Use the ST-MFP port (Modem1) for serial debug.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) * Macintosh constants:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) * MAC_USE_SCC_A: Use SCC port A (modem) for serial debug.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) * MAC_USE_SCC_B: Use SCC port B (printer) for serial debug.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) #include <linux/linkage.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) #include <linux/pgtable.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) #include <asm/bootinfo.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) #include <asm/bootinfo-amiga.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) #include <asm/bootinfo-atari.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) #include <asm/bootinfo-hp300.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) #include <asm/bootinfo-mac.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) #include <asm/bootinfo-q40.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) #include <asm/bootinfo-vme.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) #include <asm/entry.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) #include <asm/page.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) #include <asm/asm-offsets.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) #ifdef CONFIG_MAC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) # include <asm/machw.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) #ifdef CONFIG_EARLY_PRINTK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) # define SERIAL_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) # if defined(CONFIG_MAC) && defined(CONFIG_FONT_SUPPORT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) # define CONSOLE_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) # endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) #undef MMU_PRINT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) #undef MMU_NOCACHE_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) #undef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) * For the head.S console, there are three supported fonts, 6x11, 8x16 and 8x8.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) * The 8x8 font is harder to read but fits more on the screen.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) #define FONT_8x8 /* default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) /* #define FONT_8x16 */ /* 2nd choice */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) /* #define FONT_6x11 */ /* 3rd choice */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) .globl kernel_pg_dir
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) .globl availmem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) .globl m68k_init_mapped_size
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) .globl m68k_pgtable_cachemode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) .globl m68k_supervisor_cachemode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) #ifdef CONFIG_MVME16x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) .globl mvme_bdid
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) #ifdef CONFIG_Q40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) .globl q40_mem_cptr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) CPUTYPE_040 = 1 /* indicates an 040 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) CPUTYPE_060 = 2 /* indicates an 060 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) CPUTYPE_0460 = 3 /* if either above are set, this is set */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) CPUTYPE_020 = 4 /* indicates an 020 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) /* Translation control register */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) TC_ENABLE = 0x8000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) TC_PAGE8K = 0x4000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) TC_PAGE4K = 0x0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) /* Transparent translation registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) TTR_ENABLE = 0x8000 /* enable transparent translation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) TTR_ANYMODE = 0x4000 /* user and kernel mode access */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) TTR_KERNELMODE = 0x2000 /* only kernel mode access */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) TTR_USERMODE = 0x0000 /* only user mode access */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) TTR_CI = 0x0400 /* inhibit cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) TTR_RW = 0x0200 /* read/write mode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) TTR_RWM = 0x0100 /* read/write mask */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) TTR_FCB2 = 0x0040 /* function code base bit 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) TTR_FCB1 = 0x0020 /* function code base bit 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) TTR_FCB0 = 0x0010 /* function code base bit 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) TTR_FCM2 = 0x0004 /* function code mask bit 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) TTR_FCM1 = 0x0002 /* function code mask bit 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) TTR_FCM0 = 0x0001 /* function code mask bit 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) /* Cache Control registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) CC6_ENABLE_D = 0x80000000 /* enable data cache (680[46]0) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) CC6_FREEZE_D = 0x40000000 /* freeze data cache (68060) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) CC6_ENABLE_SB = 0x20000000 /* enable store buffer (68060) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) CC6_PUSH_DPI = 0x10000000 /* disable CPUSH invalidation (68060) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) CC6_HALF_D = 0x08000000 /* half-cache mode for data cache (68060) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) CC6_ENABLE_B = 0x00800000 /* enable branch cache (68060) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) CC6_CLRA_B = 0x00400000 /* clear all entries in branch cache (68060) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) CC6_CLRU_B = 0x00200000 /* clear user entries in branch cache (68060) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) CC6_ENABLE_I = 0x00008000 /* enable instruction cache (680[46]0) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) CC6_FREEZE_I = 0x00004000 /* freeze instruction cache (68060) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) CC6_HALF_I = 0x00002000 /* half-cache mode for instruction cache (68060) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) CC3_ALLOC_WRITE = 0x00002000 /* write allocate mode(68030) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) CC3_ENABLE_DB = 0x00001000 /* enable data burst (68030) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) CC3_CLR_D = 0x00000800 /* clear data cache (68030) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) CC3_CLRE_D = 0x00000400 /* clear entry in data cache (68030) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) CC3_FREEZE_D = 0x00000200 /* freeze data cache (68030) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) CC3_ENABLE_D = 0x00000100 /* enable data cache (68030) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) CC3_ENABLE_IB = 0x00000010 /* enable instruction burst (68030) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) CC3_CLR_I = 0x00000008 /* clear instruction cache (68030) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) CC3_CLRE_I = 0x00000004 /* clear entry in instruction cache (68030) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) CC3_FREEZE_I = 0x00000002 /* freeze instruction cache (68030) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) CC3_ENABLE_I = 0x00000001 /* enable instruction cache (68030) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) /* Miscellaneous definitions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) PAGESIZE = 4096
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) PAGESHIFT = 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) ROOT_TABLE_SIZE = 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) PTR_TABLE_SIZE = 128
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) PAGE_TABLE_SIZE = 64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) ROOT_INDEX_SHIFT = 25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) PTR_INDEX_SHIFT = 18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) PAGE_INDEX_SHIFT = 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) #ifdef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) /* When debugging use readable names for labels */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) #ifdef __STDC__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) #define L(name) .head.S.##name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) #define L(name) .head.S./**/name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) #ifdef __STDC__
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) #define L(name) .L##name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) #define L(name) .L/**/name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) /* The __INITDATA stuff is a no-op when ftrace or kgdb are turned on */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) #ifndef __INITDATA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) #define __INITDATA .data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) #define __FINIT .previous
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) /* Several macros to make the writing of subroutines easier:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) * - func_start marks the beginning of the routine which setups the frame
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) * register and saves the registers, it also defines another macro
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) * to automatically restore the registers again.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) * - func_return marks the end of the routine and simply calls the prepared
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) * macro to restore registers and jump back to the caller.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) * - func_define generates another macro to automatically put arguments
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) * onto the stack call the subroutine and cleanup the stack again.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) /* Within subroutines these macros can be used to access the arguments
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) * on the stack. With STACK some allocated memory on the stack can be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) * accessed and ARG0 points to the return address (used by mmu_engage).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) #define STACK %a6@(stackstart)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) #define ARG0 %a6@(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) #define ARG1 %a6@(8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) #define ARG2 %a6@(12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) #define ARG3 %a6@(16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) #define ARG4 %a6@(20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) .macro func_start name,saveregs,stack=0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) L(\name):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) linkw %a6,#-\stack
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) moveml \saveregs,%sp@-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) .set stackstart,-\stack
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) .macro func_return_\name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) moveml %sp@+,\saveregs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) unlk %a6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) .macro func_return name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) func_return_\name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) .macro func_call name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) jbsr L(\name)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) .macro move_stack nr,arg1,arg2,arg3,arg4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) .if \nr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) move_stack "(\nr-1)",\arg2,\arg3,\arg4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) movel \arg1,%sp@-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) .macro func_define name,nr=0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) .macro \name arg1,arg2,arg3,arg4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) move_stack \nr,\arg1,\arg2,\arg3,\arg4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) func_call \name
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) .if \nr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) lea %sp@(\nr*4),%sp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) .endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) func_define mmu_map,4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) func_define mmu_map_tt,4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) func_define mmu_fixup_page_mmu_cache,1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) func_define mmu_temp_map,2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) func_define mmu_engage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) func_define mmu_get_root_table_entry,1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) func_define mmu_get_ptr_table_entry,2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) func_define mmu_get_page_table_entry,2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) func_define mmu_print
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) func_define get_new_page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) func_define set_leds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) .macro mmu_map_eq arg1,arg2,arg3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) mmu_map \arg1,\arg1,\arg2,\arg3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) .macro get_bi_record record
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) pea \record
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) func_call get_bi_record
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) addql #4,%sp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) func_define serial_putc,1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) func_define console_putc,1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) func_define console_init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) func_define console_put_penguin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) func_define console_plot_pixel,3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) func_define console_scroll
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) .macro putc ch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) #if defined(CONSOLE_DEBUG) || defined(SERIAL_DEBUG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) pea \ch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) #ifdef CONSOLE_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) func_call console_putc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) #ifdef SERIAL_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) func_call serial_putc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) #if defined(CONSOLE_DEBUG) || defined(SERIAL_DEBUG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) addql #4,%sp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) .macro dputc ch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) #ifdef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) putc \ch
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) func_define putn,1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) .macro dputn nr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) #ifdef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) putn \nr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) .macro puts string
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) #if defined(CONSOLE_DEBUG) || defined(SERIAL_DEBUG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) __INITDATA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) .Lstr\@:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) .string "\string"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) __FINIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) pea %pc@(.Lstr\@)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) func_call puts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) addql #4,%sp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) .macro dputs string
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) #ifdef DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) puts "\string"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) #define is_not_amiga(lab) cmpl &MACH_AMIGA,%pc@(m68k_machtype); jne lab
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) #define is_not_atari(lab) cmpl &MACH_ATARI,%pc@(m68k_machtype); jne lab
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) #define is_not_mac(lab) cmpl &MACH_MAC,%pc@(m68k_machtype); jne lab
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) #define is_not_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jne lab
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) #define is_not_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jne lab
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) #define is_not_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jne lab
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) #define is_mvme147(lab) cmpl &MACH_MVME147,%pc@(m68k_machtype); jeq lab
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) #define is_mvme16x(lab) cmpl &MACH_MVME16x,%pc@(m68k_machtype); jeq lab
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) #define is_bvme6000(lab) cmpl &MACH_BVME6000,%pc@(m68k_machtype); jeq lab
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) #define is_not_hp300(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); jne lab
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) #define is_not_apollo(lab) cmpl &MACH_APOLLO,%pc@(m68k_machtype); jne lab
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) #define is_not_q40(lab) cmpl &MACH_Q40,%pc@(m68k_machtype); jne lab
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) #define is_not_sun3x(lab) cmpl &MACH_SUN3X,%pc@(m68k_machtype); jne lab
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) #define hasnt_leds(lab) cmpl &MACH_HP300,%pc@(m68k_machtype); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) jeq 42f; \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) cmpl &MACH_APOLLO,%pc@(m68k_machtype); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) jne lab ;\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) 42:\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) #define is_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jne lab
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) #define is_not_040_or_060(lab) btst &CPUTYPE_0460,%pc@(L(cputype)+3); jeq lab
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) #define is_040(lab) btst &CPUTYPE_040,%pc@(L(cputype)+3); jne lab
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) #define is_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jne lab
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) #define is_not_060(lab) btst &CPUTYPE_060,%pc@(L(cputype)+3); jeq lab
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) #define is_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jne lab
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) #define is_not_020(lab) btst &CPUTYPE_020,%pc@(L(cputype)+3); jeq lab
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) /* On the HP300 we use the on-board LEDs for debug output before
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) the console is running. Writing a 1 bit turns the corresponding LED
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) _off_ - on the 340 bit 7 is towards the back panel of the machine. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) .macro leds mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) hasnt_leds(.Lled\@)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) pea \mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) func_call set_leds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) addql #4,%sp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) .Lled\@:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) .endm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) __HEAD
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) ENTRY(_stext)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) * Version numbers of the bootinfo interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) * The area from _stext to _start will later be used as kernel pointer table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) bras 1f /* Jump over bootinfo version numbers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) .long BOOTINFOV_MAGIC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) .long MACH_AMIGA, AMIGA_BOOTI_VERSION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) .long MACH_ATARI, ATARI_BOOTI_VERSION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) .long MACH_MVME147, MVME147_BOOTI_VERSION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) .long MACH_MVME16x, MVME16x_BOOTI_VERSION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) .long MACH_BVME6000, BVME6000_BOOTI_VERSION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) .long MACH_MAC, MAC_BOOTI_VERSION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) .long MACH_Q40, Q40_BOOTI_VERSION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) .long MACH_HP300, HP300_BOOTI_VERSION
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) .long 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) 1: jra __start
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) .equ kernel_pg_dir,_stext
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) .equ .,_stext+PAGESIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) ENTRY(_start)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) jra __start
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) __INIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) ENTRY(__start)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) * Setup initial stack pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) lea %pc@(_stext),%sp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) * Record the CPU and machine type.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) get_bi_record BI_MACHTYPE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) lea %pc@(m68k_machtype),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) movel %a0@,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) get_bi_record BI_FPUTYPE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) lea %pc@(m68k_fputype),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) movel %a0@,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) get_bi_record BI_MMUTYPE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) lea %pc@(m68k_mmutype),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) movel %a0@,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) get_bi_record BI_CPUTYPE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) lea %pc@(m68k_cputype),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) movel %a0@,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) leds 0x1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) #ifdef CONFIG_MAC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) * For Macintosh, we need to determine the display parameters early (at least
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) * while debugging it).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) is_not_mac(L(test_notmac))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) get_bi_record BI_MAC_VADDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) lea %pc@(L(mac_videobase)),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) movel %a0@,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) get_bi_record BI_MAC_VDEPTH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) lea %pc@(L(mac_videodepth)),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) movel %a0@,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) get_bi_record BI_MAC_VDIM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) lea %pc@(L(mac_dimensions)),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) movel %a0@,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) get_bi_record BI_MAC_VROW
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) lea %pc@(L(mac_rowbytes)),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) movel %a0@,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) get_bi_record BI_MAC_SCCBASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) lea %pc@(L(mac_sccbase)),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) movel %a0@,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) L(test_notmac):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) #endif /* CONFIG_MAC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) * There are ultimately two pieces of information we want for all kinds of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) * processors CpuType and CacheBits. The CPUTYPE was passed in from booter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) * and is converted here from a booter type definition to a separate bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) * number which allows for the standard is_0x0 macro tests.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) movel %pc@(m68k_cputype),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) * Assume it's an 030
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) clrl %d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) * Test the BootInfo cputype for 060
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) btst #CPUB_68060,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) jeq 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) bset #CPUTYPE_060,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) bset #CPUTYPE_0460,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) jra 3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) * Test the BootInfo cputype for 040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) btst #CPUB_68040,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) jeq 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) bset #CPUTYPE_040,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) bset #CPUTYPE_0460,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) jra 3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) * Test the BootInfo cputype for 020
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) btst #CPUB_68020,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) jeq 3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) bset #CPUTYPE_020,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) jra 3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) * Record the cpu type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) lea %pc@(L(cputype)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) movel %d1,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) * NOTE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) * Now the macros are valid:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) * is_040_or_060
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) * is_not_040_or_060
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) * is_040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) * is_060
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) * is_not_060
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) * Determine the cache mode for pages holding MMU tables
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) * and for supervisor mode, unused for '020 and '030
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) clrl %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) clrl %d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) is_not_040_or_060(L(save_cachetype))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) * '040 or '060
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) * d1 := cacheable write-through
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) * NOTE: The 68040 manual strongly recommends non-cached for MMU tables,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) * but we have been using write-through since at least 2.0.29 so I
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) * guess it is OK.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) #ifdef CONFIG_060_WRITETHROUGH
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) * If this is a 68060 board using drivers with cache coherency
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) * problems, then supervisor memory accesses need to be write-through
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) * also; otherwise, we want copyback.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) is_not_060(1f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) movel #_PAGE_CACHE040W,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) jra L(save_cachetype)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) #endif /* CONFIG_060_WRITETHROUGH */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) movew #_PAGE_CACHE040,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) movel #_PAGE_CACHE040W,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) L(save_cachetype):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) /* Save cache mode for supervisor mode and page tables
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) lea %pc@(m68k_supervisor_cachemode),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) movel %d0,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) lea %pc@(m68k_pgtable_cachemode),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) movel %d1,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) * raise interrupt level
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) movew #0x2700,%sr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) If running on an Atari, determine the I/O base of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) serial port and test if we are running on a Medusa or Hades.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) This test is necessary here, because on the Hades the serial
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) port is only accessible in the high I/O memory area.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) The test whether it is a Medusa is done by writing to the byte at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758) phys. 0x0. This should result in a bus error on all other machines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) ...should, but doesn't. The Afterburner040 for the Falcon has the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) same behaviour (0x0..0x7 are no ROM shadow). So we have to do
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) another test to distinguish Medusa and AB040. This is a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) read attempt for 0x00ff82fe phys. that should bus error on a Falcon
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) (+AB040), but is in the range where the Medusa always asserts DTACK.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) The test for the Hades is done by reading address 0xb0000000. This
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) should give a bus error on the Medusa.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) #ifdef CONFIG_ATARI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) is_not_atari(L(notypetest))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) /* get special machine type (Medusa/Hades/AB40) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) moveq #0,%d3 /* default if tag doesn't exist */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) get_bi_record BI_ATARI_MCH_TYPE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) tstl %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) jbmi 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) movel %a0@,%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) lea %pc@(atari_mch_type),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) movel %d3,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) /* On the Hades, the iobase must be set up before opening the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) * serial port. There are no I/O regs at 0x00ffxxxx at all. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) moveq #0,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) cmpl #ATARI_MACH_HADES,%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) jbne 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) movel #0xff000000,%d0 /* Hades I/O base addr: 0xff000000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) 1: lea %pc@(L(iobase)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) movel %d0,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) L(notypetest):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) #ifdef CONFIG_VME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) is_mvme147(L(getvmetype))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) is_bvme6000(L(getvmetype))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) is_not_mvme16x(L(gvtdone))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) /* See if the loader has specified the BI_VME_TYPE tag. Recent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) * versions of VMELILO and TFTPLILO do this. We have to do this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) * early so we know how to handle console output. If the tag
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) * doesn't exist then we use the Bug for output on MVME16x.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) L(getvmetype):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) get_bi_record BI_VME_TYPE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) tstl %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) jbmi 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) movel %a0@,%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) lea %pc@(vme_brdtype),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) movel %d3,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) #ifdef CONFIG_MVME16x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) is_not_mvme16x(L(gvtdone))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) /* Need to get the BRD_ID info to differentiate between 162, 167,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) * etc. This is available as a BI_VME_BRDINFO tag with later
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) * versions of VMELILO and TFTPLILO, otherwise we call the Bug.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) get_bi_record BI_VME_BRDINFO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) tstl %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) jpl 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) /* Get pointer to board ID data from Bug */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) movel %d2,%sp@-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) trap #15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) .word 0x70 /* trap 0x70 - .BRD_ID */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) movel %sp@+,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) lea %pc@(mvme_bdid),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) /* Structure is 32 bytes long */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) movel %a0@+,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) movel %a0@+,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) movel %a0@+,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) movel %a0@+,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) movel %a0@+,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) movel %a0@+,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) movel %a0@+,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) movel %a0@+,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) L(gvtdone):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) #ifdef CONFIG_HP300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) is_not_hp300(L(nothp))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) /* Get the address of the UART for serial debugging */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) get_bi_record BI_HP300_UART_ADDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) tstl %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) jbmi 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) movel %a0@,%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) lea %pc@(L(uartbase)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) movel %d3,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) get_bi_record BI_HP300_UART_SCODE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) tstl %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) jbmi 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) movel %a0@,%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) lea %pc@(L(uart_scode)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) movel %d3,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) L(nothp):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) * Initialize serial port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) jbsr L(serial_init)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) * Initialize console
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) #ifdef CONFIG_MAC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) is_not_mac(L(nocon))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) # ifdef CONSOLE_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) console_init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) # ifdef CONFIG_LOGO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) console_put_penguin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) # endif /* CONFIG_LOGO */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) # endif /* CONSOLE_DEBUG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) L(nocon):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) #endif /* CONFIG_MAC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) putc '\n'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) putc 'A'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) leds 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) dputn %pc@(L(cputype))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) dputn %pc@(m68k_supervisor_cachemode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) dputn %pc@(m68k_pgtable_cachemode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) dputc '\n'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) * Save physical start address of kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) lea %pc@(L(phys_kernel_start)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) lea %pc@(_stext),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) subl #_stext,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) addl #PAGE_OFFSET,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) movel %a1,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) putc 'B'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) leds 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) * mmu_init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) * This block of code does what's necessary to map in the various kinds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910) * of machines for execution of Linux.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) * First map the first 4, 8, or 16 MB of kernel code & data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) get_bi_record BI_MEMCHUNK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) movel %a0@(4),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) movel #16*1024*1024,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) cmpl %d0,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) jls 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) lsrl #1,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) cmpl %d0,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) jls 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) lsrl #1,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) lea %pc@(m68k_init_mapped_size),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) movel %d1,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) mmu_map #PAGE_OFFSET,%pc@(L(phys_kernel_start)),%d1,\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) %pc@(m68k_supervisor_cachemode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) putc 'C'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) #ifdef CONFIG_AMIGA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) L(mmu_init_amiga):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) is_not_amiga(L(mmu_init_not_amiga))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) * mmu_init_amiga
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) putc 'D'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) is_not_040_or_060(1f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) * 040: Map the 16Meg range physical 0x0 up to logical 0x8000.0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) mmu_map #0x80000000,#0,#0x01000000,#_PAGE_NOCACHE_S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949) * Map the Zorro III I/O space with transparent translation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) * for frame buffer memory etc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE_S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954) jbra L(mmu_init_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) * 030: Map the 32Meg range physical 0x0 up to logical 0x8000.0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960) mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) mmu_map_tt #1,#0x40000000,#0x20000000,#_PAGE_NOCACHE030
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) jbra L(mmu_init_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965) L(mmu_init_not_amiga):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) #ifdef CONFIG_ATARI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) L(mmu_init_atari):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) is_not_atari(L(mmu_init_not_atari))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) putc 'E'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) /* On the Atari, we map the I/O region (phys. 0x00ffxxxx) by mapping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) the last 16 MB of virtual address space to the first 16 MB (i.e.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) 0xffxxxxxx -> 0x00xxxxxx). For this, an additional pointer table is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) needed. I/O ranges are marked non-cachable.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981) For the Medusa it is better to map the I/O region transparently
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) (i.e. 0xffxxxxxx -> 0xffxxxxxx), because some I/O registers are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) accessible only in the high area.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 984)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 985) On the Hades all I/O registers are only accessible in the high
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 986) area.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 987) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 988)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 989) /* I/O base addr for non-Medusa, non-Hades: 0x00000000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 990) moveq #0,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 991) movel %pc@(atari_mch_type),%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 992) cmpl #ATARI_MACH_MEDUSA,%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 993) jbeq 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 994) cmpl #ATARI_MACH_HADES,%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 995) jbne 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 996) 2: movel #0xff000000,%d0 /* Medusa/Hades base addr: 0xff000000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 997) 1: movel %d0,%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 998)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 999) is_040_or_060(L(spata68040))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1001) /* Map everything non-cacheable, though not all parts really
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1002) * need to disable caches (crucial only for 0xff8000..0xffffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1003) * (standard I/O) and 0xf00000..0xf3ffff (IDE)). The remainder
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1004) * isn't really used, except for sometimes peeking into the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1005) * ROMs (mirror at phys. 0x0), so caching isn't necessary for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1006) * this. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1007) mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE030
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1009) jbra L(mmu_init_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1010)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1011) L(spata68040):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1012)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1013) mmu_map #0xff000000,%d3,#0x01000000,#_PAGE_NOCACHE_S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1014)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1015) jbra L(mmu_init_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1016)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1017) L(mmu_init_not_atari):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1018) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1019)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1020) #ifdef CONFIG_Q40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1021) is_not_q40(L(notq40))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1022) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1023) * add transparent mapping for 0xff00 0000 - 0xffff ffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1024) * non-cached serialized etc..
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1025) * this includes master chip, DAC, RTC and ISA ports
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1026) * 0xfe000000-0xfeffffff is for screen and ROM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1027) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1028)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1029) putc 'Q'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1030)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1031) mmu_map_tt #0,#0xfe000000,#0x01000000,#_PAGE_CACHE040W
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1032) mmu_map_tt #1,#0xff000000,#0x01000000,#_PAGE_NOCACHE_S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1033)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1034) jbra L(mmu_init_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1035)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1036) L(notq40):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1037) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1038)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1039) #ifdef CONFIG_HP300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1040) is_not_hp300(L(nothp300))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1041)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1042) /* On the HP300, we map the ROM, INTIO and DIO regions (phys. 0x00xxxxxx)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1043) * by mapping 32MB (on 020/030) or 16 MB (on 040) from 0xf0xxxxxx -> 0x00xxxxxx).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1044) * The ROM mapping is needed because the LEDs are mapped there too.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1045) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1046)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1047) is_040(1f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1048)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1049) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1050) * 030: Map the 32Meg range physical 0x0 up to logical 0xf000.0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1051) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1052) mmu_map #0xf0000000,#0,#0x02000000,#_PAGE_NOCACHE030
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1053)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1054) jbra L(mmu_init_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1055)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1056) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1057) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1058) * 040: Map the 16Meg range physical 0x0 up to logical 0xf000.0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1059) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1060) mmu_map #0xf0000000,#0,#0x01000000,#_PAGE_NOCACHE_S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1061)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1062) jbra L(mmu_init_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1063)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1064) L(nothp300):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1065) #endif /* CONFIG_HP300 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1066)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1067) #ifdef CONFIG_MVME147
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1068)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1069) is_not_mvme147(L(not147))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1070)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1071) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1072) * On MVME147 we have already created kernel page tables for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1073) * 4MB of RAM at address 0, so now need to do a transparent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1074) * mapping of the top of memory space. Make it 0.5GByte for now,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1075) * so we can access on-board i/o areas.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1076) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1077)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1078) mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE030
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1079)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1080) jbra L(mmu_init_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1081)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1082) L(not147):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1083) #endif /* CONFIG_MVME147 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1084)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1085) #ifdef CONFIG_MVME16x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1086)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1087) is_not_mvme16x(L(not16x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1088)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1089) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1090) * On MVME16x we have already created kernel page tables for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1091) * 4MB of RAM at address 0, so now need to do a transparent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1092) * mapping of the top of memory space. Make it 0.5GByte for now.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1093) * Supervisor only access, so transparent mapping doesn't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1094) * clash with User code virtual address space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1095) * this covers IO devices, PROM and SRAM. The PROM and SRAM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1096) * mapping is needed to allow 167Bug to run.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1097) * IO is in the range 0xfff00000 to 0xfffeffff.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1098) * PROM is 0xff800000->0xffbfffff and SRAM is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1099) * 0xffe00000->0xffe1ffff.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1100) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1102) mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1104) jbra L(mmu_init_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1106) L(not16x):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1107) #endif /* CONFIG_MVME162 | CONFIG_MVME167 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1109) #ifdef CONFIG_BVME6000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1111) is_not_bvme6000(L(not6000))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1113) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1114) * On BVME6000 we have already created kernel page tables for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1115) * 4MB of RAM at address 0, so now need to do a transparent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1116) * mapping of the top of memory space. Make it 0.5GByte for now,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1117) * so we can access on-board i/o areas.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1118) * Supervisor only access, so transparent mapping doesn't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1119) * clash with User code virtual address space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1120) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1122) mmu_map_tt #1,#0xe0000000,#0x20000000,#_PAGE_NOCACHE_S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1124) jbra L(mmu_init_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1126) L(not6000):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1127) #endif /* CONFIG_BVME6000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1129) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1130) * mmu_init_mac
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1131) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1132) * The Macintosh mappings are less clear.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1133) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1134) * Even as of this writing, it is unclear how the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1135) * Macintosh mappings will be done. However, as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1136) * the first author of this code I'm proposing the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1137) * following model:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1138) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1139) * Map the kernel (that's already done),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1140) * Map the I/O (on most machines that's the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1141) * 0x5000.0000 ... 0x5300.0000 range,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1142) * Map the video frame buffer using as few pages
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1143) * as absolutely (this requirement mostly stems from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1144) * the fact that when the frame buffer is at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1145) * 0x0000.0000 then we know there is valid RAM just
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1146) * above the screen that we don't want to waste!).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1147) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1148) * By the way, if the frame buffer is at 0x0000.0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1149) * then the Macintosh is known as an RBV based Mac.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1150) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1151) * By the way 2, the code currently maps in a bunch of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1152) * regions. But I'd like to cut that out. (And move most
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1153) * of the mappings up into the kernel proper ... or only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1154) * map what's necessary.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1155) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1157) #ifdef CONFIG_MAC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1159) L(mmu_init_mac):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1160)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1161) is_not_mac(L(mmu_init_not_mac))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1163) putc 'F'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1164)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1165) is_not_040_or_060(1f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1166)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1167) moveq #_PAGE_NOCACHE_S,%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1168) jbra 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1169) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1170) moveq #_PAGE_NOCACHE030,%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1171) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1172) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1173) * Mac Note: screen address of logical 0xF000.0000 -> <screen physical>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1174) * we simply map the 4MB that contains the videomem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1175) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1176)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1177) movel #VIDEOMEMMASK,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1178) andl %pc@(L(mac_videobase)),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1180) mmu_map #VIDEOMEMBASE,%d0,#VIDEOMEMSIZE,%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1181) /* ROM from 4000 0000 to 4200 0000 (only for mac_reset()) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1182) mmu_map_eq #0x40000000,#0x02000000,%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1183) /* IO devices (incl. serial port) from 5000 0000 to 5300 0000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1184) mmu_map_eq #0x50000000,#0x03000000,%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1185) /* Nubus slot space (video at 0xF0000000, rom at 0xF0F80000) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1186) mmu_map_tt #1,#0xf8000000,#0x08000000,%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1187)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1188) jbra L(mmu_init_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1190) L(mmu_init_not_mac):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1191) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1193) #ifdef CONFIG_SUN3X
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1194) is_not_sun3x(L(notsun3x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1195)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1196) /* oh, the pain.. We're gonna want the prom code after
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1197) * starting the MMU, so we copy the mappings, translating
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1198) * from 8k -> 4k pages as we go.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1199) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1201) /* copy maps from 0xfee00000 to 0xff000000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1202) movel #0xfee00000, %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1203) moveq #ROOT_INDEX_SHIFT, %d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1204) lsrl %d1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1205) mmu_get_root_table_entry %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1207) movel #0xfee00000, %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1208) moveq #PTR_INDEX_SHIFT, %d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1209) lsrl %d1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1210) andl #PTR_TABLE_SIZE-1, %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1211) mmu_get_ptr_table_entry %a0,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1213) movel #0xfee00000, %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1214) moveq #PAGE_INDEX_SHIFT, %d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1215) lsrl %d1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1216) andl #PAGE_TABLE_SIZE-1, %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1217) mmu_get_page_table_entry %a0,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1219) /* this is where the prom page table lives */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1220) movel 0xfefe00d4, %a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1221) movel %a1@, %a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1222)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1223) movel #((0x200000 >> 13)-1), %d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1224)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1225) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1226) movel %a1@+, %d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1227) movel %d3,%a0@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1228) addl #0x1000,%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1229) movel %d3,%a0@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1230)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1231) dbra %d1,1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1233) /* setup tt1 for I/O */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1234) mmu_map_tt #1,#0x40000000,#0x40000000,#_PAGE_NOCACHE_S
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1235) jbra L(mmu_init_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1237) L(notsun3x):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1238) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1240) #ifdef CONFIG_APOLLO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1241) is_not_apollo(L(notapollo))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1243) putc 'P'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1244) mmu_map #0x80000000,#0,#0x02000000,#_PAGE_NOCACHE030
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1245)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1246) L(notapollo):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1247) jbra L(mmu_init_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1248) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1249)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1250) L(mmu_init_done):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1252) putc 'G'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1253) leds 0x8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1255) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1256) * mmu_fixup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1257) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1258) * On the 040 class machines, all pages that are used for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1259) * mmu have to be fixed up. According to Motorola, pages holding mmu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1260) * tables should be non-cacheable on a '040 and write-through on a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1261) * '060. But analysis of the reasons for this, and practical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1262) * experience, showed that write-through also works on a '040.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1263) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1264) * Allocated memory so far goes from kernel_end to memory_start that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1265) * is used for all kind of tables, for that the cache attributes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1266) * are now fixed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1267) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1268) L(mmu_fixup):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1269)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1270) is_not_040_or_060(L(mmu_fixup_done))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1271)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1272) #ifdef MMU_NOCACHE_KERNEL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1273) jbra L(mmu_fixup_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1274) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1275)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1276) /* first fix the page at the start of the kernel, that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1277) * contains also kernel_pg_dir.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1278) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1279) movel %pc@(L(phys_kernel_start)),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1280) subl #PAGE_OFFSET,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1281) lea %pc@(_stext),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1282) subl %d0,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1283) mmu_fixup_page_mmu_cache %a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1284)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1285) movel %pc@(L(kernel_end)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1286) subl %d0,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1287) movel %pc@(L(memory_start)),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1288) subl %d0,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1289) bra 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1290) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1291) mmu_fixup_page_mmu_cache %a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1292) addw #PAGESIZE,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1293) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1294) cmpl %a0,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1295) jgt 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1296)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1297) L(mmu_fixup_done):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1298)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1299) #ifdef MMU_PRINT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1300) mmu_print
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1301) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1302)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1303) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1304) * mmu_engage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1305) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1306) * This chunk of code performs the gruesome task of engaging the MMU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1307) * The reason it's gruesome is because when the MMU becomes engaged it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1308) * maps logical addresses to physical addresses. The Program Counter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1309) * register is then passed through the MMU before the next instruction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1310) * is fetched (the instruction following the engage MMU instruction).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1311) * This may mean one of two things:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1312) * 1. The Program Counter falls within the logical address space of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1313) * the kernel of which there are two sub-possibilities:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1314) * A. The PC maps to the correct instruction (logical PC == physical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1315) * code location), or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1316) * B. The PC does not map through and the processor will read some
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1317) * data (or instruction) which is not the logically next instr.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1318) * As you can imagine, A is good and B is bad.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1319) * Alternatively,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1320) * 2. The Program Counter does not map through the MMU. The processor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1321) * will take a Bus Error.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1322) * Clearly, 2 is bad.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1323) * It doesn't take a wiz kid to figure you want 1.A.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1324) * This code creates that possibility.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1325) * There are two possible 1.A. states (we now ignore the other above states):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1326) * A. The kernel is located at physical memory addressed the same as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1327) * the logical memory for the kernel, i.e., 0x01000.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1328) * B. The kernel is located some where else. e.g., 0x0400.0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1329) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1330) * Under some conditions the Macintosh can look like A or B.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1331) * [A friend and I once noted that Apple hardware engineers should be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1332) * wacked twice each day: once when they show up at work (as in, Whack!,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1333) * "This is for the screwy hardware we know you're going to design today."),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1334) * and also at the end of the day (as in, Whack! "I don't know what
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1335) * you designed today, but I'm sure it wasn't good."). -- rst]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1336) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1337) * This code works on the following premise:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1338) * If the kernel start (%d5) is within the first 16 Meg of RAM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1339) * then create a mapping for the kernel at logical 0x8000.0000 to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1340) * the physical location of the pc. And, create a transparent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1341) * translation register for the first 16 Meg. Then, after the MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1342) * is engaged, the PC can be moved up into the 0x8000.0000 range
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1343) * and then the transparent translation can be turned off and then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1344) * the PC can jump to the correct logical location and it will be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1345) * home (finally). This is essentially the code that the Amiga used
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1346) * to use. Now, it's generalized for all processors. Which means
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1347) * that a fresh (but temporary) mapping has to be created. The mapping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1348) * is made in page 0 (an as of yet unused location -- except for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1349) * stack!). This temporary mapping will only require 1 pointer table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1350) * and a single page table (it can map 256K).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1351) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1352) * OK, alternatively, imagine that the Program Counter is not within
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1353) * the first 16 Meg. Then, just use Transparent Translation registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1354) * to do the right thing.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1355) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1356) * Last, if _start is already at 0x01000, then there's nothing special
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1357) * to do (in other words, in a degenerate case of the first case above,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1358) * do nothing).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1359) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1360) * Let's do it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1361) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1362) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1363) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1364)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1365) putc 'H'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1366)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1367) mmu_engage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1369) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1370) * After this point no new memory is allocated and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1371) * the start of available memory is stored in availmem.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1372) * (The bootmem allocator requires now the physical address.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1373) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1374)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1375) movel L(memory_start),availmem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1377) #ifdef CONFIG_AMIGA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1378) is_not_amiga(1f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1379) /* fixup the Amiga custom register location before printing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1380) clrl L(custom)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1381) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1382) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1383)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1384) #ifdef CONFIG_ATARI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1385) is_not_atari(1f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1386) /* fixup the Atari iobase register location before printing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1387) movel #0xff000000,L(iobase)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1388) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1389) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1390)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1391) #ifdef CONFIG_MAC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1392) is_not_mac(1f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1393) movel #~VIDEOMEMMASK,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1394) andl L(mac_videobase),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1395) addl #VIDEOMEMBASE,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1396) movel %d0,L(mac_videobase)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1397) #ifdef CONSOLE_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1398) movel %pc@(L(phys_kernel_start)),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1399) subl #PAGE_OFFSET,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1400) subl %d0,L(console_font)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1401) subl %d0,L(console_font_data)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1402) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1403) orl #0x50000000,L(mac_sccbase)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1404) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1405) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1406)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1407) #ifdef CONFIG_HP300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1408) is_not_hp300(2f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1409) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1410) * Fix up the iobase register to point to the new location of the LEDs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1411) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1412) movel #0xf0000000,L(iobase)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1413)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1414) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1415) * Energise the FPU and caches.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1416) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1417) is_040(1f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1418) movel #0x60,0xf05f400c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1419) jbra 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1420)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1421) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1422) * 040: slightly different, apparently.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1423) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1424) 1: movew #0,0xf05f400e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1425) movew #0x64,0xf05f400e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1426) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1427) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1429) #ifdef CONFIG_SUN3X
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1430) is_not_sun3x(1f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1431)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1432) /* enable copro */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1433) oriw #0x4000,0x61000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1434) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1435) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1436)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1437) #ifdef CONFIG_APOLLO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1438) is_not_apollo(1f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1439)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1440) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1441) * Fix up the iobase before printing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1442) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1443) movel #0x80000000,L(iobase)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1444) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1445) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1447) putc 'I'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1448) leds 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1450) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1451) * Enable caches
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1452) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1453)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1454) is_not_040_or_060(L(cache_not_680460))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1456) L(cache680460):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1457) .chip 68040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1458) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1459) cpusha %bc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1460) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1461)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1462) is_060(L(cache68060))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1464) movel #CC6_ENABLE_D+CC6_ENABLE_I,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1465) /* MMU stuff works in copyback mode now, so enable the cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1466) movec %d0,%cacr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1467) jra L(cache_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1468)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1469) L(cache68060):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1470) movel #CC6_ENABLE_D+CC6_ENABLE_I+CC6_ENABLE_SB+CC6_PUSH_DPI+CC6_ENABLE_B+CC6_CLRA_B,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1471) /* MMU stuff works in copyback mode now, so enable the cache */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1472) movec %d0,%cacr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1473) /* enable superscalar dispatch in PCR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1474) moveq #1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1475) .chip 68060
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1476) movec %d0,%pcr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1477)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1478) jbra L(cache_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1479) L(cache_not_680460):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1480) L(cache68030):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1481) .chip 68030
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1482) movel #CC3_ENABLE_DB+CC3_CLR_D+CC3_ENABLE_D+CC3_ENABLE_IB+CC3_CLR_I+CC3_ENABLE_I,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1483) movec %d0,%cacr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1485) jra L(cache_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1486) .chip 68k
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1487) L(cache_done):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1488)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1489) putc 'J'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1491) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1492) * Setup initial stack pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1493) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1494) lea init_task,%curptr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1495) lea init_thread_union+THREAD_SIZE,%sp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1497) putc 'K'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1498)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1499) subl %a6,%a6 /* clear a6 for gdb */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1500)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1501) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1502) * The new 64bit printf support requires an early exception initialization.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1503) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1504) jbsr base_trap_init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1505)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1506) /* jump to the kernel start */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1508) putc '\n'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1509) leds 0x55
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1511) jbsr start_kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1513) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1514) * Find a tag record in the bootinfo structure
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1515) * The bootinfo structure is located right after the kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1516) * Returns: d0: size (-1 if not found)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1517) * a0: data pointer (end-of-records if not found)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1518) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1519) func_start get_bi_record,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1520)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1521) movel ARG1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1522) lea %pc@(_end),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1523) 1: tstw %a0@(BIR_TAG)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1524) jeq 3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1525) cmpw %a0@(BIR_TAG),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1526) jeq 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1527) addw %a0@(BIR_SIZE),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1528) jra 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1529) 2: moveq #0,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1530) movew %a0@(BIR_SIZE),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1531) lea %a0@(BIR_DATA),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1532) jra 4f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1533) 3: moveq #-1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1534) lea %a0@(BIR_SIZE),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1535) 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1536) func_return get_bi_record
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1539) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1540) * MMU Initialization Begins Here
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1541) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1542) * The structure of the MMU tables on the 68k machines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1543) * is thus:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1544) * Root Table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1545) * Logical addresses are translated through
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1546) * a hierarchical translation mechanism where the high-order
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1547) * seven bits of the logical address (LA) are used as an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1548) * index into the "root table." Each entry in the root
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1549) * table has a bit which specifies if it's a valid pointer to a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1550) * pointer table. Each entry defines a 32Meg range of memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1551) * If an entry is invalid then that logical range of 32M is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1552) * invalid and references to that range of memory (when the MMU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1553) * is enabled) will fault. If the entry is valid, then it does
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1554) * one of two things. On 040/060 class machines, it points to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1555) * a pointer table which then describes more finely the memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1556) * within that 32M range. On 020/030 class machines, a technique
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1557) * called "early terminating descriptors" are used. This technique
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1558) * allows an entire 32Meg to be described by a single entry in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1559) * root table. Thus, this entry in the root table, contains the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1560) * physical address of the memory or I/O at the logical address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1561) * which the entry represents and it also contains the necessary
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1562) * cache bits for this region.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1563) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1564) * Pointer Tables
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1565) * Per the Root Table, there will be one or more
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1566) * pointer tables. Each pointer table defines a 32M range.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1567) * Not all of the 32M range need be defined. Again, the next
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1568) * seven bits of the logical address are used an index into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1569) * the pointer table to point to page tables (if the pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1570) * is valid). There will undoubtedly be more than one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1571) * pointer table for the kernel because each pointer table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1572) * defines a range of only 32M. Valid pointer table entries
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1573) * point to page tables, or are early terminating entries
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1574) * themselves.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1575) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1576) * Page Tables
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1577) * Per the Pointer Tables, each page table entry points
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1578) * to the physical page in memory that supports the logical
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1579) * address that translates to the particular index.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1580) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1581) * In short, the Logical Address gets translated as follows:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1582) * bits 31..26 - index into the Root Table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1583) * bits 25..18 - index into the Pointer Table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1584) * bits 17..12 - index into the Page Table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1585) * bits 11..0 - offset into a particular 4K page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1586) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1587) * The algorithms which follow do one thing: they abstract
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1588) * the MMU hardware. For example, there are three kinds of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1589) * cache settings that are relevant. Either, memory is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1590) * being mapped in which case it is either Kernel Code (or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1591) * the RamDisk) or it is MMU data. On the 030, the MMU data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1592) * option also describes the kernel. Or, I/O is being mapped
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1593) * in which case it has its own kind of cache bits. There
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1594) * are constants which abstract these notions from the code that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1595) * actually makes the call to map some range of memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1596) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1597) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1598) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1599) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1601) #ifdef MMU_PRINT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1602) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1603) * mmu_print
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1604) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1605) * This algorithm will print out the current MMU mappings.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1606) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1607) * Input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1608) * %a5 points to the root table. Everything else is calculated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1609) * from this.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1610) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1612) #define mmu_next_valid 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1613) #define mmu_start_logical 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1614) #define mmu_next_logical 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1615) #define mmu_start_physical 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1616) #define mmu_next_physical 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1618) #define MMU_PRINT_INVALID -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1619) #define MMU_PRINT_VALID 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1620) #define MMU_PRINT_UNINITED 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1622) #define putZc(z,n) jbne 1f; putc z; jbra 2f; 1: putc n; 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1623)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1624) func_start mmu_print,%a0-%a6/%d0-%d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1625)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1626) movel %pc@(L(kernel_pgdir_ptr)),%a5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1627) lea %pc@(L(mmu_print_data)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1628) movel #MMU_PRINT_UNINITED,%a0@(mmu_next_valid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1629)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1630) is_not_040_or_060(mmu_030_print)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1631)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1632) mmu_040_print:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1633) puts "\nMMU040\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1634) puts "rp:"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1635) putn %a5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1636) putc '\n'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1637) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1638) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1639) * The following #if/#endif block is a tight algorithm for dumping the 040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1640) * MMU Map in gory detail. It really isn't that practical unless the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1641) * MMU Map algorithm appears to go awry and you need to debug it at the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1642) * entry per entry level.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1643) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1644) movel #ROOT_TABLE_SIZE,%d5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1645) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1646) movel %a5@+,%d7 | Burn an entry to skip the kernel mappings,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1647) subql #1,%d5 | they (might) work
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1648) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1649) 1: tstl %d5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1650) jbeq mmu_print_done
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1651) subq #1,%d5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1652) movel %a5@+,%d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1653) btst #1,%d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1654) jbeq 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1656) 2: putn %d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1657) andil #0xFFFFFE00,%d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1658) movel %d7,%a4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1659) movel #PTR_TABLE_SIZE,%d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1660) putc ' '
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1661) 3: tstl %d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1662) jbeq 11f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1663) subq #1,%d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1664) movel %a4@+,%d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1665) btst #1,%d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1666) jbeq 3b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1668) 4: putn %d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1669) andil #0xFFFFFF00,%d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1670) movel %d7,%a3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1671) movel #PAGE_TABLE_SIZE,%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1672) 5: movel #8,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1673) 6: tstl %d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1674) jbeq 31f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1675) subq #1,%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1676) movel %a3@+,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1677) btst #0,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1678) jbeq 6b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1679) 7: tstl %d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1680) jbeq 8f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1681) subq #1,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1682) putc ' '
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1683) jbra 91f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1684) 8: putc '\n'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1685) movel #8+1+8+1+1,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1686) 9: putc ' '
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1687) dbra %d2,9b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1688) movel #7,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1689) 91: putn %d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1690) jbra 6b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1691)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1692) 31: putc '\n'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1693) movel #8+1,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1694) 32: putc ' '
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1695) dbra %d2,32b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1696) jbra 3b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1697)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1698) 11: putc '\n'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1699) jbra 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1700) #endif /* MMU 040 Dumping code that's gory and detailed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1701)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1702) lea %pc@(kernel_pg_dir),%a5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1703) movel %a5,%a0 /* a0 has the address of the root table ptr */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1704) movel #0x00000000,%a4 /* logical address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1705) moveql #0,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1706) 40:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1707) /* Increment the logical address and preserve in d5 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1708) movel %a4,%d5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1709) addil #PAGESIZE<<13,%d5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1710) movel %a0@+,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1711) btst #1,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1712) jbne 41f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1713) jbsr mmu_print_tuple_invalidate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1714) jbra 48f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1715) 41:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1716) movel #0,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1717) andil #0xfffffe00,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1718) movel %d6,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1719) 42:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1720) movel %a4,%d5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1721) addil #PAGESIZE<<6,%d5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1722) movel %a1@+,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1723) btst #1,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1724) jbne 43f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1725) jbsr mmu_print_tuple_invalidate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1726) jbra 47f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1727) 43:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1728) movel #0,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1729) andil #0xffffff00,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1730) movel %d6,%a2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1731) 44:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1732) movel %a4,%d5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1733) addil #PAGESIZE,%d5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1734) movel %a2@+,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1735) btst #0,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1736) jbne 45f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1737) jbsr mmu_print_tuple_invalidate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1738) jbra 46f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1739) 45:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1740) moveml %d0-%d1,%sp@-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1741) movel %a4,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1742) movel %d6,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1743) andil #0xfffff4e0,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1744) lea %pc@(mmu_040_print_flags),%a6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1745) jbsr mmu_print_tuple
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1746) moveml %sp@+,%d0-%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1747) 46:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1748) movel %d5,%a4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1749) addq #1,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1750) cmpib #64,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1751) jbne 44b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1752) 47:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1753) movel %d5,%a4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1754) addq #1,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1755) cmpib #128,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1756) jbne 42b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1757) 48:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1758) movel %d5,%a4 /* move to the next logical address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1759) addq #1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1760) cmpib #128,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1761) jbne 40b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1762)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1763) .chip 68040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1764) movec %dtt1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1765) movel %d0,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1766) andiw #0x8000,%d1 /* is it valid ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1767) jbeq 1f /* No, bail out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1769) movel %d0,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1770) andil #0xff000000,%d1 /* Get the address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1771) putn %d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1772) puts "=="
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1773) putn %d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1774)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1775) movel %d0,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1776) jbsr mmu_040_print_flags_tt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1777) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1778) movec %dtt0,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1779) movel %d0,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1780) andiw #0x8000,%d1 /* is it valid ? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1781) jbeq 1f /* No, bail out */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1782)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1783) movel %d0,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1784) andil #0xff000000,%d1 /* Get the address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1785) putn %d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1786) puts "=="
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1787) putn %d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1789) movel %d0,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1790) jbsr mmu_040_print_flags_tt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1791) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1792) .chip 68k
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1794) jbra mmu_print_done
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1796) mmu_040_print_flags:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1797) btstl #10,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1798) putZc(' ','G') /* global bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1799) btstl #7,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1800) putZc(' ','S') /* supervisor bit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1801) mmu_040_print_flags_tt:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1802) btstl #6,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1803) jbne 3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1804) putc 'C'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1805) btstl #5,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1806) putZc('w','c') /* write through or copy-back */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1807) jbra 4f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1808) 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1809) putc 'N'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1810) btstl #5,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1811) putZc('s',' ') /* serialized non-cacheable, or non-cacheable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1812) 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1813) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1815) mmu_030_print_flags:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1816) btstl #6,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1817) putZc('C','I') /* write through or copy-back */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1818) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1820) mmu_030_print:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1821) puts "\nMMU030\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1822) puts "\nrp:"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1823) putn %a5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1824) putc '\n'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1825) movel %a5,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1826) andil #0xfffffff0,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1827) movel %d0,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1828) movel #0x00000000,%a4 /* logical address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1829) movel #0,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1830) 30:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1831) movel %a4,%d5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1832) addil #PAGESIZE<<13,%d5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1833) movel %a0@+,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1834) btst #1,%d6 /* is it a table ptr? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1835) jbne 31f /* yes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1836) btst #0,%d6 /* is it early terminating? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1837) jbeq 1f /* no */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1838) jbsr mmu_030_print_helper
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1839) jbra 38f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1840) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1841) jbsr mmu_print_tuple_invalidate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1842) jbra 38f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1843) 31:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1844) movel #0,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1845) andil #0xfffffff0,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1846) movel %d6,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1847) 32:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1848) movel %a4,%d5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1849) addil #PAGESIZE<<6,%d5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1850) movel %a1@+,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1851) btst #1,%d6 /* is it a table ptr? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1852) jbne 33f /* yes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1853) btst #0,%d6 /* is it a page descriptor? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1854) jbeq 1f /* no */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1855) jbsr mmu_030_print_helper
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1856) jbra 37f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1857) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1858) jbsr mmu_print_tuple_invalidate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1859) jbra 37f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1860) 33:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1861) movel #0,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1862) andil #0xfffffff0,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1863) movel %d6,%a2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1864) 34:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1865) movel %a4,%d5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1866) addil #PAGESIZE,%d5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1867) movel %a2@+,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1868) btst #0,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1869) jbne 35f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1870) jbsr mmu_print_tuple_invalidate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1871) jbra 36f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1872) 35:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1873) jbsr mmu_030_print_helper
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1874) 36:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1875) movel %d5,%a4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1876) addq #1,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1877) cmpib #64,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1878) jbne 34b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1879) 37:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1880) movel %d5,%a4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1881) addq #1,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1882) cmpib #128,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1883) jbne 32b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1884) 38:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1885) movel %d5,%a4 /* move to the next logical address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1886) addq #1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1887) cmpib #128,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1888) jbne 30b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1889)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1890) mmu_print_done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1891) puts "\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1892)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1893) func_return mmu_print
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1894)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1895)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1896) mmu_030_print_helper:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1897) moveml %d0-%d1,%sp@-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1898) movel %a4,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1899) movel %d6,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1900) lea %pc@(mmu_030_print_flags),%a6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1901) jbsr mmu_print_tuple
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1902) moveml %sp@+,%d0-%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1903) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1904)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1905) mmu_print_tuple_invalidate:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1906) moveml %a0/%d7,%sp@-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1907)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1908) lea %pc@(L(mmu_print_data)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1909) tstl %a0@(mmu_next_valid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1910) jbmi mmu_print_tuple_invalidate_exit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1911)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1912) movel #MMU_PRINT_INVALID,%a0@(mmu_next_valid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1913)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1914) putn %a4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1915)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1916) puts "##\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1917)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1918) mmu_print_tuple_invalidate_exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1919) moveml %sp@+,%a0/%d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1920) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1921)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1922)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1923) mmu_print_tuple:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1924) moveml %d0-%d7/%a0,%sp@-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1925)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1926) lea %pc@(L(mmu_print_data)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1927)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1928) tstl %a0@(mmu_next_valid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1929) jble mmu_print_tuple_print
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1930)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1931) cmpl %a0@(mmu_next_physical),%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1932) jbeq mmu_print_tuple_increment
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1933)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1934) mmu_print_tuple_print:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1935) putn %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1936) puts "->"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1937) putn %d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1938)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1939) movel %d1,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1940) jbsr %a6@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1942) mmu_print_tuple_record:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1943) movel #MMU_PRINT_VALID,%a0@(mmu_next_valid)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1944)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1945) movel %d1,%a0@(mmu_next_physical)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1946)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1947) mmu_print_tuple_increment:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1948) movel %d5,%d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1949) subl %a4,%d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1950) addl %d7,%a0@(mmu_next_physical)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1951)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1952) mmu_print_tuple_exit:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1953) moveml %sp@+,%d0-%d7/%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1954) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1955)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1956) mmu_print_machine_cpu_types:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1957) puts "machine: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1958)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1959) is_not_amiga(1f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1960) puts "amiga"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1961) jbra 9f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1962) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1963) is_not_atari(2f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1964) puts "atari"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1965) jbra 9f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1966) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1967) is_not_mac(3f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1968) puts "macintosh"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1969) jbra 9f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1970) 3: puts "unknown"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1971) 9: putc '\n'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1972)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1973) puts "cputype: 0"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1974) is_not_060(1f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1975) putc '6'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1976) jbra 9f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1977) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1978) is_not_040_or_060(2f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1979) putc '4'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1980) jbra 9f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1981) 2: putc '3'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1982) 9: putc '0'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1983) putc '\n'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1984)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1985) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1986) #endif /* MMU_PRINT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1987)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1988) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1989) * mmu_map_tt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1990) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1991) * This is a specific function which works on all 680x0 machines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1992) * On 030, 040 & 060 it will attempt to use Transparent Translation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1993) * registers (tt1).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1994) * On 020 it will call the standard mmu_map which will use early
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1995) * terminating descriptors.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1996) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1997) func_start mmu_map_tt,%d0/%d1/%a0,4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1998)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1999) dputs "mmu_map_tt:"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2000) dputn ARG1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2001) dputn ARG2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2002) dputn ARG3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2003) dputn ARG4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2004) dputc '\n'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2005)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2006) is_020(L(do_map))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2007)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2008) /* Extract the highest bit set
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2009) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2010) bfffo ARG3{#0,#32},%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2011) cmpw #8,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2012) jcc L(do_map)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2013)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2014) /* And get the mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2015) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2016) moveq #-1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2017) lsrl %d1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2018) lsrl #1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2019)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2020) /* Mask the address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2021) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2022) movel %d0,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2023) notl %d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2024) andl ARG2,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2025)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2026) /* Generate the upper 16bit of the tt register
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2027) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2028) lsrl #8,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2029) orl %d0,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2030) clrw %d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2031)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2032) is_040_or_060(L(mmu_map_tt_040))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2033)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2034) /* set 030 specific bits (read/write access for supervisor mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2035) * (highest function code set, lower two bits masked))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2036) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2037) orw #TTR_ENABLE+TTR_RWM+TTR_FCB2+TTR_FCM1+TTR_FCM0,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2038) movel ARG4,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2039) btst #6,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2040) jeq 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2041) orw #TTR_CI,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2042)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2043) 1: lea STACK,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2044) dputn %d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2045) movel %d1,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2046) .chip 68030
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2047) tstl ARG1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2048) jne 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2049) pmove %a0@,%tt0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2050) jra 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2051) 1: pmove %a0@,%tt1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2052) 2: .chip 68k
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2053) jra L(mmu_map_tt_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2054)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2055) /* set 040 specific bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2056) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2057) L(mmu_map_tt_040):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2058) orw #TTR_ENABLE+TTR_KERNELMODE,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2059) orl ARG4,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2060) dputn %d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2061)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2062) .chip 68040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2063) tstl ARG1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2064) jne 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2065) movec %d1,%itt0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2066) movec %d1,%dtt0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2067) jra 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2068) 1: movec %d1,%itt1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2069) movec %d1,%dtt1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2070) 2: .chip 68k
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2071)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2072) jra L(mmu_map_tt_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2073)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2074) L(do_map):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2075) mmu_map_eq ARG2,ARG3,ARG4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2076)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2077) L(mmu_map_tt_done):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2078)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2079) func_return mmu_map_tt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2080)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2081) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2082) * mmu_map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2083) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2084) * This routine will map a range of memory using a pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2085) * table and allocate the pages on the fly from the kernel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2086) * The pointer table does not have to be already linked into
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2087) * the root table, this routine will do that if necessary.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2088) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2089) * NOTE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2090) * This routine will assert failure and use the serial_putc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2091) * routines in the case of a run-time error. For example,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2092) * if the address is already mapped.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2093) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2094) * NOTE-2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2095) * This routine will use early terminating descriptors
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2096) * where possible for the 68020+68851 and 68030 type
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2097) * processors.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2098) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2099) func_start mmu_map,%d0-%d4/%a0-%a4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2101) dputs "\nmmu_map:"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2102) dputn ARG1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2103) dputn ARG2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2104) dputn ARG3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2105) dputn ARG4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2106) dputc '\n'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2108) /* Get logical address and round it down to 256KB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2109) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2110) movel ARG1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2111) andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2112) movel %d0,%a3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2114) /* Get the end address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2115) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2116) movel ARG1,%a4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2117) addl ARG3,%a4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2118) subql #1,%a4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2119)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2120) /* Get physical address and round it down to 256KB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2121) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2122) movel ARG2,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2123) andl #-(PAGESIZE*PAGE_TABLE_SIZE),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2124) movel %d0,%a2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2125)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2126) /* Add page attributes to the physical address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2127) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2128) movel ARG4,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2129) orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2130) addw %d0,%a2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2132) dputn %a2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2133) dputn %a3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2134) dputn %a4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2136) is_not_040_or_060(L(mmu_map_030))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2138) addw #_PAGE_GLOBAL040,%a2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2139) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2140) * MMU 040 & 060 Support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2141) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2142) * The MMU usage for the 040 and 060 is different enough from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2143) * the 030 and 68851 that there is separate code. This comment
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2144) * block describes the data structures and algorithms built by
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2145) * this code.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2146) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2147) * The 040 does not support early terminating descriptors, as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2148) * the 030 does. Therefore, a third level of table is needed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2149) * for the 040, and that would be the page table. In Linux,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2150) * page tables are allocated directly from the memory above the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2151) * kernel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2152) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2153) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2155) L(mmu_map_040):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2156) /* Calculate the offset into the root table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2157) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2158) movel %a3,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2159) moveq #ROOT_INDEX_SHIFT,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2160) lsrl %d1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2161) mmu_get_root_table_entry %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2162)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2163) /* Calculate the offset into the pointer table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2164) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2165) movel %a3,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2166) moveq #PTR_INDEX_SHIFT,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2167) lsrl %d1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2168) andl #PTR_TABLE_SIZE-1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2169) mmu_get_ptr_table_entry %a0,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2171) /* Calculate the offset into the page table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2172) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2173) movel %a3,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2174) moveq #PAGE_INDEX_SHIFT,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2175) lsrl %d1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2176) andl #PAGE_TABLE_SIZE-1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2177) mmu_get_page_table_entry %a0,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2179) /* The page table entry must not no be busy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2180) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2181) tstl %a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2182) jne L(mmu_map_error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2184) /* Do the mapping and advance the pointers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2185) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2186) movel %a2,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2187) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2188) addw #PAGESIZE,%a2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2189) addw #PAGESIZE,%a3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2190)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2191) /* Ready with mapping?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2192) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2193) lea %a3@(-1),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2194) cmpl %a0,%a4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2195) jhi L(mmu_map_040)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2196) jra L(mmu_map_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2198) L(mmu_map_030):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2199) /* Calculate the offset into the root table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2200) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2201) movel %a3,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2202) moveq #ROOT_INDEX_SHIFT,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2203) lsrl %d1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2204) mmu_get_root_table_entry %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2205)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2206) /* Check if logical address 32MB aligned,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2207) * so we can try to map it once
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2208) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2209) movel %a3,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2210) andl #(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1)&(-ROOT_TABLE_SIZE),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2211) jne 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2212)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2213) /* Is there enough to map for 32MB at once
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2214) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2215) lea %a3@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE-1),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2216) cmpl %a1,%a4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2217) jcs 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2219) addql #1,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2220)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2221) /* The root table entry must not no be busy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2222) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2223) tstl %a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2224) jne L(mmu_map_error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2225)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2226) /* Do the mapping and advance the pointers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2227) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2228) dputs "early term1"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2229) dputn %a2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2230) dputn %a3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2231) dputn %a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2232) dputc '\n'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2233) movel %a2,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2234)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2235) movel %a1,%a3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2236) lea %a2@(PTR_TABLE_SIZE*PAGE_TABLE_SIZE*PAGESIZE),%a2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2237) jra L(mmu_mapnext_030)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2238) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2239) /* Calculate the offset into the pointer table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2240) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2241) movel %a3,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2242) moveq #PTR_INDEX_SHIFT,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2243) lsrl %d1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2244) andl #PTR_TABLE_SIZE-1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2245) mmu_get_ptr_table_entry %a0,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2246)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2247) /* The pointer table entry must not no be busy
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2248) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2249) tstl %a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2250) jne L(mmu_map_error)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2251)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2252) /* Do the mapping and advance the pointers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2253) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2254) dputs "early term2"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2255) dputn %a2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2256) dputn %a3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2257) dputc '\n'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2258) movel %a2,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2259)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2260) addl #PAGE_TABLE_SIZE*PAGESIZE,%a2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2261) addl #PAGE_TABLE_SIZE*PAGESIZE,%a3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2262)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2263) L(mmu_mapnext_030):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2264) /* Ready with mapping?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2265) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2266) lea %a3@(-1),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2267) cmpl %a0,%a4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2268) jhi L(mmu_map_030)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2269) jra L(mmu_map_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2270)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2271) L(mmu_map_error):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2272)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2273) dputs "mmu_map error:"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2274) dputn %a2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2275) dputn %a3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2276) dputc '\n'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2277)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2278) L(mmu_map_done):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2279)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2280) func_return mmu_map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2282) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2283) * mmu_fixup
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2284) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2285) * On the 040 class machines, all pages that are used for the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2286) * mmu have to be fixed up.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2287) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2289) func_start mmu_fixup_page_mmu_cache,%d0/%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2290)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2291) dputs "mmu_fixup_page_mmu_cache"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2292) dputn ARG1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2294) /* Calculate the offset into the root table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2295) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2296) movel ARG1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2297) moveq #ROOT_INDEX_SHIFT,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2298) lsrl %d1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2299) mmu_get_root_table_entry %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2301) /* Calculate the offset into the pointer table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2302) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2303) movel ARG1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2304) moveq #PTR_INDEX_SHIFT,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2305) lsrl %d1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2306) andl #PTR_TABLE_SIZE-1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2307) mmu_get_ptr_table_entry %a0,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2308)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2309) /* Calculate the offset into the page table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2310) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2311) movel ARG1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2312) moveq #PAGE_INDEX_SHIFT,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2313) lsrl %d1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2314) andl #PAGE_TABLE_SIZE-1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2315) mmu_get_page_table_entry %a0,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2316)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2317) movel %a0@,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2318) andil #_CACHEMASK040,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2319) orl %pc@(m68k_pgtable_cachemode),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2320) movel %d0,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2321)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2322) dputc '\n'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2323)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2324) func_return mmu_fixup_page_mmu_cache
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2325)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2326) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2327) * mmu_temp_map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2328) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2329) * create a temporary mapping to enable the mmu,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2330) * this we don't need any transparation translation tricks.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2331) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2332)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2333) func_start mmu_temp_map,%d0/%d1/%a0/%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2334)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2335) dputs "mmu_temp_map"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2336) dputn ARG1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2337) dputn ARG2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2338) dputc '\n'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2340) lea %pc@(L(temp_mmap_mem)),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2342) /* Calculate the offset in the root table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2343) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2344) movel ARG2,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2345) moveq #ROOT_INDEX_SHIFT,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2346) lsrl %d1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2347) mmu_get_root_table_entry %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2348)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2349) /* Check if the table is temporary allocated, so we have to reuse it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2350) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2351) movel %a0@,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2352) cmpl %pc@(L(memory_start)),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2353) jcc 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2355) /* Temporary allocate a ptr table and insert it into the root table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2356) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2357) movel %a1@,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2358) addl #PTR_TABLE_SIZE*4,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2359) orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2360) movel %d0,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2361) dputs " (new)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2362) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2363) dputn %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2364) /* Mask the root table entry for the ptr table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2365) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2366) andw #-ROOT_TABLE_SIZE,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2367) movel %d0,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2368)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2369) /* Calculate the offset into the pointer table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2370) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2371) movel ARG2,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2372) moveq #PTR_INDEX_SHIFT,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2373) lsrl %d1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2374) andl #PTR_TABLE_SIZE-1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2375) lea %a0@(%d0*4),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2376) dputn %a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2378) /* Check if a temporary page table is already allocated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2379) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2380) movel %a0@,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2381) jne 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2383) /* Temporary allocate a page table and insert it into the ptr table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2384) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2385) movel %a1@,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2386) /* The 512 should be PAGE_TABLE_SIZE*4, but that violates the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2387) alignment restriction for pointer tables on the '0[46]0. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2388) addl #512,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2389) orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2390) movel %d0,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2391) dputs " (new)"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2392) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2393) dputn %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2394) /* Mask the ptr table entry for the page table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2395) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2396) andw #-PTR_TABLE_SIZE,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2397) movel %d0,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2399) /* Calculate the offset into the page table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2400) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2401) movel ARG2,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2402) moveq #PAGE_INDEX_SHIFT,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2403) lsrl %d1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2404) andl #PAGE_TABLE_SIZE-1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2405) lea %a0@(%d0*4),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2406) dputn %a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2408) /* Insert the address into the page table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2409) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2410) movel ARG1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2411) andw #-PAGESIZE,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2412) orw #_PAGE_PRESENT+_PAGE_ACCESSED+_PAGE_DIRTY,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2413) movel %d0,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2414) dputn %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2415)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2416) dputc '\n'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2417)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2418) func_return mmu_temp_map
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2420) func_start mmu_engage,%d0-%d2/%a0-%a3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2421)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2422) moveq #ROOT_TABLE_SIZE-1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2423) /* Temporarily use a different root table. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2424) lea %pc@(L(kernel_pgdir_ptr)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2425) movel %a0@,%a2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2426) movel %pc@(L(memory_start)),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2427) movel %a1,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2428) movel %a2,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2429) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2430) movel %a0@+,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2431) dbra %d0,1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2432)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2433) lea %pc@(L(temp_mmap_mem)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2434) movel %a1,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2435)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2436) movew #PAGESIZE-1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2437) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2438) clrl %a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2439) dbra %d0,1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2441) lea %pc@(1b),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2442) movel #1b,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2443) /* Skip temp mappings if phys == virt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2444) cmpl %a0,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2445) jeq 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2446)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2447) mmu_temp_map %a0,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2448) mmu_temp_map %a0,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2450) addw #PAGESIZE,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2451) addw #PAGESIZE,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2452) mmu_temp_map %a0,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2453) mmu_temp_map %a0,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2454) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2455) movel %pc@(L(memory_start)),%a3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2456) movel %pc@(L(phys_kernel_start)),%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2457)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2458) is_not_040_or_060(L(mmu_engage_030))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2459)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2460) L(mmu_engage_040):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2461) .chip 68040
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2462) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2463) cinva %bc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2464) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2465) pflusha
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2466) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2467) movec %a3,%srp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2468) movel #TC_ENABLE+TC_PAGE4K,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2469) movec %d0,%tc /* enable the MMU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2470) jmp 1f:l
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2471) 1: nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2472) movec %a2,%srp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2473) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2474) cinva %bc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2475) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2476) pflusha
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2477) .chip 68k
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2478) jra L(mmu_engage_cleanup)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2479)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2480) L(mmu_engage_030_temp):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2481) .space 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2482) L(mmu_engage_030):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2483) .chip 68030
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2484) lea %pc@(L(mmu_engage_030_temp)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2485) movel #0x80000002,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2486) movel %a3,%a0@(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2487) movel #0x0808,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2488) movec %d0,%cacr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2489) pmove %a0@,%srp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2490) pflusha
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2491) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2492) * enable,super root enable,4096 byte pages,7 bit root index,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2493) * 7 bit pointer index, 6 bit page table index.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2494) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2495) movel #0x82c07760,%a0@(8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2496) pmove %a0@(8),%tc /* enable the MMU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2497) jmp 1f:l
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2498) 1: movel %a2,%a0@(4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2499) movel #0x0808,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2500) movec %d0,%cacr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2501) pmove %a0@,%srp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2502) pflusha
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2503) .chip 68k
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2504)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2505) L(mmu_engage_cleanup):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2506) subl #PAGE_OFFSET,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2507) subl %d2,%a2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2508) movel %a2,L(kernel_pgdir_ptr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2509) subl %d2,%fp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2510) subl %d2,%sp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2511) subl %d2,ARG0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2512)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2513) func_return mmu_engage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2514)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2515) func_start mmu_get_root_table_entry,%d0/%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2516)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2517) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2518) dputs "mmu_get_root_table_entry:"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2519) dputn ARG1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2520) dputs " ="
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2521) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2522)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2523) movel %pc@(L(kernel_pgdir_ptr)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2524) tstl %a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2525) jne 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2526)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2527) dputs "\nmmu_init:"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2529) /* Find the start of free memory, get_bi_record does this for us,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2530) * as the bootinfo structure is located directly behind the kernel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2531) * we simply search for the last entry.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2532) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2533) get_bi_record BI_LAST
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2534) addw #PAGESIZE-1,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2535) movel %a0,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2536) andw #-PAGESIZE,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2537)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2538) dputn %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2539)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2540) lea %pc@(L(memory_start)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2541) movel %d0,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2542) lea %pc@(L(kernel_end)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2543) movel %d0,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2545) /* we have to return the first page at _stext since the init code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2546) * in mm/init.c simply expects kernel_pg_dir there, the rest of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2547) * page is used for further ptr tables in get_ptr_table.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2548) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2549) lea %pc@(_stext),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2550) lea %pc@(L(mmu_cached_pointer_tables)),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2551) movel %a0,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2552) addl #ROOT_TABLE_SIZE*4,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2553)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2554) lea %pc@(L(mmu_num_pointer_tables)),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2555) addql #1,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2557) /* clear the page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2558) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2559) movel %a0,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2560) movew #PAGESIZE/4-1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2561) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2562) clrl %a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2563) dbra %d0,1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2564)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2565) lea %pc@(L(kernel_pgdir_ptr)),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2566) movel %a0,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2568) dputn %a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2569) dputc '\n'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2570) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2571) movel ARG1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2572) lea %a0@(%d0*4),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2574) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2575) dputn %a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2576) dputc '\n'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2577) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2578)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2579) func_return mmu_get_root_table_entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2580)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2582)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2583) func_start mmu_get_ptr_table_entry,%d0/%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2584)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2585) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2586) dputs "mmu_get_ptr_table_entry:"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2587) dputn ARG1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2588) dputn ARG2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2589) dputs " ="
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2590) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2591)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2592) movel ARG1,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2593) movel %a0@,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2594) jne 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2595)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2596) /* Keep track of the number of pointer tables we use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2597) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2598) dputs "\nmmu_get_new_ptr_table:"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2599) lea %pc@(L(mmu_num_pointer_tables)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2600) movel %a0@,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2601) addql #1,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2603) /* See if there is a free pointer table in our cache of pointer tables
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2604) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2605) lea %pc@(L(mmu_cached_pointer_tables)),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2606) andw #7,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2607) jne 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2609) /* Get a new pointer table page from above the kernel memory
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2610) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2611) get_new_page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2612) movel %a0,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2613) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2614) /* There is an unused pointer table in our cache... use it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2615) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2616) movel %a1@,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2617) addl #PTR_TABLE_SIZE*4,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2618)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2619) dputn %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2620) dputc '\n'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2621)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2622) /* Insert the new pointer table into the root table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2623) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2624) movel ARG1,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2625) orw #_PAGE_TABLE+_PAGE_ACCESSED,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2626) movel %d0,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2627) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2628) /* Extract the pointer table entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2629) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2630) andw #-PTR_TABLE_SIZE,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2631) movel %d0,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2632) movel ARG2,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2633) lea %a0@(%d0*4),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2634)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2635) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2636) dputn %a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2637) dputc '\n'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2638) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2639)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2640) func_return mmu_get_ptr_table_entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2641)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2642)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2643) func_start mmu_get_page_table_entry,%d0/%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2644)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2645) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2646) dputs "mmu_get_page_table_entry:"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2647) dputn ARG1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2648) dputn ARG2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2649) dputs " ="
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2650) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2651)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2652) movel ARG1,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2653) movel %a0@,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2654) jne 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2656) /* If the page table entry doesn't exist, we allocate a complete new
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2657) * page and use it as one continuous big page table which can cover
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2658) * 4MB of memory, nearly almost all mappings have that alignment.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2659) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2660) get_new_page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2661) addw #_PAGE_TABLE+_PAGE_ACCESSED,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2662)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2663) /* align pointer table entry for a page of page tables
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2664) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2665) movel ARG1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2666) andw #-(PAGESIZE/PAGE_TABLE_SIZE),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2667) movel %d0,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2668)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2669) /* Insert the page tables into the pointer entries
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2670) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2671) moveq #PAGESIZE/PAGE_TABLE_SIZE/4-1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2672) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2673) movel %a0,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2674) lea %a0@(PAGE_TABLE_SIZE*4),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2675) dbra %d0,1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2677) /* Now we can get the initialized pointer table entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2678) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2679) movel ARG1,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2680) movel %a0@,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2681) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2682) /* Extract the page table entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2683) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2684) andw #-PAGE_TABLE_SIZE,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2685) movel %d0,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2686) movel ARG2,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2687) lea %a0@(%d0*4),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2688)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2689) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2690) dputn %a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2691) dputc '\n'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2692) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2693)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2694) func_return mmu_get_page_table_entry
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2696) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2697) * get_new_page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2698) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2699) * Return a new page from the memory start and clear it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2700) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2701) func_start get_new_page,%d0/%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2703) dputs "\nget_new_page:"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2704)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2705) /* allocate the page and adjust memory_start
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2706) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2707) lea %pc@(L(memory_start)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2708) movel %a0@,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2709) addl #PAGESIZE,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2711) /* clear the new page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2712) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2713) movel %a1,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2714) movew #PAGESIZE/4-1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2715) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2716) clrl %a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2717) dbra %d0,1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2718)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2719) dputn %a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2720) dputc '\n'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2721)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2722) func_return get_new_page
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2725)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2726) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2727) * Debug output support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2728) * Atarians have a choice between the parallel port, the serial port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2729) * from the MFP or a serial port of the SCC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2730) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2731)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2732) #ifdef CONFIG_MAC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2733) /* You may define either or both of these. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2734) #define MAC_USE_SCC_A /* Modem port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2735) #define MAC_USE_SCC_B /* Printer port */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2736)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2737) #if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2738) /* Initialisation table for SCC with 3.6864 MHz PCLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2739) L(scc_initable_mac):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2740) .byte 4,0x44 /* x16, 1 stopbit, no parity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2741) .byte 3,0xc0 /* receiver: 8 bpc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2742) .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2743) .byte 10,0 /* NRZ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2744) .byte 11,0x50 /* use baud rate generator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2745) .byte 12,1,13,0 /* 38400 baud */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2746) .byte 14,1 /* Baud rate generator enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2747) .byte 3,0xc1 /* enable receiver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2748) .byte 5,0xea /* enable transmitter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2749) .byte -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2750) .even
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2751) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2752) #endif /* CONFIG_MAC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2753)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2754) #ifdef CONFIG_ATARI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2755) /* #define USE_PRINTER */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2756) /* #define USE_SCC_B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2757) /* #define USE_SCC_A */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2758) #define USE_MFP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2759)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2760) #if defined(USE_SCC_A) || defined(USE_SCC_B)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2761) /* Initialisation table for SCC with 7.9872 MHz PCLK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2762) /* PCLK == 8.0539 gives baud == 9680.1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2763) L(scc_initable_atari):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2764) .byte 4,0x44 /* x16, 1 stopbit, no parity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2765) .byte 3,0xc0 /* receiver: 8 bpc */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2766) .byte 5,0xe2 /* transmitter: 8 bpc, assert dtr/rts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2767) .byte 10,0 /* NRZ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2768) .byte 11,0x50 /* use baud rate generator */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2769) .byte 12,24,13,0 /* 9600 baud */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2770) .byte 14,2,14,3 /* use master clock for BRG, enable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2771) .byte 3,0xc1 /* enable receiver */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2772) .byte 5,0xea /* enable transmitter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2773) .byte -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2774) .even
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2775) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2776)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2777) #ifdef USE_PRINTER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2778)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2779) LPSG_SELECT = 0xff8800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2780) LPSG_READ = 0xff8800
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2781) LPSG_WRITE = 0xff8802
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2782) LPSG_IO_A = 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2783) LPSG_IO_B = 15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2784) LPSG_CONTROL = 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2785) LSTMFP_GPIP = 0xfffa01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2786) LSTMFP_DDR = 0xfffa05
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2787) LSTMFP_IERB = 0xfffa09
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2788)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2789) #elif defined(USE_SCC_B)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2791) LSCC_CTRL = 0xff8c85
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2792) LSCC_DATA = 0xff8c87
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2793)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2794) #elif defined(USE_SCC_A)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2795)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2796) LSCC_CTRL = 0xff8c81
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2797) LSCC_DATA = 0xff8c83
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2798)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2799) #elif defined(USE_MFP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2801) LMFP_UCR = 0xfffa29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2802) LMFP_TDCDR = 0xfffa1d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2803) LMFP_TDDR = 0xfffa25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2804) LMFP_TSR = 0xfffa2d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2805) LMFP_UDR = 0xfffa2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2807) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2808) #endif /* CONFIG_ATARI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2809)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2810) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2811) * Serial port output support.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2812) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2813)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2814) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2815) * Initialize serial port hardware
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2816) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2817) func_start serial_init,%d0/%d1/%a0/%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2818) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2819) * Some of the register usage that follows
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2820) * CONFIG_AMIGA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2821) * a0 = pointer to boot info record
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2822) * d0 = boot info offset
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2823) * CONFIG_ATARI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2824) * a0 = address of SCC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2825) * a1 = Liobase address/address of scc_initable_atari
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2826) * d0 = init data for serial port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2827) * CONFIG_MAC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2828) * a0 = address of SCC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2829) * a1 = address of scc_initable_mac
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2830) * d0 = init data for serial port
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2831) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2832)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2833) #ifdef CONFIG_AMIGA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2834) #define SERIAL_DTR 7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2835) #define SERIAL_CNTRL CIABBASE+C_PRA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2837) is_not_amiga(1f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2838) lea %pc@(L(custom)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2839) movel #-ZTWOBASE,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2840) bclr #SERIAL_DTR,SERIAL_CNTRL-ZTWOBASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2841) get_bi_record BI_AMIGA_SERPER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2842) movew %a0@,CUSTOMBASE+C_SERPER-ZTWOBASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2843) | movew #61,CUSTOMBASE+C_SERPER-ZTWOBASE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2844) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2845) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2846)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2847) #ifdef CONFIG_ATARI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2848) is_not_atari(4f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2849) movel %pc@(L(iobase)),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2850) #if defined(USE_PRINTER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2851) bclr #0,%a1@(LSTMFP_IERB)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2852) bclr #0,%a1@(LSTMFP_DDR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2853) moveb #LPSG_CONTROL,%a1@(LPSG_SELECT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2854) moveb #0xff,%a1@(LPSG_WRITE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2855) moveb #LPSG_IO_B,%a1@(LPSG_SELECT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2856) clrb %a1@(LPSG_WRITE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2857) moveb #LPSG_IO_A,%a1@(LPSG_SELECT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2858) moveb %a1@(LPSG_READ),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2859) bset #5,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2860) moveb %d0,%a1@(LPSG_WRITE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2861) #elif defined(USE_SCC_A) || defined(USE_SCC_B)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2862) lea %a1@(LSCC_CTRL),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2863) /* Reset SCC register pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2864) moveb %a0@,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2865) /* Reset SCC device: write register pointer then register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2866) moveb #9,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2867) moveb #0xc0,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2868) /* Wait for 5 PCLK cycles, which is about 63 CPU cycles */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2869) /* 5 / 7.9872 MHz = approx. 0.63 us = 63 / 100 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2870) movel #32,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2871) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2872) subq #1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2873) jne 2b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2874) /* Initialize channel */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2875) lea %pc@(L(scc_initable_atari)),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2876) 2: moveb %a1@+,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2877) jmi 3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2878) moveb %d0,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2879) moveb %a1@+,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2880) jra 2b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2881) 3: clrb %a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2882) #elif defined(USE_MFP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2883) bclr #1,%a1@(LMFP_TSR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2884) moveb #0x88,%a1@(LMFP_UCR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2885) andb #0x70,%a1@(LMFP_TDCDR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2886) moveb #2,%a1@(LMFP_TDDR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2887) orb #1,%a1@(LMFP_TDCDR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2888) bset #1,%a1@(LMFP_TSR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2889) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2890) jra L(serial_init_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2891) 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2892) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2893)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2894) #ifdef CONFIG_MAC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2895) is_not_mac(L(serial_init_not_mac))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2896) #if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2897) #define mac_scc_cha_b_ctrl_offset 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2898) #define mac_scc_cha_a_ctrl_offset 0x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2899) #define mac_scc_cha_b_data_offset 0x4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2900) #define mac_scc_cha_a_data_offset 0x6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2901) movel %pc@(L(mac_sccbase)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2902) /* Reset SCC register pointer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2903) moveb %a0@(mac_scc_cha_a_ctrl_offset),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2904) /* Reset SCC device: write register pointer then register value */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2905) moveb #9,%a0@(mac_scc_cha_a_ctrl_offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2906) moveb #0xc0,%a0@(mac_scc_cha_a_ctrl_offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2907) /* Wait for 5 PCLK cycles, which is about 68 CPU cycles */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2908) /* 5 / 3.6864 MHz = approx. 1.36 us = 68 / 50 MHz */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2909) movel #35,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2910) 5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2911) subq #1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2912) jne 5b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2913) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2914) #ifdef MAC_USE_SCC_A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2915) /* Initialize channel A */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2916) lea %pc@(L(scc_initable_mac)),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2917) 5: moveb %a1@+,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2918) jmi 6f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2919) moveb %d0,%a0@(mac_scc_cha_a_ctrl_offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2920) moveb %a1@+,%a0@(mac_scc_cha_a_ctrl_offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2921) jra 5b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2922) 6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2923) #endif /* MAC_USE_SCC_A */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2924) #ifdef MAC_USE_SCC_B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2925) /* Initialize channel B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2926) lea %pc@(L(scc_initable_mac)),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2927) 7: moveb %a1@+,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2928) jmi 8f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2929) moveb %d0,%a0@(mac_scc_cha_b_ctrl_offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2930) moveb %a1@+,%a0@(mac_scc_cha_b_ctrl_offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2931) jra 7b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2932) 8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2933) #endif /* MAC_USE_SCC_B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2934) jra L(serial_init_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2935) L(serial_init_not_mac):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2936) #endif /* CONFIG_MAC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2937)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2938) #ifdef CONFIG_Q40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2939) is_not_q40(2f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2940) /* debug output goes into SRAM, so we don't do it unless requested
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2941) - check for '%LX$' signature in SRAM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2942) lea %pc@(q40_mem_cptr),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2943) move.l #0xff020010,%a1@ /* must be inited - also used by debug=mem */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2944) move.l #0xff020000,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2945) cmp.b #'%',%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2946) bne 2f /*nodbg*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2947) addq.w #4,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2948) cmp.b #'L',%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2949) bne 2f /*nodbg*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2950) addq.w #4,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2951) cmp.b #'X',%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2952) bne 2f /*nodbg*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2953) addq.w #4,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2954) cmp.b #'$',%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2955) bne 2f /*nodbg*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2956) /* signature OK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2957) lea %pc@(L(q40_do_debug)),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2958) tas %a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2959) /*nodbg: q40_do_debug is 0 by default*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2960) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2961) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2962)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2963) #ifdef CONFIG_MVME16x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2964) is_not_mvme16x(L(serial_init_not_mvme16x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2965) moveb #0x10,M167_PCSCCMICR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2966) moveb #0x10,M167_PCSCCTICR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2967) moveb #0x10,M167_PCSCCRICR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2968) jra L(serial_init_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2969) L(serial_init_not_mvme16x):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2970) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2971)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2972) #ifdef CONFIG_APOLLO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2973) /* We count on the PROM initializing SIO1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2974) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2976) #ifdef CONFIG_HP300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2977) /* We count on the boot loader initialising the UART */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2978) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2979)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2980) L(serial_init_done):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2981) func_return serial_init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2982)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2983) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2984) * Output character on serial port.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2985) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2986) func_start serial_putc,%d0/%d1/%a0/%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2987)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2988) movel ARG1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2989) cmpib #'\n',%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2990) jbne 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2991)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2992) /* A little safe recursion is good for the soul */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2993) serial_putc #'\r'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2994) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2995)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2996) #ifdef CONFIG_AMIGA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2997) is_not_amiga(2f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2998) andw #0x00ff,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2999) oriw #0x0100,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3000) movel %pc@(L(custom)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3001) movew %d0,%a0@(CUSTOMBASE+C_SERDAT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3002) 1: movew %a0@(CUSTOMBASE+C_SERDATR),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3003) andw #0x2000,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3004) jeq 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3005) jra L(serial_putc_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3006) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3007) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3009) #ifdef CONFIG_MAC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3010) is_not_mac(5f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3011) #if defined(MAC_USE_SCC_A) || defined(MAC_USE_SCC_B)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3012) movel %pc@(L(mac_sccbase)),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3013) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3014) #ifdef MAC_USE_SCC_A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3015) 3: btst #2,%a1@(mac_scc_cha_a_ctrl_offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3016) jeq 3b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3017) moveb %d0,%a1@(mac_scc_cha_a_data_offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3018) #endif /* MAC_USE_SCC_A */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3019) #ifdef MAC_USE_SCC_B
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3020) 4: btst #2,%a1@(mac_scc_cha_b_ctrl_offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3021) jeq 4b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3022) moveb %d0,%a1@(mac_scc_cha_b_data_offset)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3023) #endif /* MAC_USE_SCC_B */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3024) jra L(serial_putc_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3025) 5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3026) #endif /* CONFIG_MAC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3027)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3028) #ifdef CONFIG_ATARI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3029) is_not_atari(4f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3030) movel %pc@(L(iobase)),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3031) #if defined(USE_PRINTER)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3032) 3: btst #0,%a1@(LSTMFP_GPIP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3033) jne 3b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3034) moveb #LPSG_IO_B,%a1@(LPSG_SELECT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3035) moveb %d0,%a1@(LPSG_WRITE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3036) moveb #LPSG_IO_A,%a1@(LPSG_SELECT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3037) moveb %a1@(LPSG_READ),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3038) bclr #5,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3039) moveb %d0,%a1@(LPSG_WRITE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3040) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3041) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3042) bset #5,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3043) moveb %d0,%a1@(LPSG_WRITE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3044) #elif defined(USE_SCC_A) || defined(USE_SCC_B)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3045) 3: btst #2,%a1@(LSCC_CTRL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3046) jeq 3b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3047) moveb %d0,%a1@(LSCC_DATA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3048) #elif defined(USE_MFP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3049) 3: btst #7,%a1@(LMFP_TSR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3050) jeq 3b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3051) moveb %d0,%a1@(LMFP_UDR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3052) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3053) jra L(serial_putc_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3054) 4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3055) #endif /* CONFIG_ATARI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3056)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3057) #ifdef CONFIG_MVME147
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3058) is_not_mvme147(2f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3059) 1: btst #2,M147_SCC_CTRL_A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3060) jeq 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3061) moveb %d0,M147_SCC_DATA_A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3062) jbra L(serial_putc_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3063) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3064) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3065)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3066) #ifdef CONFIG_MVME16x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3067) is_not_mvme16x(2f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3068) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3069) * If the loader gave us a board type then we can use that to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3070) * select an appropriate output routine; otherwise we just use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3071) * the Bug code. If we have to use the Bug that means the Bug
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3072) * workspace has to be valid, which means the Bug has to use
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3073) * the SRAM, which is non-standard.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3074) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3075) moveml %d0-%d7/%a2-%a6,%sp@-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3076) movel vme_brdtype,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3077) jeq 1f | No tag - use the Bug
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3078) cmpi #VME_TYPE_MVME162,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3079) jeq 6f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3080) cmpi #VME_TYPE_MVME172,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3081) jne 5f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3082) /* 162/172; it's an SCC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3083) 6: btst #2,M162_SCC_CTRL_A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3084) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3085) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3086) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3087) jeq 6b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3088) moveb #8,M162_SCC_CTRL_A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3089) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3090) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3091) nop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3092) moveb %d0,M162_SCC_CTRL_A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3093) jra 3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3094) 5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3095) /* 166/167/177; it's a CD2401 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3096) moveb #0,M167_CYCAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3097) moveb M167_CYIER,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3098) moveb #0x02,M167_CYIER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3099) 7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3100) btst #5,M167_PCSCCTICR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3101) jeq 7b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3102) moveb M167_PCTPIACKR,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3103) moveb M167_CYLICR,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3104) jeq 8f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3105) moveb #0x08,M167_CYTEOIR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3106) jra 7b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3107) 8:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3108) moveb %d0,M167_CYTDR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3109) moveb #0,M167_CYTEOIR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3110) moveb %d2,M167_CYIER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3111) jra 3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3112) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3113) moveb %d0,%sp@-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3114) trap #15
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3115) .word 0x0020 /* TRAP 0x020 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3116) 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3117) moveml %sp@+,%d0-%d7/%a2-%a6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3118) jbra L(serial_putc_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3119) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3120) #endif /* CONFIG_MVME16x */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3122) #ifdef CONFIG_BVME6000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3123) is_not_bvme6000(2f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3124) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3125) * The BVME6000 machine has a serial port ...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3126) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3127) 1: btst #2,BVME_SCC_CTRL_A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3128) jeq 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3129) moveb %d0,BVME_SCC_DATA_A
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3130) jbra L(serial_putc_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3131) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3132) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3134) #ifdef CONFIG_SUN3X
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3135) is_not_sun3x(2f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3136) movel %d0,-(%sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3137) movel 0xFEFE0018,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3138) jbsr (%a1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3139) addq #4,%sp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3140) jbra L(serial_putc_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3141) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3142) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3144) #ifdef CONFIG_Q40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3145) is_not_q40(2f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3146) tst.l %pc@(L(q40_do_debug)) /* only debug if requested */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3147) beq 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3148) lea %pc@(q40_mem_cptr),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3149) move.l %a1@,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3150) move.b %d0,%a0@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3151) addq.l #4,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3152) move.l %a0,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3153) jbra L(serial_putc_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3154) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3155) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3157) #ifdef CONFIG_APOLLO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3158) is_not_apollo(2f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3159) movl %pc@(L(iobase)),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3160) moveb %d0,%a1@(LTHRB0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3161) 1: moveb %a1@(LSRB0),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3162) andb #0x4,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3163) beq 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3164) jbra L(serial_putc_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3165) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3166) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3167)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3168) #ifdef CONFIG_HP300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3169) is_not_hp300(3f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3170) movl %pc@(L(iobase)),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3171) addl %pc@(L(uartbase)),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3172) movel %pc@(L(uart_scode)),%d1 /* Check the scode */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3173) jmi 3f /* Unset? Exit */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3174) cmpi #256,%d1 /* APCI scode? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3175) jeq 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3176) 1: moveb %a1@(DCALSR),%d1 /* Output to DCA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3177) andb #0x20,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3178) beq 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3179) moveb %d0,%a1@(DCADATA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3180) jbra L(serial_putc_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3181) 2: moveb %a1@(APCILSR),%d1 /* Output to APCI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3182) andb #0x20,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3183) beq 2b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3184) moveb %d0,%a1@(APCIDATA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3185) jbra L(serial_putc_done)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3186) 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3187) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3189) L(serial_putc_done):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3190) func_return serial_putc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3191)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3192) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3193) * Output a string.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3194) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3195) func_start puts,%d0/%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3196)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3197) movel ARG1,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3198) jra 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3199) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3200) #ifdef CONSOLE_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3201) console_putc %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3202) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3203) #ifdef SERIAL_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3204) serial_putc %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3205) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3206) 2: moveb %a0@+,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3207) jne 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3209) func_return puts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3211) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3212) * Output number in hex notation.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3213) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3214)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3215) func_start putn,%d0-%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3216)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3217) putc ' '
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3219) movel ARG1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3220) moveq #7,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3221) 1: roll #4,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3222) move %d0,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3223) andb #0x0f,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3224) addb #'0',%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3225) cmpb #'9',%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3226) jls 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3227) addb #'A'-('9'+1),%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3228) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3229) #ifdef CONSOLE_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3230) console_putc %d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3231) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3232) #ifdef SERIAL_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3233) serial_putc %d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3234) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3235) dbra %d1,1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3236)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3237) func_return putn
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3238)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3239) #ifdef CONFIG_EARLY_PRINTK
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3240) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3241) * This routine takes its parameters on the stack. It then
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3242) * turns around and calls the internal routines. This routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3243) * is used by the boot console.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3244) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3245) * The calling parameters are:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3246) * void debug_cons_nputs(const char *str, unsigned length)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3247) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3248) * This routine does NOT understand variable arguments only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3249) * simple strings!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3250) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3251) ENTRY(debug_cons_nputs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3252) moveml %d0/%d1/%a0,%sp@-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3253) movew %sr,%sp@-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3254) ori #0x0700,%sr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3255) movel %sp@(18),%a0 /* fetch parameter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3256) movel %sp@(22),%d1 /* fetch parameter */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3257) jra 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3258) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3259) #ifdef CONSOLE_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3260) console_putc %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3261) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3262) #ifdef SERIAL_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3263) serial_putc %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3264) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3265) subq #1,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3266) 2: jeq 3f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3267) moveb %a0@+,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3268) jne 1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3269) 3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3270) movew %sp@+,%sr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3271) moveml %sp@+,%d0/%d1/%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3272) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3273) #endif /* CONFIG_EARLY_PRINTK */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3274)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3275) #if defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3276) func_start set_leds,%d0/%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3277) movel ARG1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3278) #ifdef CONFIG_HP300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3279) is_not_hp300(1f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3280) movel %pc@(L(iobase)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3281) moveb %d0,%a0@(0x1ffff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3282) jra 2f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3283) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3284) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3285) #ifdef CONFIG_APOLLO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3286) movel %pc@(L(iobase)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3287) lsll #8,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3288) eorw #0xff00,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3289) moveb %d0,%a0@(LCPUCTRL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3290) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3291) 2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3292) func_return set_leds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3293) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3295) #ifdef CONSOLE_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3296) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3297) * For continuity, see the data alignment
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3298) * to which this structure is tied.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3299) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3300) #define Lconsole_struct_cur_column 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3301) #define Lconsole_struct_cur_row 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3302) #define Lconsole_struct_num_columns 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3303) #define Lconsole_struct_num_rows 12
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3304) #define Lconsole_struct_left_edge 16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3306) func_start console_init,%a0-%a4/%d0-%d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3307) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3308) * Some of the register usage that follows
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3309) * a0 = pointer to boot_info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3310) * a1 = pointer to screen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3311) * a2 = pointer to console_globals
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3312) * d3 = pixel width of screen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3313) * d4 = pixel height of screen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3314) * (d3,d4) ~= (x,y) of a point just below
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3315) * and to the right of the screen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3316) * NOT on the screen!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3317) * d5 = number of bytes per scan line
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3318) * d6 = number of bytes on the entire screen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3319) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3320)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3321) lea %pc@(L(console_globals)),%a2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3322) movel %pc@(L(mac_videobase)),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3323) movel %pc@(L(mac_rowbytes)),%d5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3324) movel %pc@(L(mac_dimensions)),%d3 /* -> low byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3325) movel %d3,%d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3326) swap %d4 /* -> high byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3327) andl #0xffff,%d3 /* d3 = screen width in pixels */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3328) andl #0xffff,%d4 /* d4 = screen height in pixels */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3329)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3330) movel %d5,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3331) | subl #20,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3332) mulul %d4,%d6 /* scan line bytes x num scan lines */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3333) divul #8,%d6 /* we'll clear 8 bytes at a time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3334) moveq #-1,%d0 /* Mac_black */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3335) subq #1,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3336)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3337) L(console_clear_loop):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3338) movel %d0,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3339) movel %d0,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3340) dbra %d6,L(console_clear_loop)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3341)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3342) /* Calculate font size */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3344) #if defined(FONT_8x8) && defined(CONFIG_FONT_8x8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3345) lea %pc@(font_vga_8x8),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3346) #elif defined(FONT_8x16) && defined(CONFIG_FONT_8x16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3347) lea %pc@(font_vga_8x16),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3348) #elif defined(FONT_6x11) && defined(CONFIG_FONT_6x11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3349) lea %pc@(font_vga_6x11),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3350) #elif defined(CONFIG_FONT_8x8) /* default */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3351) lea %pc@(font_vga_8x8),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3352) #else /* no compiled-in font */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3353) lea 0,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3354) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3355)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3356) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3357) * At this point we make a shift in register usage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3358) * a1 = address of console_font pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3359) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3360) lea %pc@(L(console_font)),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3361) movel %a0,%a1@ /* store pointer to struct fbcon_font_desc in console_font */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3362) tstl %a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3363) jeq 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3364) lea %pc@(L(console_font_data)),%a4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3365) movel %a0@(FONT_DESC_DATA),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3366) subl #L(console_font),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3367) addl %a1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3368) movel %d0,%a4@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3369)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3370) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3371) * Calculate global maxs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3372) * Note - we can use either an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3373) * 8 x 16 or 8 x 8 character font
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3374) * 6 x 11 also supported
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3375) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3376) /* ASSERT: a0 = contents of Lconsole_font */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3377) movel %d3,%d0 /* screen width in pixels */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3378) divul %a0@(FONT_DESC_WIDTH),%d0 /* d0 = max num chars per row */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3379)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3380) movel %d4,%d1 /* screen height in pixels */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3381) divul %a0@(FONT_DESC_HEIGHT),%d1 /* d1 = max num rows */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3382)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3383) movel %d0,%a2@(Lconsole_struct_num_columns)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3384) movel %d1,%a2@(Lconsole_struct_num_rows)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3386) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3387) * Clear the current row and column
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3388) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3389) clrl %a2@(Lconsole_struct_cur_column)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3390) clrl %a2@(Lconsole_struct_cur_row)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3391) clrl %a2@(Lconsole_struct_left_edge)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3392)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3393) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3394) * Initialization is complete
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3395) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3396) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3397) func_return console_init
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3398)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3399) #ifdef CONFIG_LOGO
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3400) func_start console_put_penguin,%a0-%a1/%d0-%d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3401) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3402) * Get 'that_penguin' onto the screen in the upper right corner
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3403) * penguin is 64 x 74 pixels, align against right edge of screen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3404) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3405) lea %pc@(L(mac_dimensions)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3406) movel %a0@,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3407) andil #0xffff,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3408) subil #64,%d0 /* snug up against the right edge */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3409) clrl %d1 /* start at the top */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3410) movel #73,%d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3411) lea %pc@(L(that_penguin)),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3412) L(console_penguin_row):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3413) movel #31,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3414) L(console_penguin_pixel_pair):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3415) moveb %a1@,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3416) lsrb #4,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3417) console_plot_pixel %d0,%d1,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3418) addq #1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3419) moveb %a1@+,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3420) console_plot_pixel %d0,%d1,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3421) addq #1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3422) dbra %d6,L(console_penguin_pixel_pair)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3423)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3424) subil #64,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3425) addq #1,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3426) dbra %d7,L(console_penguin_row)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3427)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3428) func_return console_put_penguin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3429)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3430) /* include penguin bitmap */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3431) L(that_penguin):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3432) #include "../mac/mac_penguin.S"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3433) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3434)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3435) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3436) * Calculate source and destination addresses
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3437) * output a1 = dest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3438) * a2 = source
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3439) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3440)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3441) func_start console_scroll,%a0-%a4/%d0-%d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3442) lea %pc@(L(mac_videobase)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3443) movel %a0@,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3444) movel %a1,%a2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3445) lea %pc@(L(mac_rowbytes)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3446) movel %a0@,%d5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3447) movel %pc@(L(console_font)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3448) tstl %a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3449) jeq 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3450) mulul %a0@(FONT_DESC_HEIGHT),%d5 /* account for # scan lines per character */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3451) addal %d5,%a2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3453) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3454) * Get dimensions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3455) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3456) lea %pc@(L(mac_dimensions)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3457) movel %a0@,%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3458) movel %d3,%d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3459) swap %d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3460) andl #0xffff,%d3 /* d3 = screen width in pixels */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3461) andl #0xffff,%d4 /* d4 = screen height in pixels */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3462)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3463) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3464) * Calculate number of bytes to move
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3465) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3466) lea %pc@(L(mac_rowbytes)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3467) movel %a0@,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3468) movel %pc@(L(console_font)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3469) subl %a0@(FONT_DESC_HEIGHT),%d4 /* we're not scrolling the top row! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3470) mulul %d4,%d6 /* scan line bytes x num scan lines */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3471) divul #32,%d6 /* we'll move 8 longs at a time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3472) subq #1,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3473)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3474) L(console_scroll_loop):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3475) movel %a2@+,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3476) movel %a2@+,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3477) movel %a2@+,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3478) movel %a2@+,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3479) movel %a2@+,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3480) movel %a2@+,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3481) movel %a2@+,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3482) movel %a2@+,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3483) dbra %d6,L(console_scroll_loop)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3484)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3485) lea %pc@(L(mac_rowbytes)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3486) movel %a0@,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3487) movel %pc@(L(console_font)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3488) mulul %a0@(FONT_DESC_HEIGHT),%d6 /* scan line bytes x font height */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3489) divul #32,%d6 /* we'll move 8 words at a time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3490) subq #1,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3492) moveq #-1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3493) L(console_scroll_clear_loop):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3494) movel %d0,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3495) movel %d0,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3496) movel %d0,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3497) movel %d0,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3498) movel %d0,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3499) movel %d0,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3500) movel %d0,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3501) movel %d0,%a1@+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3502) dbra %d6,L(console_scroll_clear_loop)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3504) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3505) func_return console_scroll
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3506)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3507)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3508) func_start console_putc,%a0/%a1/%d0-%d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3510) is_not_mac(L(console_exit))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3511) tstl %pc@(L(console_font))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3512) jeq L(console_exit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3513)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3514) /* Output character in d7 on console.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3515) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3516) movel ARG1,%d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3517) cmpib #'\n',%d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3518) jbne 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3519)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3520) /* A little safe recursion is good for the soul */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3521) console_putc #'\r'
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3522) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3523) lea %pc@(L(console_globals)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3525) cmpib #10,%d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3526) jne L(console_not_lf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3527) movel %a0@(Lconsole_struct_cur_row),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3528) addil #1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3529) movel %d0,%a0@(Lconsole_struct_cur_row)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3530) movel %a0@(Lconsole_struct_num_rows),%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3531) cmpl %d1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3532) jcs 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3533) subil #1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3534) movel %d0,%a0@(Lconsole_struct_cur_row)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3535) console_scroll
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3536) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3537) jra L(console_exit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3538)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3539) L(console_not_lf):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3540) cmpib #13,%d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3541) jne L(console_not_cr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3542) clrl %a0@(Lconsole_struct_cur_column)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3543) jra L(console_exit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3544)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3545) L(console_not_cr):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3546) cmpib #1,%d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3547) jne L(console_not_home)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3548) clrl %a0@(Lconsole_struct_cur_row)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3549) clrl %a0@(Lconsole_struct_cur_column)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3550) jra L(console_exit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3552) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3553) * At this point we know that the %d7 character is going to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3554) * rendered on the screen. Register usage is -
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3555) * a0 = pointer to console globals
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3556) * a1 = font data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3557) * d0 = cursor column
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3558) * d1 = cursor row to draw the character
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3559) * d7 = character number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3560) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3561) L(console_not_home):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3562) movel %a0@(Lconsole_struct_cur_column),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3563) addql #1,%a0@(Lconsole_struct_cur_column)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3564) movel %a0@(Lconsole_struct_num_columns),%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3565) cmpl %d1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3566) jcs 1f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3567) console_putc #'\n' /* recursion is OK! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3568) 1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3569) movel %a0@(Lconsole_struct_cur_row),%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3570)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3571) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3572) * At this point we make a shift in register usage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3573) * a0 = address of pointer to font data (fbcon_font_desc)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3574) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3575) movel %pc@(L(console_font)),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3576) movel %pc@(L(console_font_data)),%a1 /* Load fbcon_font_desc.data into a1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3577) andl #0x000000ff,%d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3578) /* ASSERT: a0 = contents of Lconsole_font */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3579) mulul %a0@(FONT_DESC_HEIGHT),%d7 /* d7 = index into font data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3580) addl %d7,%a1 /* a1 = points to char image */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3581)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3582) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3583) * At this point we make a shift in register usage
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3584) * d0 = pixel coordinate, x
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3585) * d1 = pixel coordinate, y
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3586) * d2 = (bit 0) 1/0 for white/black (!) pixel on screen
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3587) * d3 = font scan line data (8 pixels)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3588) * d6 = count down for the font's pixel width (8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3589) * d7 = count down for the font's pixel count in height
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3590) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3591) /* ASSERT: a0 = contents of Lconsole_font */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3592) mulul %a0@(FONT_DESC_WIDTH),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3593) mulul %a0@(FONT_DESC_HEIGHT),%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3594) movel %a0@(FONT_DESC_HEIGHT),%d7 /* Load fbcon_font_desc.height into d7 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3595) subq #1,%d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3596) L(console_read_char_scanline):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3597) moveb %a1@+,%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3598)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3599) /* ASSERT: a0 = contents of Lconsole_font */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3600) movel %a0@(FONT_DESC_WIDTH),%d6 /* Load fbcon_font_desc.width into d6 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3601) subql #1,%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3602)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3603) L(console_do_font_scanline):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3604) lslb #1,%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3605) scsb %d2 /* convert 1 bit into a byte */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3606) console_plot_pixel %d0,%d1,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3607) addq #1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3608) dbra %d6,L(console_do_font_scanline)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3610) /* ASSERT: a0 = contents of Lconsole_font */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3611) subl %a0@(FONT_DESC_WIDTH),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3612) addq #1,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3613) dbra %d7,L(console_read_char_scanline)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3615) L(console_exit):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3616) func_return console_putc
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3617)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3618) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3619) * Input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3620) * d0 = x coordinate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3621) * d1 = y coordinate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3622) * d2 = (bit 0) 1/0 for white/black (!)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3623) * All registers are preserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3624) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3625) func_start console_plot_pixel,%a0-%a1/%d0-%d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3627) movel %pc@(L(mac_videobase)),%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3628) movel %pc@(L(mac_videodepth)),%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3629) movel ARG1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3630) movel ARG2,%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3631) mulul %pc@(L(mac_rowbytes)),%d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3632) movel ARG3,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3634) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3635) * Register usage:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3636) * d0 = x coord becomes byte offset into frame buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3637) * d1 = y coord
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3638) * d2 = black or white (0/1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3639) * d3 = video depth
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3640) * d4 = temp of x (d0) for many bit depths
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3641) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3642) L(test_1bit):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3643) cmpb #1,%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3644) jbne L(test_2bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3645) movel %d0,%d4 /* we need the low order 3 bits! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3646) divul #8,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3647) addal %d0,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3648) addal %d1,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3649) andb #7,%d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3650) eorb #7,%d4 /* reverse the x-coordinate w/ screen-bit # */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3651) andb #1,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3652) jbne L(white_1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3653) bsetb %d4,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3654) jbra L(console_plot_pixel_exit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3655) L(white_1):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3656) bclrb %d4,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3657) jbra L(console_plot_pixel_exit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3659) L(test_2bit):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3660) cmpb #2,%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3661) jbne L(test_4bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3662) movel %d0,%d4 /* we need the low order 2 bits! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3663) divul #4,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3664) addal %d0,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3665) addal %d1,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3666) andb #3,%d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3667) eorb #3,%d4 /* reverse the x-coordinate w/ screen-bit # */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3668) lsll #1,%d4 /* ! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3669) andb #1,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3670) jbne L(white_2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3671) bsetb %d4,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3672) addq #1,%d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3673) bsetb %d4,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3674) jbra L(console_plot_pixel_exit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3675) L(white_2):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3676) bclrb %d4,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3677) addq #1,%d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3678) bclrb %d4,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3679) jbra L(console_plot_pixel_exit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3680)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3681) L(test_4bit):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3682) cmpb #4,%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3683) jbne L(test_8bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3684) movel %d0,%d4 /* we need the low order bit! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3685) divul #2,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3686) addal %d0,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3687) addal %d1,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3688) andb #1,%d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3689) eorb #1,%d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3690) lsll #2,%d4 /* ! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3691) andb #1,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3692) jbne L(white_4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3693) bsetb %d4,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3694) addq #1,%d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3695) bsetb %d4,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3696) addq #1,%d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3697) bsetb %d4,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3698) addq #1,%d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3699) bsetb %d4,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3700) jbra L(console_plot_pixel_exit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3701) L(white_4):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3702) bclrb %d4,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3703) addq #1,%d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3704) bclrb %d4,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3705) addq #1,%d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3706) bclrb %d4,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3707) addq #1,%d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3708) bclrb %d4,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3709) jbra L(console_plot_pixel_exit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3711) L(test_8bit):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3712) cmpb #8,%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3713) jbne L(test_16bit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3714) addal %d0,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3715) addal %d1,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3716) andb #1,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3717) jbne L(white_8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3718) moveb #0xff,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3719) jbra L(console_plot_pixel_exit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3720) L(white_8):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3721) clrb %a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3722) jbra L(console_plot_pixel_exit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3723)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3724) L(test_16bit):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3725) cmpb #16,%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3726) jbne L(console_plot_pixel_exit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3727) addal %d0,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3728) addal %d0,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3729) addal %d1,%a1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3730) andb #1,%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3731) jbne L(white_16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3732) clrw %a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3733) jbra L(console_plot_pixel_exit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3734) L(white_16):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3735) movew #0x0fff,%a1@
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3736) jbra L(console_plot_pixel_exit)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3737)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3738) L(console_plot_pixel_exit):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3739) func_return console_plot_pixel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3740) #endif /* CONSOLE_DEBUG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3741)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3743) __INITDATA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3744) .align 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3745)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3746) m68k_init_mapped_size:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3747) .long 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3748)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3749) #if defined(CONFIG_ATARI) || defined(CONFIG_AMIGA) || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3750) defined(CONFIG_HP300) || defined(CONFIG_APOLLO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3751) L(custom):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3752) L(iobase):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3753) .long 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3754) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3755)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3756) #ifdef CONSOLE_DEBUG
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3757) L(console_globals):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3758) .long 0 /* cursor column */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3759) .long 0 /* cursor row */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3760) .long 0 /* max num columns */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3761) .long 0 /* max num rows */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3762) .long 0 /* left edge */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3763) L(console_font):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3764) .long 0 /* pointer to console font (struct font_desc) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3765) L(console_font_data):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3766) .long 0 /* pointer to console font data */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3767) #endif /* CONSOLE_DEBUG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3769) #if defined(MMU_PRINT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3770) L(mmu_print_data):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3771) .long 0 /* valid flag */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3772) .long 0 /* start logical */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3773) .long 0 /* next logical */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3774) .long 0 /* start physical */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3775) .long 0 /* next physical */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3776) #endif /* MMU_PRINT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3778) L(cputype):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3779) .long 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3780) L(mmu_cached_pointer_tables):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3781) .long 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3782) L(mmu_num_pointer_tables):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3783) .long 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3784) L(phys_kernel_start):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3785) .long 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3786) L(kernel_end):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3787) .long 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3788) L(memory_start):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3789) .long 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3790) L(kernel_pgdir_ptr):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3791) .long 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3792) L(temp_mmap_mem):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3793) .long 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3795) #if defined (CONFIG_MVME147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3796) M147_SCC_CTRL_A = 0xfffe3002
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3797) M147_SCC_DATA_A = 0xfffe3003
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3798) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3799)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3800) #if defined (CONFIG_MVME16x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3801) M162_SCC_CTRL_A = 0xfff45005
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3802) M167_CYCAR = 0xfff450ee
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3803) M167_CYIER = 0xfff45011
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3804) M167_CYLICR = 0xfff45026
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3805) M167_CYTEOIR = 0xfff45085
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3806) M167_CYTDR = 0xfff450f8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3807) M167_PCSCCMICR = 0xfff4201d
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3808) M167_PCSCCTICR = 0xfff4201e
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3809) M167_PCSCCRICR = 0xfff4201f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3810) M167_PCTPIACKR = 0xfff42025
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3811) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3812)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3813) #if defined (CONFIG_BVME6000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3814) BVME_SCC_CTRL_A = 0xffb0000b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3815) BVME_SCC_DATA_A = 0xffb0000f
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3816) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3817)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3818) #if defined(CONFIG_MAC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3819) L(mac_videobase):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3820) .long 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3821) L(mac_videodepth):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3822) .long 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3823) L(mac_dimensions):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3824) .long 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3825) L(mac_rowbytes):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3826) .long 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3827) L(mac_sccbase):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3828) .long 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3829) #endif /* CONFIG_MAC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3831) #if defined (CONFIG_APOLLO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3832) LSRB0 = 0x10412
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3833) LTHRB0 = 0x10416
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3834) LCPUCTRL = 0x10100
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3835) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3836)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3837) #if defined(CONFIG_HP300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3838) DCADATA = 0x11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3839) DCALSR = 0x1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3840) APCIDATA = 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3841) APCILSR = 0x14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3842) L(uartbase):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3843) .long 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3844) L(uart_scode):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3845) .long -1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3846) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3848) __FINIT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3849) .data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3850) .align 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3851)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3852) availmem:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3853) .long 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3854) m68k_pgtable_cachemode:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3855) .long 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3856) m68k_supervisor_cachemode:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3857) .long 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3858) #if defined(CONFIG_MVME16x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3859) mvme_bdid:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3860) .long 0,0,0,0,0,0,0,0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3861) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3862) #if defined(CONFIG_Q40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3863) q40_mem_cptr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3864) .long 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3865) L(q40_do_debug):
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3866) .long 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3867) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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