Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #ifndef _ASM_M68K_VGA_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #define _ASM_M68K_VGA_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Some ColdFire platforms do in fact have a PCI bus. So for those we want
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * to use the real IO access functions, don't fake them out or redirect them
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * for that case.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef CONFIG_PCI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/raw_io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <asm/kmap.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)  * FIXME
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)  * Ugh, we don't have PCI space, so map readb() and friends to use raw I/O
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)  * accessors, which are identical to the z_*() Zorro bus accessors.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)  * This should make cirrusfb work again on Amiga
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #undef inb_p
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #undef inw_p
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #undef outb_p
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #undef outw
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #undef readb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #undef writeb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #undef writew
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define inb_p(port)		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define inw_p(port)		0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define outb_p(port, val)	do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define outw(port, val)		do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define readb			raw_inb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define writeb			raw_outb
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define writew			raw_outw
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #endif /* CONFIG_PCI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #endif /* _ASM_M68K_VGA_H */