^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * contains some Q40 related interrupt definitions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #define Q40_IRQ_MAX (34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) #define Q40_IRQ_SAMPLE (34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #define Q40_IRQ_KEYBOARD (32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define Q40_IRQ_FRAME (33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /* masks for interrupt regiosters*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) /* internal, IIRQ_REG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define Q40_IRQ_KEYB_MASK (2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define Q40_IRQ_SER_MASK (1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define Q40_IRQ_FRAME_MASK (1<<3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define Q40_IRQ_EXT_MASK (1<<4) /* is a EIRQ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /* eirq, EIRQ_REG */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define Q40_IRQ3_MASK (1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define Q40_IRQ4_MASK (1<<1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define Q40_IRQ5_MASK (1<<2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define Q40_IRQ6_MASK (1<<3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define Q40_IRQ7_MASK (1<<4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define Q40_IRQ10_MASK (1<<5)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define Q40_IRQ14_MASK (1<<6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define Q40_IRQ15_MASK (1<<7)