Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Definitions for Freescale Coldfire QSPI module
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright 2010 Steven King <sfking@fdwdc.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) #ifndef mcfqspi_h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) #define mcfqspi_h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  * struct mcfqspi_cs_control - chip select control for the coldfire qspi driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  * @setup: setup the control; allocate gpio's, etc. May be NULL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)  * @teardown: finish with the control; free gpio's, etc. May be NULL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)  * @select: output the signals to select the device.  Can not be NULL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)  * @deselect: output the signals to deselect the device. Can not be NULL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)  * The QSPI module has 4 hardware chip selects.  We don't use them.  Instead
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)  * platforms are required to supply a mcfqspi_cs_control as a part of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)  * platform data for each QSPI master controller.  Only the select and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)  * deselect functions are required.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) struct mcfqspi_cs_control {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 	int 	(*setup)(struct mcfqspi_cs_control *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) 	void	(*teardown)(struct mcfqspi_cs_control *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	void	(*select)(struct mcfqspi_cs_control *, u8, bool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	void	(*deselect)(struct mcfqspi_cs_control *, u8, bool);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)  * struct mcfqspi_platform_data - platform data for the coldfire qspi driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)  * @bus_num: board specific identifier for this qspi driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)  * @num_chipselects: number of chip selects supported by this qspi driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)  * @cs_control: platform dependent chip select control.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) struct mcfqspi_platform_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	s16	bus_num;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 	u16	num_chipselect;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	struct mcfqspi_cs_control *cs_control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #endif /* mcfqspi_h */