^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * mcf8390.h -- NS8390 support for ColdFire eval boards.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * (C) Copyright 1999-2000, Greg Ungerer (gerg@snapgear.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * (C) Copyright 2000, Lineo (www.lineo.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * (C) Copyright 2001, SnapGear (www.snapgear.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * 19990409 David W. Miller Converted from m5206ne.h for 5307 eval board
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Hacked support for m5206e Cadre III evaluation board
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * Fred Stevens (fred.stevens@pemstar.com) 13 April 1999
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) /****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #ifndef mcf8390_h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #define mcf8390_h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * Support for NE2000 clones devices in ColdFire based boards.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) * Not all boards address these parts the same way, some use a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * direct addressing method, others use a side-band address space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * to access odd address registers, some require byte swapping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * others do not.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define BSWAP(w) (((w) << 8) | ((w) >> 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define RSWAP(w) (w)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * Define the basic hardware resources of NE2000 boards.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #if defined(CONFIG_ARN5206)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define NE2000_ADDR 0x40000300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #define NE2000_ODDOFFSET 0x00010000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #define NE2000_ADDRSIZE 0x00020000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define NE2000_IRQ_VECTOR 0xf0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define NE2000_IRQ_PRIORITY 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define NE2000_IRQ_LEVEL 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define NE2000_BYTE volatile unsigned short
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #if defined(CONFIG_M5206eC3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define NE2000_ADDR 0x40000300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define NE2000_ODDOFFSET 0x00010000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define NE2000_ADDRSIZE 0x00020000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define NE2000_IRQ_VECTOR 0x1c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define NE2000_IRQ_PRIORITY 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define NE2000_IRQ_LEVEL 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define NE2000_BYTE volatile unsigned short
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #if defined(CONFIG_M5206e) && defined(CONFIG_NETtel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define NE2000_ADDR 0x30000300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define NE2000_ADDRSIZE 0x00001000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define NE2000_IRQ_VECTOR 25
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define NE2000_IRQ_PRIORITY 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define NE2000_IRQ_LEVEL 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define NE2000_BYTE volatile unsigned char
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #if defined(CONFIG_M5307C3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define NE2000_ADDR 0x40000300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define NE2000_ODDOFFSET 0x00010000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define NE2000_ADDRSIZE 0x00020000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) #define NE2000_IRQ_VECTOR 0x1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define NE2000_BYTE volatile unsigned short
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #if defined(CONFIG_M5272) && defined(CONFIG_NETtel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define NE2000_ADDR 0x30600300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define NE2000_ODDOFFSET 0x00008000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define NE2000_ADDRSIZE 0x00010000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define NE2000_IRQ_VECTOR 67
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #undef BSWAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define BSWAP(w) (w)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define NE2000_BYTE volatile unsigned short
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #undef RSWAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define RSWAP(w) (((w) << 8) | ((w) >> 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #if defined(CONFIG_M5307) && defined(CONFIG_NETtel)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define NE2000_ADDR0 0x30600300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define NE2000_ADDR1 0x30800300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define NE2000_ODDOFFSET 0x00008000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define NE2000_ADDRSIZE 0x00010000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define NE2000_IRQ_VECTOR0 27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define NE2000_IRQ_VECTOR1 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) #undef BSWAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) #define BSWAP(w) (w)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) #define NE2000_BYTE volatile unsigned short
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) #undef RSWAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define RSWAP(w) (((w) << 8) | ((w) >> 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #if defined(CONFIG_M5307) && defined(CONFIG_SECUREEDGEMP3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define NE2000_ADDR 0x30600300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define NE2000_ODDOFFSET 0x00008000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define NE2000_ADDRSIZE 0x00010000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define NE2000_IRQ_VECTOR 27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #undef BSWAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define BSWAP(w) (w)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define NE2000_BYTE volatile unsigned short
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #undef RSWAP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define RSWAP(w) (((w) << 8) | ((w) >> 8))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #if defined(CONFIG_ARN5307)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define NE2000_ADDR 0xfe600300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define NE2000_ODDOFFSET 0x00010000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define NE2000_ADDRSIZE 0x00020000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define NE2000_IRQ_VECTOR 0x1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define NE2000_IRQ_PRIORITY 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define NE2000_IRQ_LEVEL 3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define NE2000_BYTE volatile unsigned short
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #if defined(CONFIG_M5407C3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define NE2000_ADDR 0x40000300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define NE2000_ODDOFFSET 0x00010000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define NE2000_ADDRSIZE 0x00020000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define NE2000_IRQ_VECTOR 0x1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define NE2000_BYTE volatile unsigned short
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) /****************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #endif /* mcf8390_h */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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