^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * Machine dependent access functions for RTC registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #ifndef _ASM_MC146818RTC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) #define _ASM_MC146818RTC_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) #ifdef CONFIG_ATARI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) /* RTC in Atari machines */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <asm/atarihw.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define ATARI_RTC_PORT(x) (TT_RTC_BAS + 2*(x))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #define RTC_ALWAYS_BCD 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #define CMOS_READ(addr) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) atari_outb_p((addr), ATARI_RTC_PORT(0)); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) atari_inb_p(ATARI_RTC_PORT(1)); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define CMOS_WRITE(val, addr) ({ \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) atari_outb_p((addr), ATARI_RTC_PORT(0)); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) atari_outb_p((val), ATARI_RTC_PORT(1)); \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) })
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #endif /* CONFIG_ATARI */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #endif /* _ASM_MC146818RTC_H */