^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * File: m54xxgpt.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Purpose: Register and bit definitions for the MCF54XX
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Notes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #ifndef m54xxgpt_h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #define m54xxgpt_h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) /*********************************************************************
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * General Purpose Timers (GPT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) *********************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) /* Register read/write macros */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define MCF_GPT_GMS0 (MCF_MBAR + 0x000800)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #define MCF_GPT_GCIR0 (MCF_MBAR + 0x000804)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define MCF_GPT_GPWM0 (MCF_MBAR + 0x000808)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #define MCF_GPT_GSR0 (MCF_MBAR + 0x00080C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define MCF_GPT_GMS1 (MCF_MBAR + 0x000810)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define MCF_GPT_GCIR1 (MCF_MBAR + 0x000814)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define MCF_GPT_GPWM1 (MCF_MBAR + 0x000818)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define MCF_GPT_GSR1 (MCF_MBAR + 0x00081C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define MCF_GPT_GMS2 (MCF_MBAR + 0x000820)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define MCF_GPT_GCIR2 (MCF_MBAR + 0x000824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define MCF_GPT_GPWM2 (MCF_MBAR + 0x000828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define MCF_GPT_GSR2 (MCF_MBAR + 0x00082C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define MCF_GPT_GMS3 (MCF_MBAR + 0x000830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #define MCF_GPT_GCIR3 (MCF_MBAR + 0x000834)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define MCF_GPT_GPWM3 (MCF_MBAR + 0x000838)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define MCF_GPT_GSR3 (MCF_MBAR + 0x00083C)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #define MCF_GPT_GMS(x) (MCF_MBAR + 0x000800 + ((x) * 0x010))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define MCF_GPT_GCIR(x) (MCF_MBAR + 0x000804 + ((x) * 0x010))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define MCF_GPT_GPWM(x) (MCF_MBAR + 0x000808 + ((x) * 0x010))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define MCF_GPT_GSR(x) (MCF_MBAR + 0x00080C + ((x) * 0x010))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* Bit definitions and macros for MCF_GPT_GMS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #define MCF_GPT_GMS_TMS(x) (((x)&0x00000007)<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #define MCF_GPT_GMS_GPIO(x) (((x)&0x00000003)<<4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define MCF_GPT_GMS_IEN (0x00000100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define MCF_GPT_GMS_OD (0x00000200)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define MCF_GPT_GMS_SC (0x00000400)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #define MCF_GPT_GMS_CE (0x00001000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define MCF_GPT_GMS_WDEN (0x00008000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define MCF_GPT_GMS_ICT(x) (((x)&0x00000003)<<16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define MCF_GPT_GMS_OCT(x) (((x)&0x00000003)<<20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define MCF_GPT_GMS_OCPW(x) (((x)&0x000000FF)<<24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define MCF_GPT_GMS_OCT_FRCLOW (0x00000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define MCF_GPT_GMS_OCT_PULSEHI (0x00100000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define MCF_GPT_GMS_OCT_PULSELO (0x00200000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define MCF_GPT_GMS_OCT_TOGGLE (0x00300000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define MCF_GPT_GMS_ICT_ANY (0x00000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define MCF_GPT_GMS_ICT_RISE (0x00010000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define MCF_GPT_GMS_ICT_FALL (0x00020000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) #define MCF_GPT_GMS_ICT_PULSE (0x00030000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define MCF_GPT_GMS_GPIO_INPUT (0x00000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) #define MCF_GPT_GMS_GPIO_OUTLO (0x00000020)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define MCF_GPT_GMS_GPIO_OUTHI (0x00000030)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define MCF_GPT_GMS_GPIO_MASK (0x00000030)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define MCF_GPT_GMS_TMS_DISABLE (0x00000000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #define MCF_GPT_GMS_TMS_INCAPT (0x00000001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define MCF_GPT_GMS_TMS_OUTCAPT (0x00000002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define MCF_GPT_GMS_TMS_PWM (0x00000003)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define MCF_GPT_GMS_TMS_GPIO (0x00000004)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) #define MCF_GPT_GMS_TMS_MASK (0x00000007)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) /* Bit definitions and macros for MCF_GPT_GCIR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define MCF_GPT_GCIR_CNT(x) (((x)&0x0000FFFF)<<0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define MCF_GPT_GCIR_PRE(x) (((x)&0x0000FFFF)<<16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* Bit definitions and macros for MCF_GPT_GPWM */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define MCF_GPT_GPWM_LOAD (0x00000001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define MCF_GPT_GPWM_PWMOP (0x00000100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define MCF_GPT_GPWM_WIDTH(x) (((x)&0x0000FFFF)<<16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) /* Bit definitions and macros for MCF_GPT_GSR */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #define MCF_GPT_GSR_CAPT (0x00000001)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) #define MCF_GPT_GSR_COMP (0x00000002)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define MCF_GPT_GSR_PWMP (0x00000004)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define MCF_GPT_GSR_TEXP (0x00000008)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define MCF_GPT_GSR_PIN (0x00000100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define MCF_GPT_GSR_OVF(x) (((x)&0x00000007)<<12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define MCF_GPT_GSR_CAPTURE(x) (((x)&0x0000FFFF)<<16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /********************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #endif /* m54xxgpt_h */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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