^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef _M68K_IRQ_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define _M68K_IRQ_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * This should be the same as the max(NUM_X_SOURCES) for all the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * different m68k hosts compiled into the kernel.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Currently the Atari has 72 and the Amiga 24, but if both are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * supported in the kernel it is better to make room for 72.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * With EtherNAT add-on card on Atari, the highest interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * number is 140 so NR_IRQS needs to be 141.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #if defined(CONFIG_COLDFIRE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #define NR_IRQS 256
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #elif defined(CONFIG_VME) || defined(CONFIG_SUN3) || defined(CONFIG_SUN3X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #define NR_IRQS 200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #elif defined(CONFIG_ATARI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define NR_IRQS 141
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #elif defined(CONFIG_MAC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #define NR_IRQS 72
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #elif defined(CONFIG_Q40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #define NR_IRQS 43
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #elif defined(CONFIG_AMIGA) || !defined(CONFIG_MMU)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #define NR_IRQS 32
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #elif defined(CONFIG_APOLLO)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define NR_IRQS 24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #elif defined(CONFIG_HP300)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define NR_IRQS 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define NR_IRQS 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #if defined(CONFIG_M68020) || defined(CONFIG_M68030) || \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) defined(CONFIG_M68040) || defined(CONFIG_M68060)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * Interrupt source definitions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * General interrupt sources are the level 1-7.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * Adding an interrupt service routine for one of these sources
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * results in the addition of that routine to a chain of routines.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) * Each one is called in succession. Each individual interrupt
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) * service routine should determine if the device associated with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) * that routine requires service.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define IRQ_SPURIOUS 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #define IRQ_AUTO_1 1 /* level 1 interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #define IRQ_AUTO_2 2 /* level 2 interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) #define IRQ_AUTO_3 3 /* level 3 interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) #define IRQ_AUTO_4 4 /* level 4 interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define IRQ_AUTO_5 5 /* level 5 interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define IRQ_AUTO_6 6 /* level 6 interrupt */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define IRQ_AUTO_7 7 /* level 7 interrupt (non-maskable) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) #define IRQ_USER 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct irq_data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct irq_chip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) struct irq_desc;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) extern unsigned int m68k_irq_startup(struct irq_data *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) extern unsigned int m68k_irq_startup_irq(unsigned int irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) extern void m68k_irq_shutdown(struct irq_data *data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) extern void m68k_setup_auto_interrupt(void (*handler)(unsigned int,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) struct pt_regs *));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) extern void m68k_setup_user_interrupt(unsigned int vec, unsigned int cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) extern void m68k_setup_irq_controller(struct irq_chip *,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) void (*handle)(struct irq_desc *desc),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) unsigned int irq, unsigned int cnt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) extern unsigned int irq_canonicalize(unsigned int irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define irq_canonicalize(irq) (irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #endif /* !(CONFIG_M68020 || CONFIG_M68030 || CONFIG_M68040 || CONFIG_M68060) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) asmlinkage void do_IRQ(int irq, struct pt_regs *regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) extern atomic_t irq_err_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #endif /* _M68K_IRQ_H_ */