^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef _ASM_HASH_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define _ASM_HASH_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * If CONFIG_M68000=y (original mc68000/010), this file is #included
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * to work around the lack of a MULU.L instruction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) #define HAVE_ARCH__HASH_32 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * While it would be legal to substitute a different hash operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * entirely, let's keep it simple and just use an optimized multiply
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) * by GOLDEN_RATIO_32 = 0x61C88647.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * The best way to do that appears to be to multiply by 0x8647 with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * shifts and adds, and use mulu.w to multiply the high half by 0x61C8.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * Because the 68000 has multi-cycle shifts, this addition chain is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * chosen to minimise the shift distances.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * Despite every attempt to spoon-feed it simple operations, GCC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * 6.1.1 doggedly insists on doing annoying things like converting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * "lsl.l #2,<reg>" (12 cycles) to two adds (8+8 cycles).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) * It also likes to notice two shifts in a row, like "a = x << 2" and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) * "a <<= 7", and convert that to "a = x << 9". But shifts longer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) * than 8 bits are extra-slow on m68k, so that's a lose.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) * Since the 68000 is a very simple in-order processor with no
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * instruction scheduling effects on execution time, we can safely
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * take it out of GCC's hands and write one big asm() block.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * Without calling overhead, this operation is 30 bytes (14 instructions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * plus one immediate constant) and 166 cycles.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) * (Because %2 is fetched twice, it can't be postincrement, and thus it
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) * can't be a fully general "g" or "m". Register is preferred, but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) * offsettable memory or immediate will work.)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) static inline u32 __attribute_const__ __hash_32(u32 x)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) u32 a, b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) asm( "move.l %2,%0" /* a = x * 0x0001 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) "\n lsl.l #2,%0" /* a = x * 0x0004 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) "\n move.l %0,%1"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) "\n lsl.l #7,%0" /* a = x * 0x0200 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) "\n add.l %2,%0" /* a = x * 0x0201 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) "\n add.l %0,%1" /* b = x * 0x0205 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) "\n add.l %0,%0" /* a = x * 0x0402 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) "\n add.l %0,%1" /* b = x * 0x0607 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) "\n lsl.l #5,%0" /* a = x * 0x8040 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) : "=&d,d" (a), "=&r,r" (b)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) : "r,roi?" (x)); /* a+b = x*0x8647 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) return ((u16)(x*0x61c8) << 16) + a + b;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #endif /* _ASM_HASH_H */