^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * Implementation independent bits of the Floppy driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * much of this file is derived from what was originally the Q40 floppy driver.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * License. See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Copyright (C) 1999, 2000, 2001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Sun3x support added 2/4/2000 Sam Creasey (sammy@sammy.net)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/vmalloc.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) asmlinkage irqreturn_t floppy_hardint(int irq, void *dev_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) /* constants... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #undef MAX_DMA_ADDRESS
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define MAX_DMA_ADDRESS 0x00 /* nothing like that */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * Again, the CMOS information doesn't work on m68k..
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define FLOPPY0_TYPE (MACH_IS_Q40 ? 6 : 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define FLOPPY1_TYPE 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /* basically PC init + set use_virtual_dma */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #define FDC1 m68k_floppy_init()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define N_FDC 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define N_DRIVE 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /* vdma globals adapted from asm-i386/floppy.h */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static int virtual_dma_count=0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) static int virtual_dma_residue=0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) static char *virtual_dma_addr=NULL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) static int virtual_dma_mode=0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static int doing_pdma=0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) #include <asm/sun3xflop.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) extern spinlock_t dma_spin_lock;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static __inline__ unsigned long claim_dma_lock(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) spin_lock_irqsave(&dma_spin_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) return flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static __inline__ void release_dma_lock(unsigned long flags)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) spin_unlock_irqrestore(&dma_spin_lock, flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static __inline__ unsigned char fd_inb(int base, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) if(MACH_IS_Q40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return inb_p(base + reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) else if(MACH_IS_SUN3X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) return sun3x_82072_fd_inb(base + reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) static __inline__ void fd_outb(unsigned char value, int base, int reg)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) if(MACH_IS_Q40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) outb_p(value, base + reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) else if(MACH_IS_SUN3X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) sun3x_82072_fd_outb(value, base + reg);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static int fd_request_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) if(MACH_IS_Q40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) return request_irq(FLOPPY_IRQ, floppy_hardint,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) 0, "floppy", floppy_hardint);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) else if(MACH_IS_SUN3X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) return sun3xflop_request_irq();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) return -ENXIO;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) static void fd_free_irq(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) if(MACH_IS_Q40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) free_irq(FLOPPY_IRQ, floppy_hardint);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define fd_request_dma() vdma_request_dma(FLOPPY_DMA,"floppy")
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define fd_get_dma_residue() vdma_get_dma_residue(FLOPPY_DMA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define fd_dma_mem_alloc(size) vdma_mem_alloc(size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define fd_dma_setup(addr, size, mode, io) vdma_dma_setup(addr, size, mode, io)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define fd_enable_irq() /* nothing... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define fd_disable_irq() /* nothing... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define fd_free_dma() /* nothing */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /* No 64k boundary crossing problems on Q40 - no DMA at all */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define CROSS_64KB(a,s) (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define DMA_MODE_READ 0x44 /* i386 look-alike */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define DMA_MODE_WRITE 0x48
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) static int m68k_floppy_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) use_virtual_dma =1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) can_use_virtual_dma = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) if (MACH_IS_Q40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) return 0x3f0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) else if(MACH_IS_SUN3X)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) return sun3xflop_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) return -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) static int vdma_request_dma(unsigned int dmanr, const char * device_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) static int vdma_get_dma_residue(unsigned int dummy)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) return virtual_dma_count + virtual_dma_residue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) static unsigned long vdma_mem_alloc(unsigned long size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) return (unsigned long) vmalloc(size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) static void _fd_dma_mem_free(unsigned long addr, unsigned long size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) vfree((void *)addr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) #define fd_dma_mem_free(addr,size) _fd_dma_mem_free(addr, size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) /* choose_dma_mode ???*/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) static int vdma_dma_setup(char *addr, unsigned long size, int mode, int io)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) doing_pdma = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) virtual_dma_port = (MACH_IS_Q40 ? io : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) virtual_dma_mode = (mode == DMA_MODE_WRITE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) virtual_dma_addr = addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) virtual_dma_count = size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) virtual_dma_residue = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) static void fd_disable_dma(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) doing_pdma = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) virtual_dma_residue += virtual_dma_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) virtual_dma_count=0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) /* this is the only truly Q40 specific function */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) asmlinkage irqreturn_t floppy_hardint(int irq, void *dev_id)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) register unsigned char st;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #undef TRACE_FLPY_INT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #define NO_FLOPPY_ASSEMBLER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) #ifdef TRACE_FLPY_INT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static int calls=0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) static int bytes=0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) static int dma_wait=0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) if(!doing_pdma) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) floppy_interrupt(irq, dev_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) #ifdef TRACE_FLPY_INT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) if(!calls)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) bytes = virtual_dma_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) register int lcount;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) register char *lptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) /* serve 1st byte fast: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) st=1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) for(lcount=virtual_dma_count, lptr=virtual_dma_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) lcount; lcount--, lptr++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) st = inb(virtual_dma_port + FD_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) st &= STATUS_DMA | STATUS_READY;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) if (st != (STATUS_DMA | STATUS_READY))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) if(virtual_dma_mode)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) outb_p(*lptr, virtual_dma_port + FD_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) *lptr = inb_p(virtual_dma_port + FD_DATA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) virtual_dma_count = lcount;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) virtual_dma_addr = lptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) st = inb(virtual_dma_port + FD_STATUS);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) #ifdef TRACE_FLPY_INT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) calls++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) if (st == STATUS_DMA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) if (!(st & STATUS_DMA)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) virtual_dma_residue += virtual_dma_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) virtual_dma_count=0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) #ifdef TRACE_FLPY_INT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) pr_info("count=%x, residue=%x calls=%d bytes=%d dma_wait=%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) virtual_dma_count, virtual_dma_residue, calls, bytes,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) dma_wait);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) calls = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) dma_wait=0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) doing_pdma = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) floppy_interrupt(irq, dev_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) #ifdef TRACE_FLPY_INT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) if(!virtual_dma_count)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) dma_wait++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) return IRQ_HANDLED;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) #define EXTRA_FLOPPY_PARAMS
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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