^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) #ifndef _M68K_DELAY_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) #define _M68K_DELAY_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) #include <asm/param.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 1994 Hamish Macdonald
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright (C) 2004 Greg Ungerer <gerg@uclinux.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Delay routines, using a pre-computed "loops_per_jiffy" value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #if defined(CONFIG_COLDFIRE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * The ColdFire runs the delay loop at significantly different speeds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * depending upon long word alignment or not. We'll pad it to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * long word alignment which is the faster version.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * The 0x4a8e is of course a 'tstl %fp' instruction. This is better
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * than using a NOP (0x4e71) instruction because it executes in one
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) * cycle not three and doesn't allow for an arbitrary delay waiting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) * for bus cycles to finish. Also fp/a6 isn't likely to cause a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) * stall waiting for the register to become valid if such is added
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * to the coldfire at some stage.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define DELAY_ALIGN ".balignw 4, 0x4a8e\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) * No instruction alignment required for other m68k types.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define DELAY_ALIGN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static inline void __delay(unsigned long loops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) __asm__ __volatile__ (
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) DELAY_ALIGN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) "1: subql #1,%0\n\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) "jcc 1b"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) : "=d" (loops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) : "0" (loops));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) extern void __bad_udelay(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #ifdef CONFIG_CPU_HAS_NO_MULDIV64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) * The simpler m68k and ColdFire processors do not have a 32*32->64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) * multiply instruction. So we need to handle them a little differently.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) * We use a bit of shifting and a single 32*32->32 multiply to get close.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) #define HZSCALE (268435456 / (1000000 / HZ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) #define __const_udelay(u) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) __delay(((((u) * HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static inline void __xdelay(unsigned long xloops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) unsigned long tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) __asm__ ("mulul %2,%0:%1"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) : "=d" (xloops), "=d" (tmp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) : "d" (xloops), "1" (loops_per_jiffy));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) __delay(xloops * HZ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) * The definition of __const_udelay is specifically made a macro so that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) * the const factor (4295 = 2**32 / 1000000) can be optimized out when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) * the delay is a const.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define __const_udelay(n) (__xdelay((n) * 4295))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) static inline void __udelay(unsigned long usecs)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) __const_udelay(usecs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * Use only for very small delays ( < 1 msec). Should probably use a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * lookup table, really, as the multiplications take much too long with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * short delays. This is a "reasonable" implementation, though (and the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * first constant multiplications gets optimized away if the delay is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * a constant)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define udelay(n) (__builtin_constant_p(n) ? \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) ((n) > 20000 ? __bad_udelay() : __const_udelay(n)) : __udelay(n))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * nanosecond delay:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * ((((HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6) is the number of loops
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * per microsecond
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) * 1000 / ((((HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6) is the number of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) * nanoseconds per loop
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) * So n / ( 1000 / ((((HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6) ) would
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * be the number of loops for n nanoseconds
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) * The simpler m68k and ColdFire processors do not have a 32*32->64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) * multiply instruction. So we need to handle them a little differently.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) * We use a bit of shifting and a single 32*32->32 multiply to get close.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * This is a macro so that the const version can factor out the first
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) * multiply and shift.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define HZSCALE (268435456 / (1000000 / HZ))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) static inline void ndelay(unsigned long nsec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) __delay(DIV_ROUND_UP(nsec *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) ((((HZSCALE) >> 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) (loops_per_jiffy >> 11)) >> 6),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 1000));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define ndelay(n) ndelay(n)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #endif /* defined(_M68K_DELAY_H) */