Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) ** atariints.h -- Atari Linux interrupt handling structs and prototypes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) **
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) ** Copyright 1994 by Björn Brauel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) **
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) ** 5/2/94 Roman Hodek:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) **   TT interrupt definitions added.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) **
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) ** 12/02/96: (Roman)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) **   Adapted to new int handling scheme (see ataints.c); revised numbering
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) **
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) ** This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) ** License.  See the file COPYING in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) ** for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) **
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) #ifndef _LINUX_ATARIINTS_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) #define _LINUX_ATARIINTS_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) #include <asm/irq.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) #include <asm/atarihw.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) ** Atari Interrupt sources.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) **
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define STMFP_SOURCE_BASE  8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) #define TTMFP_SOURCE_BASE  24
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) #define SCC_SOURCE_BASE    40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) #define VME_SOURCE_BASE    56
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define VME_MAX_SOURCES    16
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define NUM_ATARI_SOURCES  141
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) /* convert vector number to int source number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) #define IRQ_VECTOR_TO_SOURCE(v)	((v) - ((v) < 0x20 ? 0x18 : (0x40-8)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) /* convert irq_handler index to vector number */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) #define IRQ_SOURCE_TO_VECTOR(i)	((i) + ((i) < 8 ? 0x18 : (0x40-8)))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) /* ST-MFP interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define IRQ_MFP_BUSY      (8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) #define IRQ_MFP_DCD       (9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define IRQ_MFP_CTS	  (10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) #define IRQ_MFP_GPU	  (11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) #define IRQ_MFP_TIMD      (12)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define IRQ_MFP_TIMC	  (13)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define IRQ_MFP_ACIA	  (14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define IRQ_MFP_FDC       (15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define IRQ_MFP_ACSI      IRQ_MFP_FDC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define IRQ_MFP_FSCSI     IRQ_MFP_FDC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define IRQ_MFP_IDE       IRQ_MFP_FDC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) #define IRQ_MFP_TIMB      (16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) #define IRQ_MFP_SERERR    (17)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) #define IRQ_MFP_SEREMPT   (18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) #define IRQ_MFP_RECERR    (19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) #define IRQ_MFP_RECFULL   (20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) #define IRQ_MFP_TIMA      (21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) #define IRQ_MFP_RI        (22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) #define IRQ_MFP_MMD       (23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) /* TT-MFP interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) #define IRQ_TT_MFP_IO0       (24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) #define IRQ_TT_MFP_IO1       (25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) #define IRQ_TT_MFP_SCC	     (26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) #define IRQ_TT_MFP_RI	     (27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) #define IRQ_TT_MFP_TIMD      (28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) #define IRQ_TT_MFP_TIMC	     (29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) #define IRQ_TT_MFP_DRVRDY    (30)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) #define IRQ_TT_MFP_SCSIDMA   (31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) #define IRQ_TT_MFP_TIMB      (32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) #define IRQ_TT_MFP_SERERR    (33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) #define IRQ_TT_MFP_SEREMPT   (34)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) #define IRQ_TT_MFP_RECERR    (35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) #define IRQ_TT_MFP_RECFULL   (36)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) #define IRQ_TT_MFP_TIMA      (37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) #define IRQ_TT_MFP_RTC       (38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) #define IRQ_TT_MFP_SCSI      (39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) /* SCC interrupts */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) #define IRQ_SCCB_TX	     (40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) #define IRQ_SCCB_STAT	     (42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) #define IRQ_SCCB_RX	     (44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) #define IRQ_SCCB_SPCOND	     (46)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) #define IRQ_SCCA_TX	     (48)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) #define IRQ_SCCA_STAT	     (50)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) #define IRQ_SCCA_RX	     (52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) #define IRQ_SCCA_SPCOND	     (54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) /* shared MFP timer D interrupts - hires timer for EtherNEC et al. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) #define IRQ_MFP_TIMER1       (64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) #define IRQ_MFP_TIMER2       (65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) #define IRQ_MFP_TIMER3       (66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) #define IRQ_MFP_TIMER4       (67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) #define IRQ_MFP_TIMER5       (68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) #define IRQ_MFP_TIMER6       (69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) #define IRQ_MFP_TIMER7       (70)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define IRQ_MFP_TIMER8       (71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define INT_CLK   24576	    /* CLK while int_clk =2.456MHz and divide = 100 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define INT_TICKS 246	    /* to make sched_time = 99.902... HZ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define MFP_ENABLE	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define MFP_PENDING	1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define MFP_SERVICE	2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define MFP_MASK	3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) /* Utility functions for setting/clearing bits in the interrupt registers of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)  * the MFP. 'type' should be constant, if 'irq' is constant, too, code size is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)  * reduced. set_mfp_bit() is nonsense for PENDING and SERVICE registers. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) static inline int get_mfp_bit( unsigned irq, int type )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) {	unsigned char	mask, *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	mask = 1 << (irq & 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	reg = (unsigned char *)&st_mfp.int_en_a + type*4 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 		  ((irq & 8) >> 2) + (((irq-8) & 16) << 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 	return( *reg & mask );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) static inline void set_mfp_bit( unsigned irq, int type )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) {	unsigned char	mask, *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 	mask = 1 << (irq & 7);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 	reg = (unsigned char *)&st_mfp.int_en_a + type*4 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) 		  ((irq & 8) >> 2) + (((irq-8) & 16) << 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 	__asm__ __volatile__ ( "orb %0,%1"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 			      : : "di" (mask), "m" (*reg) : "memory" );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) static inline void clear_mfp_bit( unsigned irq, int type )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) {	unsigned char	mask, *reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	mask = ~(1 << (irq & 7));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 	reg = (unsigned char *)&st_mfp.int_en_a + type*4 +
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 		  ((irq & 8) >> 2) + (((irq-8) & 16) << 3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 	if (type == MFP_PENDING || type == MFP_SERVICE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 		__asm__ __volatile__ ( "moveb %0,%1"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 				      : : "di" (mask), "m" (*reg) : "memory" );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 	else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 		__asm__ __volatile__ ( "andb %0,%1"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 				      : : "di" (mask), "m" (*reg) : "memory" );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)  * {en,dis}able_irq have the usual semantics of temporary blocking the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)  * interrupt, but not losing requests that happen between disabling and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)  * enabling. This is done with the MFP mask registers.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) static inline void atari_enable_irq( unsigned irq )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 	if (irq < STMFP_SOURCE_BASE || irq >= SCC_SOURCE_BASE) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 	set_mfp_bit( irq, MFP_MASK );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) static inline void atari_disable_irq( unsigned irq )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 	if (irq < STMFP_SOURCE_BASE || irq >= SCC_SOURCE_BASE) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 	clear_mfp_bit( irq, MFP_MASK );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172)  * In opposite to {en,dis}able_irq, requests between turn{off,on}_irq are not
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)  * "stored"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) static inline void atari_turnon_irq( unsigned irq )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 	if (irq < STMFP_SOURCE_BASE || irq >= SCC_SOURCE_BASE) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 	set_mfp_bit( irq, MFP_ENABLE );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static inline void atari_turnoff_irq( unsigned irq )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 	if (irq < STMFP_SOURCE_BASE || irq >= SCC_SOURCE_BASE) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 	clear_mfp_bit( irq, MFP_ENABLE );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 	clear_mfp_bit( irq, MFP_PENDING );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) static inline void atari_clear_pending_irq( unsigned irq )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 	if (irq < STMFP_SOURCE_BASE || irq >= SCC_SOURCE_BASE) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 	clear_mfp_bit( irq, MFP_PENDING );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) static inline int atari_irq_pending( unsigned irq )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 	if (irq < STMFP_SOURCE_BASE || irq >= SCC_SOURCE_BASE) return( 0 );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 	return( get_mfp_bit( irq, MFP_PENDING ) );
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) unsigned int atari_register_vme_int(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) void atari_unregister_vme_int(unsigned int);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #endif /* linux/atariints.h */