^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) ** asm-m68k/amigayle.h -- This header defines the registers of the gayle chip
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) ** found on the Amiga 1200
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) ** This information was found by disassembling card.resource,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) ** so the definitions may not be 100% correct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) ** anyone has an official doc ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) **
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) ** Copyright 1997 by Alain Malek
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) **
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) ** This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) ** License. See the file COPYING in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) ** for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) **
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) ** Created: 11/28/97 by Alain Malek
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #ifndef _M68K_AMIGAYLE_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #define _M68K_AMIGAYLE_H_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/amigahw.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /* memory layout */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define GAYLE_RAM (0x600000+zTwoBase)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define GAYLE_RAMSIZE (0x400000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define GAYLE_ATTRIBUTE (0xa00000+zTwoBase)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #define GAYLE_ATTRIBUTESIZE (0x020000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define GAYLE_IO (0xa20000+zTwoBase) /* 16bit and even 8bit registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define GAYLE_IOSIZE (0x010000)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #define GAYLE_IO_8BITODD (0xa30000+zTwoBase) /* odd 8bit registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /* offset for accessing odd IO registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define GAYLE_ODD (GAYLE_IO_8BITODD-GAYLE_IO-1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) /* GAYLE registers */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct GAYLE {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) u_char cardstatus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) u_char pad0[0x1000-1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) u_char intreq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) u_char pad1[0x1000-1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) u_char inten;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) u_char pad2[0x1000-1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) u_char config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) u_char pad3[0x1000-1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) #define GAYLE_ADDRESS (0xda8000) /* gayle main registers base address */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #define GAYLE_RESET (0xa40000) /* write 0x00 to start reset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) read 1 byte to stop reset */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) #define gayle (*(volatile struct GAYLE *)(zTwoBase+GAYLE_ADDRESS))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) #define gayle_reset (*(volatile u_char *)(zTwoBase+GAYLE_RESET))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) #define gayle_attribute ((volatile u_char *)(GAYLE_ATTRIBUTE))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) #define gayle_inb(a) readb( GAYLE_IO+(a)+(((a)&1)*GAYLE_ODD) )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define gayle_outb(v,a) writeb( v, GAYLE_IO+(a)+(((a)&1)*GAYLE_ODD) )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) #define gayle_inw(a) readw( GAYLE_IO+(a) )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #define gayle_outw(v,a) writew( v, GAYLE_IO+(a) )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) /* GAYLE_CARDSTATUS bit def */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #define GAYLE_CS_CCDET 0x40 /* credit card detect */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #define GAYLE_CS_BVD1 0x20 /* battery voltage detect 1 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) #define GAYLE_CS_SC 0x20 /* credit card status change */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #define GAYLE_CS_BVD2 0x10 /* battery voltage detect 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #define GAYLE_CS_DA 0x10 /* digital audio */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define GAYLE_CS_WR 0x08 /* write enable (1 == enabled) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define GAYLE_CS_BSY 0x04 /* credit card busy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define GAYLE_CS_IRQ 0x04 /* interrupt request */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) /* GAYLE_IRQ bit def */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #define GAYLE_IRQ_IDE 0x80
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) #define GAYLE_IRQ_CCDET 0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) #define GAYLE_IRQ_BVD1 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) #define GAYLE_IRQ_SC 0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) #define GAYLE_IRQ_BVD2 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) #define GAYLE_IRQ_DA 0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #define GAYLE_IRQ_WR 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) #define GAYLE_IRQ_BSY 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) #define GAYLE_IRQ_IRQ 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) #define GAYLE_IRQ_IDEACK1 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) #define GAYLE_IRQ_IDEACK0 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /* GAYLE_CONFIG bit def
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) (bit 0-1 for program voltage, bit 2-3 for access speed */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) #define GAYLE_CFG_0V 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) #define GAYLE_CFG_5V 0x01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define GAYLE_CFG_12V 0x02
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define GAYLE_CFG_100NS 0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define GAYLE_CFG_150NS 0x04
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define GAYLE_CFG_250NS 0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define GAYLE_CFG_720NS 0x0c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) struct gayle_ide_platform_data {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) unsigned long base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) unsigned long irqport;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) int explicit_ack; /* A1200 IDE needs explicit ack */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #endif /* asm-m68k/amigayle.h */