Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) |MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) |M68000 Hi-Performance Microprocessor Division
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) |M68060 Software Package
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) |Production Release P1.00 -- October 10, 1994
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7) |M68060 Software Package Copyright © 1993, 1994 Motorola Inc.  All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9) |THE SOFTWARE is provided on an "AS IS" basis and without warranty.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10) |To the maximum extent permitted by applicable law,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) |MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) |INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) |and any warranty against infringement with regard to the SOFTWARE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) |(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) |To the maximum extent permitted by applicable law,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) |IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18) |(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19) |BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) |ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) |Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23) |You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24) |so long as this entire notice is retained without alteration in any modified and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) |redistributed versions, and that such modified versions are clearly identified as such.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) |No licenses are granted by implication, estoppel or otherwise under any patents
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) |or trademarks of Motorola, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) | fskeleton.s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) | This file contains:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32) |	(1) example "Call-out"s
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) |	(2) example package entry code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) |	(3) example "Call-out" table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) #include <linux/linkage.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39) |################################
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40) | (1) EXAMPLE CALL-OUTS		#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41) |				#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42) | _060_fpsp_done()		#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43) | _060_real_ovfl()		#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) | _060_real_unfl()		#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) | _060_real_operr()		#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) | _060_real_snan()		#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) | _060_real_dz()		#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) | _060_real_inex()		#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) | _060_real_bsun()		#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) | _060_real_fline()		#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) | _060_real_fpu_disabled()	#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) | _060_real_trap()		#
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) |################################
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) | _060_fpsp_done():
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) | This is the main exit point for the 68060 Floating-Point
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) | Software Package. For a normal exit, all 060FPSP routines call this
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) | routine. The operating system can do system dependent clean-up or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) | simply execute an "rte" as with the sample code below.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) 	.global		_060_fpsp_done
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) _060_fpsp_done:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) 	bral	 _060_isp_done	| do the same as isp_done
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) | _060_real_ovfl():
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) | This is the exit point for the 060FPSP when an enabled overflow exception
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) | is present. The routine below should point to the operating system handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) | for enabled overflow conditions. The exception stack frame is an overflow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) | stack frame. The FP state frame holds the EXCEPTIONAL OPERAND.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) | The sample routine below simply clears the exception status bit and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) | does an "rte".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) 	.global		_060_real_ovfl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) _060_real_ovfl:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) 	fsave		-(%sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) 	move.w		#0x6000,0x2(%sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) 	frestore	(%sp)+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) 	bral		trap	| jump to trap handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) | _060_real_unfl():
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) | This is the exit point for the 060FPSP when an enabled underflow exception
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) | is present. The routine below should point to the operating system handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) | for enabled underflow conditions. The exception stack frame is an underflow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) | stack frame. The FP state frame holds the EXCEPTIONAL OPERAND.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) | The sample routine below simply clears the exception status bit and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) | does an "rte".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) 	.global		_060_real_unfl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) _060_real_unfl:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) 	fsave		-(%sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) 	move.w		#0x6000,0x2(%sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) 	frestore	(%sp)+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) 	bral		trap	| jump to trap handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) | _060_real_operr():
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) | This is the exit point for the 060FPSP when an enabled operand error exception
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) | is present. The routine below should point to the operating system handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) | for enabled operand error exceptions. The exception stack frame is an operand error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) | stack frame. The FP state frame holds the source operand of the faulting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) | instruction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) | The sample routine below simply clears the exception status bit and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) | does an "rte".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) 	.global		_060_real_operr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) _060_real_operr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) 	fsave		-(%sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) 	move.w		#0x6000,0x2(%sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) 	frestore	(%sp)+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) 	bral		trap	| jump to trap handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) | _060_real_snan():
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) | This is the exit point for the 060FPSP when an enabled signalling NaN exception
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) | is present. The routine below should point to the operating system handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) | for enabled signalling NaN exceptions. The exception stack frame is a signalling NaN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) | stack frame. The FP state frame holds the source operand of the faulting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) | instruction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) | The sample routine below simply clears the exception status bit and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) | does an "rte".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 	.global		_060_real_snan
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) _060_real_snan:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 	fsave		-(%sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 	move.w		#0x6000,0x2(%sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 	frestore	(%sp)+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 	bral		trap	| jump to trap handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) | _060_real_dz():
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) | This is the exit point for the 060FPSP when an enabled divide-by-zero exception
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) | is present. The routine below should point to the operating system handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) | for enabled divide-by-zero exceptions. The exception stack frame is a divide-by-zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) | stack frame. The FP state frame holds the source operand of the faulting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) | instruction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) | The sample routine below simply clears the exception status bit and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) | does an "rte".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 	.global		_060_real_dz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) _060_real_dz:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 	fsave		-(%sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 	move.w		#0x6000,0x2(%sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 	frestore	(%sp)+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 	bral		trap	| jump to trap handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) | _060_real_inex():
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) | This is the exit point for the 060FPSP when an enabled inexact exception
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) | is present. The routine below should point to the operating system handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) | for enabled inexact exceptions. The exception stack frame is an inexact
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) | stack frame. The FP state frame holds the source operand of the faulting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) | instruction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) | The sample routine below simply clears the exception status bit and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) | does an "rte".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 	.global		_060_real_inex
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) _060_real_inex:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 	fsave		-(%sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 	move.w		#0x6000,0x2(%sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 	frestore	(%sp)+
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 	bral		trap	| jump to trap handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) | _060_real_bsun():
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) | This is the exit point for the 060FPSP when an enabled bsun exception
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) | is present. The routine below should point to the operating system handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) | for enabled bsun exceptions. The exception stack frame is a bsun
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) | stack frame.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) | The sample routine below clears the exception status bit, clears the NaN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) | bit in the FPSR, and does an "rte". The instruction that caused the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) | bsun will now be re-executed but with the NaN FPSR bit cleared.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 	.global		_060_real_bsun
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) _060_real_bsun:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) |	fsave		-(%sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 	fmove.l		%fpsr,-(%sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 	andi.b		#0xfe,(%sp)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 	fmove.l		(%sp)+,%fpsr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 	bral		trap	| jump to trap handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) | _060_real_fline():
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) | This is the exit point for the 060FPSP when an F-Line Illegal exception is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) | encountered. Three different types of exceptions can enter the F-Line exception
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) | vector number 11: FP Unimplemented Instructions, FP implemented instructions when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) | the FPU is disabled, and F-Line Illegal instructions. The 060FPSP module
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) | _fpsp_fline() distinguishes between the three and acts appropriately. F-Line
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) | Illegals branch here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 	.global		_060_real_fline
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) _060_real_fline:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	bral		trap	| jump to trap handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) | _060_real_fpu_disabled():
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) | This is the exit point for the 060FPSP when an FPU disabled exception is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) | encountered. Three different types of exceptions can enter the F-Line exception
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) | vector number 11: FP Unimplemented Instructions, FP implemented instructions when
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) | the FPU is disabled, and F-Line Illegal instructions. The 060FPSP module
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) | _fpsp_fline() distinguishes between the three and acts appropriately. FPU disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) | exceptions branch here.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) | The sample code below enables the FPU, sets the PC field in the exception stack
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) | frame to the PC of the instruction causing the exception, and does an "rte".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) | The execution of the instruction then proceeds with an enabled floating-point
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) | unit.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 	.global		_060_real_fpu_disabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) _060_real_fpu_disabled:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) 	move.l		%d0,-(%sp)		| enabled the fpu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) 	.long	0x4E7A0808			|movec		pcr,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) 	bclr		#0x1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) 	.long	0x4E7B0808			|movec		%d0,pcr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) 	move.l		(%sp)+,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) 	move.l		0xc(%sp),0x2(%sp)	| set "Current PC"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) 	rte
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) | _060_real_trap():
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) | This is the exit point for the 060FPSP when an emulated "ftrapcc" instruction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) | discovers that the trap condition is true and it should branch to the operating
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) | system handler for the trap exception vector number 7.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) | The sample code below simply executes an "rte".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 	.global		_060_real_trap
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) _060_real_trap:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) 	bral		trap	| jump to trap handler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) |############################################################################
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) |#################################
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) | (2) EXAMPLE PACKAGE ENTRY CODE #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) |#################################
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) 	.global		_060_fpsp_snan
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) _060_fpsp_snan:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) 	bra.l		_FP_CALL_TOP+0x80+0x00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) 	.global		_060_fpsp_operr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) _060_fpsp_operr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) 	bra.l		_FP_CALL_TOP+0x80+0x08
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) 	.global		_060_fpsp_ovfl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) _060_fpsp_ovfl:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) 	bra.l		_FP_CALL_TOP+0x80+0x10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) 	.global		_060_fpsp_unfl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) _060_fpsp_unfl:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) 	bra.l		_FP_CALL_TOP+0x80+0x18
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) 	.global		_060_fpsp_dz
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) _060_fpsp_dz:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) 	bra.l		_FP_CALL_TOP+0x80+0x20
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) 	.global		_060_fpsp_inex
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) _060_fpsp_inex:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) 	bra.l		_FP_CALL_TOP+0x80+0x28
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) 	.global		_060_fpsp_fline
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) _060_fpsp_fline:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) 	bra.l		_FP_CALL_TOP+0x80+0x30
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) 	.global		_060_fpsp_unsupp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) _060_fpsp_unsupp:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) 	bra.l		_FP_CALL_TOP+0x80+0x38
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) 	.global		_060_fpsp_effadd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) _060_fpsp_effadd:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) 	bra.l		_FP_CALL_TOP+0x80+0x40
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) |############################################################################
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) |###############################
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) | (3) EXAMPLE CALL-OUT SECTION #
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) |###############################
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) | The size of this section MUST be 128 bytes!!!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) _FP_CALL_TOP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) 	.long	_060_real_bsun		- _FP_CALL_TOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) 	.long	_060_real_snan		- _FP_CALL_TOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) 	.long	_060_real_operr		- _FP_CALL_TOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) 	.long	_060_real_ovfl		- _FP_CALL_TOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) 	.long	_060_real_unfl		- _FP_CALL_TOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) 	.long	_060_real_dz		- _FP_CALL_TOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) 	.long	_060_real_inex		- _FP_CALL_TOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) 	.long	_060_real_fline		- _FP_CALL_TOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) 	.long	_060_real_fpu_disabled	- _FP_CALL_TOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) 	.long	_060_real_trap		- _FP_CALL_TOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) 	.long	_060_real_trace		- _FP_CALL_TOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) 	.long	_060_real_access	- _FP_CALL_TOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) 	.long	_060_fpsp_done		- _FP_CALL_TOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) 	.long	0x00000000, 0x00000000, 0x00000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) 	.long	_060_imem_read		- _FP_CALL_TOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) 	.long	_060_dmem_read		- _FP_CALL_TOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) 	.long	_060_dmem_write		- _FP_CALL_TOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) 	.long	_060_imem_read_word	- _FP_CALL_TOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) 	.long	_060_imem_read_long	- _FP_CALL_TOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) 	.long	_060_dmem_read_byte	- _FP_CALL_TOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) 	.long	_060_dmem_read_word	- _FP_CALL_TOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) 	.long	_060_dmem_read_long	- _FP_CALL_TOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) 	.long	_060_dmem_write_byte	- _FP_CALL_TOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) 	.long	_060_dmem_write_word	- _FP_CALL_TOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) 	.long	_060_dmem_write_long	- _FP_CALL_TOP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) 	.long	0x00000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) 	.long	0x00000000, 0x00000000, 0x00000000, 0x00000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) |############################################################################
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) | 060 FPSP KERNEL PACKAGE NEEDS TO GO HERE!!!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) #include "fpsp.sa"