^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) M68000 Hi-Performance Microprocessor Division
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) M68060 Software Package
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) Production Release P1.00 -- October 10, 1994
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) M68060 Software Package Copyright © 1993, 1994 Motorola Inc. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) THE SOFTWARE is provided on an "AS IS" basis and without warranty.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) To the maximum extent permitted by applicable law,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) and any warranty against infringement with regard to the SOFTWARE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) (INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) To the maximum extent permitted by applicable law,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) (INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) Motorola assumes no responsibility for the maintenance and support of the SOFTWARE.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) so long as this entire notice is retained without alteration in any modified and/or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) redistributed versions, and that such modified versions are clearly identified as such.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) No licenses are granted by implication, estoppel or otherwise under any patents
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) or trademarks of Motorola, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 68060 FLOATING-POINT SOFTWARE PACKAGE (Library version)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) --------------------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) The file fplsp.sa contains the "Library version" of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 68060SP Floating-Point Software Package. The routines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) included in this module can be used to emulate the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) FP instructions not implemented in 68060 hardware. These
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) instructions normally take exception vector #11
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) "FP Unimplemented Instruction".
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) By re-compiling a program that uses these instructions, and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) making subroutine calls in place of the unimplemented
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) instructions, a program can avoid the overhead associated
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) with taking the exception.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) Release file format:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) --------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) The file fplsp.sa is essentially a hexadecimal image of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) release package. This is the ONLY format which will be supported.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) The hex image was created by assembling the source code and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) then converting the resulting binary output image into an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) ASCII text file. The hexadecimal numbers are listed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) using the Motorola Assembly Syntax assembler directive "dc.l"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) (define constant longword). The file can be converted to other
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) assembly syntaxes by using any word processor with a global
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) search and replace function.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) To assist in assembling and linking this module with other modules,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) the installer should add a symbolic label to the top of the file.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) This will allow calling routines to access the entry points
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) of this package.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) The source code fplsp.s has also been included but only for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) documentation purposes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) Release file structure:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) -----------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) The file fplsp.sa contains an "Entry-Point" section and a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) code section. The FPLSP has no "Call-Out" section. The first section
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) is the "Entry-Point" section. In order to access a function in the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) package, a program must "bsr" or "jsr" to the location listed
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) below in "68060FPLSP entry points" that corresponds to the desired
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) function. A branch instruction located at the selected entry point
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) within the package will then enter the correct emulation code routine.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) The entry point addresses at the beginning of the package will remain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) fixed so that a program calling the routines will not have to be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) re-compiled with every new 68060FPLSP release.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) There are 3 entry-points for each instruction type: single precision,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) double precision, and extended precision.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) As an example, the "fsin" library instruction can be passed an
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) extended precision operand if program executes:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) # fsin.x fp0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) fmovm.x &0x01,-(%sp) # pass operand on stack
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) bsr.l _060FPLSP_TOP+0x1a8 # branch to fsin routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) add.l &0xc,%sp # clear operand from stack
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) Upon return, fp0 holds the correct result. The FPSR is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) set correctly. The FPCR is unchanged. The FPIAR is undefined.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) Another example. This time, a dyadic operation:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) # frem.s %fp1,%fp0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) fmov.s %fp1,-(%sp) # pass src operand
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) fmov.s %fp0,-(%sp) # pass dst operand
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) bsr.l _060FPLSP_TOP+0x168 # branch to frem routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) addq.l &0x8,%sp # clear operands from stack
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) Again, the result is returned in fp0. Note that BOTH operands
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) are passed in single precision format.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) Exception reporting:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) --------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) The package takes exceptions according to the FPCR value upon subroutine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) entry. If an exception should be reported, then the package forces
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) this exception using implemented floating-point instructions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) For example, if the instruction being emulated should cause a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) floating-point Operand Error exception, then the library routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) executes an FMUL of a zero and an infinity to force the OPERR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) exception. Although the FPIAR will be undefined for the enabled
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) Operand Error exception handler, the user will at least be able
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) to record that the event occurred.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) Miscellaneous:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) --------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) The package does not attempt to correctly emulate instructions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) with Signalling NAN inputs. Use of SNANs should be avoided with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) this package.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) The fabs/fadd/fdiv/fint/fintrz/fmul/fneg/fsqrt/fsub entry points
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) are provided for the convenience of older compilers that make
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) subroutine calls for all fp instructions. The code does NOT emulate
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) the instruction but rather simply executes it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) 68060FPLSP entry points:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) ------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) _060FPLSP_TOP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) 0x000: _060LSP__facoss_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 0x008: _060LSP__facosd_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) 0x010: _060LSP__facosx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) 0x018: _060LSP__fasins_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) 0x020: _060LSP__fasind_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) 0x028: _060LSP__fasinx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) 0x030: _060LSP__fatans_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) 0x038: _060LSP__fatand_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) 0x040: _060LSP__fatanx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) 0x048: _060LSP__fatanhs_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 0x050: _060LSP__fatanhd_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) 0x058: _060LSP__fatanhx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 0x060: _060LSP__fcoss_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) 0x068: _060LSP__fcosd_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) 0x070: _060LSP__fcosx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) 0x078: _060LSP__fcoshs_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) 0x080: _060LSP__fcoshd_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) 0x088: _060LSP__fcoshx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) 0x090: _060LSP__fetoxs_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) 0x098: _060LSP__fetoxd_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) 0x0a0: _060LSP__fetoxx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) 0x0a8: _060LSP__fetoxm1s_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) 0x0b0: _060LSP__fetoxm1d_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) 0x0b8: _060LSP__fetoxm1x_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) 0x0c0: _060LSP__fgetexps_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 0x0c8: _060LSP__fgetexpd_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) 0x0d0: _060LSP__fgetexpx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) 0x0d8: _060LSP__fgetmans_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) 0x0e0: _060LSP__fgetmand_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) 0x0e8: _060LSP__fgetmanx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) 0x0f0: _060LSP__flog10s_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) 0x0f8: _060LSP__flog10d_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) 0x100: _060LSP__flog10x_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) 0x108: _060LSP__flog2s_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) 0x110: _060LSP__flog2d_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) 0x118: _060LSP__flog2x_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) 0x120: _060LSP__flogns_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) 0x128: _060LSP__flognd_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) 0x130: _060LSP__flognx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) 0x138: _060LSP__flognp1s_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) 0x140: _060LSP__flognp1d_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) 0x148: _060LSP__flognp1x_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) 0x150: _060LSP__fmods_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) 0x158: _060LSP__fmodd_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) 0x160: _060LSP__fmodx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) 0x168: _060LSP__frems_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) 0x170: _060LSP__fremd_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) 0x178: _060LSP__fremx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) 0x180: _060LSP__fscales_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 0x188: _060LSP__fscaled_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) 0x190: _060LSP__fscalex_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) 0x198: _060LSP__fsins_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 0x1a0: _060LSP__fsind_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) 0x1a8: _060LSP__fsinx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) 0x1b0: _060LSP__fsincoss_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 0x1b8: _060LSP__fsincosd_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 0x1c0: _060LSP__fsincosx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 0x1c8: _060LSP__fsinhs_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) 0x1d0: _060LSP__fsinhd_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) 0x1d8: _060LSP__fsinhx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) 0x1e0: _060LSP__ftans_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 0x1e8: _060LSP__ftand_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) 0x1f0: _060LSP__ftanx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) 0x1f8: _060LSP__ftanhs_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) 0x200: _060LSP__ftanhd_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 0x208: _060LSP__ftanhx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) 0x210: _060LSP__ftentoxs_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) 0x218: _060LSP__ftentoxd_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) 0x220: _060LSP__ftentoxx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) 0x228: _060LSP__ftwotoxs_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 0x230: _060LSP__ftwotoxd_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) 0x238: _060LSP__ftwotoxx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 0x240: _060LSP__fabss_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) 0x248: _060LSP__fabsd_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 0x250: _060LSP__fabsx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) 0x258: _060LSP__fadds_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 0x260: _060LSP__faddd_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) 0x268: _060LSP__faddx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) 0x270: _060LSP__fdivs_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) 0x278: _060LSP__fdivd_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 0x280: _060LSP__fdivx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 0x288: _060LSP__fints_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 0x290: _060LSP__fintd_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) 0x298: _060LSP__fintx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 0x2a0: _060LSP__fintrzs_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) 0x2a8: _060LSP__fintrzd_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) 0x2b0: _060LSP__fintrzx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) 0x2b8: _060LSP__fmuls_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) 0x2c0: _060LSP__fmuld_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 0x2c8: _060LSP__fmulx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) 0x2d0: _060LSP__fnegs_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 0x2d8: _060LSP__fnegd_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) 0x2e0: _060LSP__fnegx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) 0x2e8: _060LSP__fsqrts_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) 0x2f0: _060LSP__fsqrtd_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) 0x2f8: _060LSP__fsqrtx_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 0x300: _060LSP__fsubs_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 0x308: _060LSP__fsubd_
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) 0x310: _060LSP__fsubx_