^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) | util.sa 3.7 7/29/91
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) | This file contains routines used by other programs.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) | ovf_res: used by overflow to force the correct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) | result. ovf_r_k, ovf_r_x2, ovf_r_x3 are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) | derivatives of this routine.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) | get_fline: get user's opcode word
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) | g_dfmtou: returns the destination format.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) | g_opcls: returns the opclass of the float instruction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) | g_rndpr: returns the rounding precision.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) | reg_dest: write byte, word, or long data to Dn
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) | Copyright (C) Motorola, Inc. 1990
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) | All Rights Reserved
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) | For details on the license for this file, please see the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) | file, README, in this same directory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) |UTIL idnt 2,1 | Motorola 040 Floating Point Software Package
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) |section 8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include "fpsp.h"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) |xref mem_read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) .global g_dfmtou
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) .global g_opcls
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) .global g_rndpr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) .global get_fline
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) .global reg_dest
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) | Final result table for ovf_res. Note that the negative counterparts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) | are unnecessary as ovf_res always returns the sign separately from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) | the exponent.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) | ;+inf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) EXT_PINF: .long 0x7fff0000,0x00000000,0x00000000,0x00000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) | ;largest +ext
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) EXT_PLRG: .long 0x7ffe0000,0xffffffff,0xffffffff,0x00000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) | ;largest magnitude +sgl in ext
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) SGL_PLRG: .long 0x407e0000,0xffffff00,0x00000000,0x00000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) | ;largest magnitude +dbl in ext
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) DBL_PLRG: .long 0x43fe0000,0xffffffff,0xfffff800,0x00000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) | ;largest -ext
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) tblovfl:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .long EXT_RN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .long EXT_RZ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) .long EXT_RM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) .long EXT_RP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) .long SGL_RN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) .long SGL_RZ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) .long SGL_RM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .long SGL_RP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .long DBL_RN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .long DBL_RZ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) .long DBL_RM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) .long DBL_RP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .long error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .long error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .long error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) .long error
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) | ovf_r_k --- overflow result calculation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) | This entry point is used by kernel_ex.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) | This forces the destination precision to be extended
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) | Input: operand in ETEMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) | Output: a result is in ETEMP (internal extended format)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .global ovf_r_k
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) ovf_r_k:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) lea ETEMP(%a6),%a0 |a0 points to source operand
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) bclrb #sign_bit,ETEMP_EX(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) sne ETEMP_SGN(%a6) |convert to internal IEEE format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) | ovf_r_x2 --- overflow result calculation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) | This entry point used by x_ovfl. (opclass 0 and 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) | Input a0 points to an operand in the internal extended format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) | Output a0 points to the result in the internal extended format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) | This sets the round precision according to the user's FPCR unless the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) | instruction is fsgldiv or fsglmul or fsadd, fdadd, fsub, fdsub, fsmul,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) | fdmul, fsdiv, fddiv, fssqrt, fsmove, fdmove, fsabs, fdabs, fsneg, fdneg.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) | If the instruction is fsgldiv of fsglmul, the rounding precision must be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) | extended. If the instruction is not fsgldiv or fsglmul but a force-
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) | precision instruction, the rounding precision is then set to the force
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) | precision.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) .global ovf_r_x2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) ovf_r_x2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) btstb #E3,E_BYTE(%a6) |check for nu exception
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) beql ovf_e1_exc |it is cu exception
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) ovf_e3_exc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) movew CMDREG3B(%a6),%d0 |get the command word
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) andiw #0x00000060,%d0 |clear all bits except 6 and 5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) cmpil #0x00000040,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) beql ovff_sgl |force precision is single
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) cmpil #0x00000060,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) beql ovff_dbl |force precision is double
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) movew CMDREG3B(%a6),%d0 |get the command word again
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) andil #0x7f,%d0 |clear all except operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) cmpil #0x33,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) beql ovf_fsgl |fsglmul or fsgldiv
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) cmpil #0x30,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) beql ovf_fsgl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) bra ovf_fpcr |instruction is none of the above
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) | ;use FPCR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) ovf_e1_exc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) movew CMDREG1B(%a6),%d0 |get command word
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) andil #0x00000044,%d0 |clear all bits except 6 and 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) cmpil #0x00000040,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) beql ovff_sgl |the instruction is force single
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) cmpil #0x00000044,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) beql ovff_dbl |the instruction is force double
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) movew CMDREG1B(%a6),%d0 |again get the command word
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) andil #0x0000007f,%d0 |clear all except the op code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) cmpil #0x00000027,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) beql ovf_fsgl |fsglmul
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) cmpil #0x00000024,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) beql ovf_fsgl |fsgldiv
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) bra ovf_fpcr |none of the above, use FPCR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) | Inst is either fsgldiv or fsglmul. Force extended precision.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) ovf_fsgl:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) clrl %d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) bra ovf_res
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) ovff_sgl:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) movel #0x00000001,%d0 |set single
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) bra ovf_res
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) ovff_dbl:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) movel #0x00000002,%d0 |set double
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) bra ovf_res
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) | The precision is in the fpcr.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) ovf_fpcr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) bfextu FPCR_MODE(%a6){#0:#2},%d0 |set round precision
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) bra ovf_res
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) | ovf_r_x3 --- overflow result calculation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) | This entry point used by x_ovfl. (opclass 3 only)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) | Input a0 points to an operand in the internal extended format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) | Output a0 points to the result in the internal extended format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) | This sets the round precision according to the destination size.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) .global ovf_r_x3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) ovf_r_x3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) bsr g_dfmtou |get dest fmt in d0{1:0}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) | ;for fmovout, the destination format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) | ;is the rounding precision
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) | ovf_res --- overflow result calculation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) | Input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) | a0 points to operand in internal extended format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) | Output:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) | a0 points to result in internal extended format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) .global ovf_res
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) ovf_res:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) lsll #2,%d0 |move round precision to d0{3:2}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) bfextu FPCR_MODE(%a6){#2:#2},%d1 |set round mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) orl %d1,%d0 |index is fmt:mode in d0{3:0}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) leal tblovfl,%a1 |load a1 with table address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) movel %a1@(%d0:l:4),%a1 |use d0 as index to the table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) jmp (%a1) |go to the correct routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) |case DEST_FMT = EXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) EXT_RN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) leal EXT_PINF,%a1 |answer is +/- infinity
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) bsetb #inf_bit,FPSR_CC(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) bra set_sign |now go set the sign
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) EXT_RZ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) leal EXT_PLRG,%a1 |answer is +/- large number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) bra set_sign |now go set the sign
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) EXT_RM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) tstb LOCAL_SGN(%a0) |if negative overflow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) beqs e_rm_pos
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) e_rm_neg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) leal EXT_PINF,%a1 |answer is negative infinity
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) orl #neginf_mask,USER_FPSR(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) bra end_ovfr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) e_rm_pos:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) leal EXT_PLRG,%a1 |answer is large positive number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) bra end_ovfr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) EXT_RP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) tstb LOCAL_SGN(%a0) |if negative overflow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) beqs e_rp_pos
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) e_rp_neg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) leal EXT_PLRG,%a1 |answer is large negative number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) bsetb #neg_bit,FPSR_CC(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) bra end_ovfr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) e_rp_pos:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) leal EXT_PINF,%a1 |answer is positive infinity
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) bsetb #inf_bit,FPSR_CC(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) bra end_ovfr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) |case DEST_FMT = DBL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) DBL_RN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) leal EXT_PINF,%a1 |answer is +/- infinity
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) bsetb #inf_bit,FPSR_CC(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) bra set_sign
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) DBL_RZ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) leal DBL_PLRG,%a1 |answer is +/- large number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) bra set_sign |now go set the sign
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) DBL_RM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) tstb LOCAL_SGN(%a0) |if negative overflow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) beqs d_rm_pos
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) d_rm_neg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) leal EXT_PINF,%a1 |answer is negative infinity
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) orl #neginf_mask,USER_FPSR(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) bra end_ovfr |inf is same for all precisions (ext,dbl,sgl)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) d_rm_pos:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) leal DBL_PLRG,%a1 |answer is large positive number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) bra end_ovfr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) DBL_RP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) tstb LOCAL_SGN(%a0) |if negative overflow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) beqs d_rp_pos
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) d_rp_neg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) leal DBL_PLRG,%a1 |answer is large negative number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) bsetb #neg_bit,FPSR_CC(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) bra end_ovfr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) d_rp_pos:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) leal EXT_PINF,%a1 |answer is positive infinity
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) bsetb #inf_bit,FPSR_CC(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) bra end_ovfr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) |case DEST_FMT = SGL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) SGL_RN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) leal EXT_PINF,%a1 |answer is +/- infinity
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) bsetb #inf_bit,FPSR_CC(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) bras set_sign
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) SGL_RZ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) leal SGL_PLRG,%a1 |answer is +/- large number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) bras set_sign
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) SGL_RM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) tstb LOCAL_SGN(%a0) |if negative overflow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) beqs s_rm_pos
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) s_rm_neg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) leal EXT_PINF,%a1 |answer is negative infinity
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) orl #neginf_mask,USER_FPSR(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) bras end_ovfr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) s_rm_pos:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) leal SGL_PLRG,%a1 |answer is large positive number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) bras end_ovfr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) SGL_RP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) tstb LOCAL_SGN(%a0) |if negative overflow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) beqs s_rp_pos
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) s_rp_neg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) leal SGL_PLRG,%a1 |answer is large negative number
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) bsetb #neg_bit,FPSR_CC(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) bras end_ovfr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) s_rp_pos:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) leal EXT_PINF,%a1 |answer is positive infinity
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) bsetb #inf_bit,FPSR_CC(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) bras end_ovfr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) set_sign:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) tstb LOCAL_SGN(%a0) |if negative overflow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) beqs end_ovfr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) neg_sign:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) bsetb #neg_bit,FPSR_CC(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) end_ovfr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) movew LOCAL_EX(%a1),LOCAL_EX(%a0) |do not overwrite sign
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) movel LOCAL_HI(%a1),LOCAL_HI(%a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) movel LOCAL_LO(%a1),LOCAL_LO(%a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) | ERROR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) error:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) | get_fline --- get f-line opcode of interrupted instruction
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) | Returns opcode in the low word of d0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) get_fline:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) movel USER_FPIAR(%a6),%a0 |opcode address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) movel #0,-(%a7) |reserve a word on the stack
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) leal 2(%a7),%a1 |point to low word of temporary
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) movel #2,%d0 |count
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) bsrl mem_read
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) movel (%a7)+,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) | g_rndpr --- put rounding precision in d0{1:0}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) | valid return codes are:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) | 00 - extended
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) | 01 - single
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) | 10 - double
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) | begin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) | get rounding precision (cmdreg3b{6:5})
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) | begin
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) | case opclass = 011 (move out)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) | get destination format - this is the also the rounding precision
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) | case opclass = 0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) | if E3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) | *case RndPr(from cmdreg3b{6:5} = 11 then RND_PREC = DBL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) | *case RndPr(from cmdreg3b{6:5} = 10 then RND_PREC = SGL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) | case RndPr(from cmdreg3b{6:5} = 00 | 01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) | use precision from FPCR{7:6}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) | case 00 then RND_PREC = EXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) | case 01 then RND_PREC = SGL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) | case 10 then RND_PREC = DBL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) | else E1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) | use precision in FPCR{7:6}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) | case 00 then RND_PREC = EXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) | case 01 then RND_PREC = SGL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) | case 10 then RND_PREC = DBL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) | end
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) g_rndpr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) bsr g_opcls |get opclass in d0{2:0}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) cmpw #0x0003,%d0 |check for opclass 011
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) bnes op_0x0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) | For move out instructions (opclass 011) the destination format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) | is the same as the rounding precision. Pass results from g_dfmtou.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) bsr g_dfmtou
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) op_0x0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) btstb #E3,E_BYTE(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) beql unf_e1_exc |branch to e1 underflow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) unf_e3_exc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) movel CMDREG3B(%a6),%d0 |rounding precision in d0{10:9}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) bfextu %d0{#9:#2},%d0 |move the rounding prec bits to d0{1:0}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) cmpil #0x2,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) beql unff_sgl |force precision is single
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) cmpil #0x3,%d0 |force precision is double
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) beql unff_dbl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) movew CMDREG3B(%a6),%d0 |get the command word again
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) andil #0x7f,%d0 |clear all except operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) cmpil #0x33,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) beql unf_fsgl |fsglmul or fsgldiv
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) cmpil #0x30,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) beql unf_fsgl |fsgldiv or fsglmul
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) bra unf_fpcr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) unf_e1_exc:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) movel CMDREG1B(%a6),%d0 |get 32 bits off the stack, 1st 16 bits
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) | ;are the command word
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) andil #0x00440000,%d0 |clear all bits except bits 6 and 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) cmpil #0x00400000,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) beql unff_sgl |force single
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) cmpil #0x00440000,%d0 |force double
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) beql unff_dbl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) movel CMDREG1B(%a6),%d0 |get the command word again
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) andil #0x007f0000,%d0 |clear all bits except the operation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) cmpil #0x00270000,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) beql unf_fsgl |fsglmul
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) cmpil #0x00240000,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) beql unf_fsgl |fsgldiv
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) bra unf_fpcr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) | Convert to return format. The values from cmdreg3b and the return
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) | values are:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) | cmdreg3b return precision
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) | -------- ------ ---------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) | 00,01 0 ext
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) | 10 1 sgl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) | 11 2 dbl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) | Force single
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) unff_sgl:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) movel #1,%d0 |return 1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) | Force double
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) unff_dbl:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) movel #2,%d0 |return 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) | Force extended
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) unf_fsgl:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) movel #0,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) | Get rounding precision set in FPCR{7:6}.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) unf_fpcr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) movel USER_FPCR(%a6),%d0 |rounding precision bits in d0{7:6}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) bfextu %d0{#24:#2},%d0 |move the rounding prec bits to d0{1:0}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) | g_opcls --- put opclass in d0{2:0}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) g_opcls:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) btstb #E3,E_BYTE(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) beqs opc_1b |if set, go to cmdreg1b
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) opc_3b:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) clrl %d0 |if E3, only opclass 0x0 is possible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) opc_1b:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) movel CMDREG1B(%a6),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) bfextu %d0{#0:#3},%d0 |shift opclass bits d0{31:29} to d0{2:0}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) | g_dfmtou --- put destination format in d0{1:0}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) | If E1, the format is from cmdreg1b{12:10}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) | If E3, the format is extended.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) | Dest. Fmt.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) | extended 010 -> 00
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) | single 001 -> 01
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) | double 101 -> 10
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) g_dfmtou:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) btstb #E3,E_BYTE(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) beqs op011
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) clrl %d0 |if E1, size is always ext
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) op011:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) movel CMDREG1B(%a6),%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) bfextu %d0{#3:#3},%d0 |dest fmt from cmdreg1b{12:10}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) cmpb #1,%d0 |check for single
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) bnes not_sgl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) movel #1,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) not_sgl:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) cmpb #5,%d0 |check for double
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) bnes not_dbl
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) movel #2,%d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) not_dbl:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) clrl %d0 |must be extended
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) | Final result table for unf_sub. Note that the negative counterparts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) | are unnecessary as unf_sub always returns the sign separately from
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) | the exponent.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) | ;+zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) EXT_PZRO: .long 0x00000000,0x00000000,0x00000000,0x00000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) | ;+zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) SGL_PZRO: .long 0x3f810000,0x00000000,0x00000000,0x00000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) | ;+zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) DBL_PZRO: .long 0x3c010000,0x00000000,0x00000000,0x00000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) | ;smallest +ext denorm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) EXT_PSML: .long 0x00000000,0x00000000,0x00000001,0x00000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) | ;smallest +sgl denorm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) SGL_PSML: .long 0x3f810000,0x00000100,0x00000000,0x00000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) | ;smallest +dbl denorm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) DBL_PSML: .long 0x3c010000,0x00000000,0x00000800,0x00000000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) | UNF_SUB --- underflow result calculation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) | Input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) | d0 contains round precision
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) | a0 points to input operand in the internal extended format
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) | Output:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) | a0 points to correct internal extended precision result.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) tblunf:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) .long uEXT_RN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) .long uEXT_RZ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) .long uEXT_RM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) .long uEXT_RP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) .long uSGL_RN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) .long uSGL_RZ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) .long uSGL_RM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) .long uSGL_RP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) .long uDBL_RN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) .long uDBL_RZ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) .long uDBL_RM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) .long uDBL_RP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) .long uDBL_RN
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) .long uDBL_RZ
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) .long uDBL_RM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) .long uDBL_RP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) .global unf_sub
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) unf_sub:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) lsll #2,%d0 |move round precision to d0{3:2}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) bfextu FPCR_MODE(%a6){#2:#2},%d1 |set round mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) orl %d1,%d0 |index is fmt:mode in d0{3:0}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) leal tblunf,%a1 |load a1 with table address
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) movel %a1@(%d0:l:4),%a1 |use d0 as index to the table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) jmp (%a1) |go to the correct routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) |case DEST_FMT = EXT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) uEXT_RN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) leal EXT_PZRO,%a1 |answer is +/- zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) bsetb #z_bit,FPSR_CC(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) bra uset_sign |now go set the sign
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) uEXT_RZ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) leal EXT_PZRO,%a1 |answer is +/- zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) bsetb #z_bit,FPSR_CC(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) bra uset_sign |now go set the sign
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) uEXT_RM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) tstb LOCAL_SGN(%a0) |if negative underflow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) beqs ue_rm_pos
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) ue_rm_neg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) leal EXT_PSML,%a1 |answer is negative smallest denorm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) bsetb #neg_bit,FPSR_CC(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) bra end_unfr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) ue_rm_pos:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) leal EXT_PZRO,%a1 |answer is positive zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) bsetb #z_bit,FPSR_CC(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) bra end_unfr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) uEXT_RP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) tstb LOCAL_SGN(%a0) |if negative underflow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) beqs ue_rp_pos
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) ue_rp_neg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) leal EXT_PZRO,%a1 |answer is negative zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) oril #negz_mask,USER_FPSR(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) bra end_unfr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) ue_rp_pos:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) leal EXT_PSML,%a1 |answer is positive smallest denorm
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) bra end_unfr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) |case DEST_FMT = DBL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) uDBL_RN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) leal DBL_PZRO,%a1 |answer is +/- zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) bsetb #z_bit,FPSR_CC(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) bra uset_sign
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) uDBL_RZ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) leal DBL_PZRO,%a1 |answer is +/- zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) bsetb #z_bit,FPSR_CC(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) bra uset_sign |now go set the sign
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) uDBL_RM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) tstb LOCAL_SGN(%a0) |if negative overflow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) beqs ud_rm_pos
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) ud_rm_neg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) leal DBL_PSML,%a1 |answer is smallest denormalized negative
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) bsetb #neg_bit,FPSR_CC(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) bra end_unfr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) ud_rm_pos:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) leal DBL_PZRO,%a1 |answer is positive zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) bsetb #z_bit,FPSR_CC(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) bra end_unfr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) uDBL_RP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) tstb LOCAL_SGN(%a0) |if negative overflow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574) beqs ud_rp_pos
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) ud_rp_neg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) leal DBL_PZRO,%a1 |answer is negative zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) oril #negz_mask,USER_FPSR(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) bra end_unfr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) ud_rp_pos:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) leal DBL_PSML,%a1 |answer is smallest denormalized negative
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) bra end_unfr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) |case DEST_FMT = SGL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) uSGL_RN:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) leal SGL_PZRO,%a1 |answer is +/- zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) bsetb #z_bit,FPSR_CC(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) bras uset_sign
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) uSGL_RZ:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) leal SGL_PZRO,%a1 |answer is +/- zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) bsetb #z_bit,FPSR_CC(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) bras uset_sign
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) uSGL_RM:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) tstb LOCAL_SGN(%a0) |if negative overflow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) beqs us_rm_pos
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) us_rm_neg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) leal SGL_PSML,%a1 |answer is smallest denormalized negative
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) bsetb #neg_bit,FPSR_CC(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) bras end_unfr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) us_rm_pos:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) leal SGL_PZRO,%a1 |answer is positive zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) bsetb #z_bit,FPSR_CC(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) bras end_unfr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) uSGL_RP:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) tstb LOCAL_SGN(%a0) |if negative overflow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) beqs us_rp_pos
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) us_rp_neg:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) leal SGL_PZRO,%a1 |answer is negative zero
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) oril #negz_mask,USER_FPSR(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) bras end_unfr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) us_rp_pos:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) leal SGL_PSML,%a1 |answer is smallest denormalized positive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) bras end_unfr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) uset_sign:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) tstb LOCAL_SGN(%a0) |if negative overflow
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) beqs end_unfr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) uneg_sign:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) bsetb #neg_bit,FPSR_CC(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) end_unfr:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) movew LOCAL_EX(%a1),LOCAL_EX(%a0) |be careful not to overwrite sign
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) movel LOCAL_HI(%a1),LOCAL_HI(%a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) movel LOCAL_LO(%a1),LOCAL_LO(%a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) | reg_dest --- write byte, word, or long data to Dn
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) | Input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) | L_SCR1: Data
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) | d1: data size and dest register number formatted as:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) | 32 5 4 3 2 1 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) | -----------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) | | 0 | Size | Dest Reg # |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) | -----------------------------------------------
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) | Size is:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) | 0 - Byte
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) | 1 - Word
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) | 2 - Long/Single
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) pregdst:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) .long byte_d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) .long byte_d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) .long byte_d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) .long byte_d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) .long byte_d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) .long byte_d5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) .long byte_d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) .long byte_d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) .long word_d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) .long word_d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655) .long word_d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) .long word_d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) .long word_d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) .long word_d5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) .long word_d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) .long word_d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) .long long_d0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) .long long_d1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) .long long_d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) .long long_d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) .long long_d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) .long long_d5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) .long long_d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) .long long_d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) reg_dest:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) leal pregdst,%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) movel %a0@(%d1:l:4),%a0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) jmp (%a0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) byte_d0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) moveb L_SCR1(%a6),USER_D0+3(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) byte_d1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) moveb L_SCR1(%a6),USER_D1+3(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) byte_d2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) moveb L_SCR1(%a6),%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) byte_d3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) moveb L_SCR1(%a6),%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) byte_d4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) moveb L_SCR1(%a6),%d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) byte_d5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) moveb L_SCR1(%a6),%d5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) byte_d6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) moveb L_SCR1(%a6),%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) byte_d7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) moveb L_SCR1(%a6),%d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) word_d0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700) movew L_SCR1(%a6),USER_D0+2(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) word_d1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) movew L_SCR1(%a6),USER_D1+2(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) word_d2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) movew L_SCR1(%a6),%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) word_d3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) movew L_SCR1(%a6),%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) word_d4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) movew L_SCR1(%a6),%d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) word_d5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) movew L_SCR1(%a6),%d5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) word_d6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) movew L_SCR1(%a6),%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) word_d7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) movew L_SCR1(%a6),%d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) long_d0:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) movel L_SCR1(%a6),USER_D0(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) long_d1:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) movel L_SCR1(%a6),USER_D1(%a6)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) long_d2:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) movel L_SCR1(%a6),%d2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) long_d3:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) movel L_SCR1(%a6),%d3
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) long_d4:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) movel L_SCR1(%a6),%d4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) long_d5:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) movel L_SCR1(%a6),%d5
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) long_d6:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) movel L_SCR1(%a6),%d6
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) long_d7:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) movel L_SCR1(%a6),%d7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) rts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) |end