^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /***************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * nettel.c -- startup code support for the NETtel boards
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) 2009, Greg Ungerer (gerg@snapgear.com)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) /***************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/param.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <linux/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/coldfire.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <asm/mcfsim.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <asm/nettel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /***************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * Define the IO and interrupt resources of the 2 SMC9196 interfaces.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #define NETTEL_SMC0_ADDR 0x30600300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #define NETTEL_SMC0_IRQ 29
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define NETTEL_SMC1_ADDR 0x30600000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define NETTEL_SMC1_IRQ 27
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) * We need some access into the SMC9196 registers. Define those registers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) * we will need here (including the smc91x.h doesn't seem to give us these
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) * in a simple form).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #define SMC91xx_BANKSELECT 14
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #define SMC91xx_BASEADDR 2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #define SMC91xx_BASEMAC 4
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /***************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) static struct resource nettel_smc91x_0_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) .start = NETTEL_SMC0_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) .end = NETTEL_SMC0_ADDR + 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) .start = NETTEL_SMC0_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) .end = NETTEL_SMC0_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) static struct resource nettel_smc91x_1_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) .start = NETTEL_SMC1_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) .end = NETTEL_SMC1_ADDR + 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) .start = NETTEL_SMC1_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) .end = NETTEL_SMC1_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static struct platform_device nettel_smc91x[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) .name = "smc91x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) .num_resources = ARRAY_SIZE(nettel_smc91x_0_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) .resource = nettel_smc91x_0_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) .name = "smc91x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) .num_resources = ARRAY_SIZE(nettel_smc91x_1_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) .resource = nettel_smc91x_1_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static struct platform_device *nettel_devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) &nettel_smc91x[0],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) &nettel_smc91x[1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) /***************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) static u8 nettel_macdefault[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) 0x00, 0xd0, 0xcf, 0x00, 0x00, 0x01,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * Set flash contained MAC address into SMC9196 core. Make sure the flash
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * MAC address is sane, and not an empty flash. If no good use the Moreton
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) * Bay default MAC address instead.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) static void __init nettel_smc91x_setmac(unsigned int ioaddr, unsigned int flashaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) u16 *macp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) macp = (u16 *) flashaddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) if ((macp[0] == 0xffff) && (macp[1] == 0xffff) && (macp[2] == 0xffff))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) macp = (u16 *) &nettel_macdefault[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) writew(1, NETTEL_SMC0_ADDR + SMC91xx_BANKSELECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) writew(macp[0], ioaddr + SMC91xx_BASEMAC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) writew(macp[1], ioaddr + SMC91xx_BASEMAC + 2);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) writew(macp[2], ioaddr + SMC91xx_BASEMAC + 4);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /***************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * Re-map the address space of at least one of the SMC ethernet
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) * parts. Both parts power up decoding the same address, so we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * need to move one of them first, before doing anything else.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) static void __init nettel_smc91x_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) writew(0x00ec, MCFSIM_PADDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) mcf_setppdata(0, 0x0080);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) writew(1, NETTEL_SMC0_ADDR + SMC91xx_BANKSELECT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) writew(0x0067, NETTEL_SMC0_ADDR + SMC91xx_BASEADDR);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) mcf_setppdata(0x0080, 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) /* Set correct chip select timing for SMC9196 accesses */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) writew(0x1180, MCFSIM_CSCR3);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /* Set the SMC interrupts to be auto-vectored */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) mcf_autovector(NETTEL_SMC0_IRQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) mcf_autovector(NETTEL_SMC1_IRQ);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) /* Set MAC addresses from flash for both interfaces */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) nettel_smc91x_setmac(NETTEL_SMC0_ADDR, 0xf0006000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) nettel_smc91x_setmac(NETTEL_SMC1_ADDR, 0xf0006006);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) /***************************************************************************/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) static int __init init_nettel(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) nettel_smc91x_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) platform_add_devices(nettel_devices, ARRAY_SIZE(nettel_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) arch_initcall(init_nettel);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) /***************************************************************************/
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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