^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * linux/arch/m68k/atari/config.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Copyright (C) 1994 Bjoern Brauel
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * 5/2/94 Roman Hodek:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Added setting of time_adj to get a better clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * 5/14/94 Roman Hodek:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * gettod() for TT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * 5/15/94 Roman Hodek:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * hard_reset_now() for Atari (and others?)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * 94/12/30 Andreas Schwab:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * atari_sched_init fixed to get precise clock.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * License. See the file COPYING in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) * Miscellaneous atari stuff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/seq_file.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/console.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) #include <linux/ioport.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <linux/platform_device.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <linux/usb/isp116x.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <linux/vt_kern.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <asm/bootinfo.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) #include <asm/bootinfo-atari.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) #include <asm/byteorder.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) #include <asm/setup.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) #include <asm/atarihw.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #include <asm/atariints.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #include <asm/atari_stram.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #include <asm/machdep.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) #include <asm/hwtest.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) #include <asm/io.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) u_long atari_mch_cookie;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) EXPORT_SYMBOL(atari_mch_cookie);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) u_long atari_mch_type;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) EXPORT_SYMBOL(atari_mch_type);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) struct atari_hw_present atari_hw_present;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) EXPORT_SYMBOL(atari_hw_present);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) u_long atari_switches;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) EXPORT_SYMBOL(atari_switches);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) int atari_dont_touch_floppy_select;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) EXPORT_SYMBOL(atari_dont_touch_floppy_select);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) int atari_rtc_year_offset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /* local function prototypes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) static void atari_reset(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) static void atari_get_model(char *model);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) static void atari_get_hardware_list(struct seq_file *m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) /* atari specific irq functions */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) extern void atari_init_IRQ (void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) extern void atari_mksound(unsigned int count, unsigned int ticks);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) #ifdef CONFIG_HEARTBEAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) static void atari_heartbeat(int on);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) /* atari specific timer functions (in time.c) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) extern void atari_sched_init(irq_handler_t);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) extern int atari_mste_hwclk (int, struct rtc_time *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) extern int atari_tt_hwclk (int, struct rtc_time *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) /* ++roman: This is a more elaborate test for an SCC chip, since the plain
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) * Medusa board generates DTACK at the SCC's standard addresses, but a SCC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) * board in the Medusa is possible. Also, the addresses where the ST_ESCC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) * resides generate DTACK without the chip, too.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * The method is to write values into the interrupt vector register, that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * should be readable without trouble (from channel A!).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) static int __init scc_test(volatile char *ctla)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) if (!hwreg_present(ctla))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) MFPDELAY();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) *ctla = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) MFPDELAY();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) *ctla = 0x40;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) MFPDELAY();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) *ctla = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) MFPDELAY();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) if (*ctla != 0x40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) MFPDELAY();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) *ctla = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) MFPDELAY();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) *ctla = 0x60;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) MFPDELAY();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) *ctla = 2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) MFPDELAY();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) if (*ctla != 0x60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) return 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * Parse an Atari-specific record in the bootinfo
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) int __init atari_parse_bootinfo(const struct bi_record *record)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) int unknown = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) const void *data = record->data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) switch (be16_to_cpu(record->tag)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) case BI_ATARI_MCH_COOKIE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) atari_mch_cookie = be32_to_cpup(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) case BI_ATARI_MCH_TYPE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) atari_mch_type = be32_to_cpup(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) unknown = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) return unknown;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) /* Parse the Atari-specific switches= option. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) static int __init atari_switches_setup(char *str)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) char switches[COMMAND_LINE_SIZE];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) char *p;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) int ovsc_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) char *args = switches;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) if (!MACH_IS_ATARI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) /* copy string to local array, strsep works destructively... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) strcpy(switches, str);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) atari_switches = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) /* parse the options */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) while ((p = strsep(&args, ",")) != NULL) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) if (!*p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) ovsc_shift = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) if (strncmp(p, "ov_", 3) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) p += 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) ovsc_shift = ATARI_SWITCH_OVSC_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) if (strcmp(p, "ikbd") == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) /* RTS line of IKBD ACIA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) atari_switches |= ATARI_SWITCH_IKBD << ovsc_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) } else if (strcmp(p, "midi") == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) /* RTS line of MIDI ACIA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) atari_switches |= ATARI_SWITCH_MIDI << ovsc_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) } else if (strcmp(p, "snd6") == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) atari_switches |= ATARI_SWITCH_SND6 << ovsc_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) } else if (strcmp(p, "snd7") == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) atari_switches |= ATARI_SWITCH_SND7 << ovsc_shift;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) early_param("switches", atari_switches_setup);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) * Setup the Atari configuration info
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) void __init config_atari(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) unsigned short tos_version;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) memset(&atari_hw_present, 0, sizeof(atari_hw_present));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) /* Change size of I/O space from 64KB to 4GB. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) ioport_resource.end = 0xFFFFFFFF;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) mach_sched_init = atari_sched_init;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) mach_init_IRQ = atari_init_IRQ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) mach_get_model = atari_get_model;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) mach_get_hardware_list = atari_get_hardware_list;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) mach_reset = atari_reset;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) mach_max_dma_address = 0xffffff;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) #if IS_ENABLED(CONFIG_INPUT_M68K_BEEP)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) mach_beep = atari_mksound;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) #ifdef CONFIG_HEARTBEAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) mach_heartbeat = atari_heartbeat;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) /* Set switches as requested by the user */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) if (atari_switches & ATARI_SWITCH_IKBD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) acia.key_ctrl = ACIA_DIV64 | ACIA_D8N1S | ACIA_RHTID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) if (atari_switches & ATARI_SWITCH_MIDI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) acia.mid_ctrl = ACIA_DIV16 | ACIA_D8N1S | ACIA_RHTID;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) if (atari_switches & (ATARI_SWITCH_SND6|ATARI_SWITCH_SND7)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) sound_ym.rd_data_reg_sel = 14;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) sound_ym.wd_data = sound_ym.rd_data_reg_sel |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) ((atari_switches&ATARI_SWITCH_SND6) ? 0x40 : 0) |
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) ((atari_switches&ATARI_SWITCH_SND7) ? 0x80 : 0);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) /* ++bjoern:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) * Determine hardware present
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) pr_info("Atari hardware found:");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) if (MACH_IS_MEDUSA) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) /* There's no Atari video hardware on the Medusa, but all the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) * addresses below generate a DTACK so no bus error occurs! */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) } else if (hwreg_present(f030_xreg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) ATARIHW_SET(VIDEL_SHIFTER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) pr_cont(" VIDEL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239) /* This is a temporary hack: If there is Falcon video
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) * hardware, we assume that the ST-DMA serves SCSI instead of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) * ACSI. In the future, there should be a better method for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242) * this...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244) ATARIHW_SET(ST_SCSI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) pr_cont(" STDMA-SCSI");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) } else if (hwreg_present(tt_palette)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) ATARIHW_SET(TT_SHIFTER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) pr_cont(" TT_SHIFTER");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) } else if (hwreg_present(&shifter_st.bas_hi)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) if (hwreg_present(&shifter_st.bas_lo) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) (shifter_st.bas_lo = 0x0aau, shifter_st.bas_lo == 0x0aau)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) ATARIHW_SET(EXTD_SHIFTER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) pr_cont(" EXTD_SHIFTER");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) ATARIHW_SET(STND_SHIFTER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) pr_cont(" STND_SHIFTER");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) if (hwreg_present(&st_mfp.par_dt_reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) ATARIHW_SET(ST_MFP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261) pr_cont(" ST_MFP");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) if (hwreg_present(&tt_mfp.par_dt_reg)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) ATARIHW_SET(TT_MFP);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) pr_cont(" TT_MFP");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) if (hwreg_present(&tt_scsi_dma.dma_addr_hi)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268) ATARIHW_SET(SCSI_DMA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) pr_cont(" TT_SCSI_DMA");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) * The ST-DMA address registers aren't readable
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) * on all Medusas, so the test below may fail
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) if (MACH_IS_MEDUSA ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) (hwreg_present(&st_dma.dma_vhi) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) (st_dma.dma_vhi = 0x55) && (st_dma.dma_hi = 0xaa) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) st_dma.dma_vhi == 0x55 && st_dma.dma_hi == 0xaa &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) (st_dma.dma_vhi = 0xaa) && (st_dma.dma_hi = 0x55) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280) st_dma.dma_vhi == 0xaa && st_dma.dma_hi == 0x55)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) ATARIHW_SET(EXTD_DMA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) pr_cont(" EXTD_DMA");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) if (hwreg_present(&tt_scsi.scsi_data)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) ATARIHW_SET(TT_SCSI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) pr_cont(" TT_SCSI");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288) if (hwreg_present(&sound_ym.rd_data_reg_sel)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289) ATARIHW_SET(YM_2149);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) pr_cont(" YM2149");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) if (!MACH_IS_MEDUSA && hwreg_present(&tt_dmasnd.ctrl)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) ATARIHW_SET(PCM_8BIT);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) pr_cont(" PCM");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) if (hwreg_present(&falcon_codec.unused5)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) ATARIHW_SET(CODEC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) pr_cont(" CODEC");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) if (hwreg_present(&dsp56k_host_interface.icr)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301) ATARIHW_SET(DSP56K);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) pr_cont(" DSP56K");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) if (hwreg_present(&tt_scc_dma.dma_ctrl) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305) #if 0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) /* This test sucks! Who knows some better? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) (tt_scc_dma.dma_ctrl = 0x01, (tt_scc_dma.dma_ctrl & 1) == 1) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) (tt_scc_dma.dma_ctrl = 0x00, (tt_scc_dma.dma_ctrl & 1) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) #else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) !MACH_IS_MEDUSA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) ATARIHW_SET(SCC_DMA);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) pr_cont(" SCC_DMA");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) if (scc_test(&atari_scc.cha_a_ctrl)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) ATARIHW_SET(SCC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) pr_cont(" SCC");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) if (scc_test(&st_escc.cha_b_ctrl)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) ATARIHW_SET(ST_ESCC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) pr_cont(" ST_ESCC");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) if (hwreg_present(&tt_scu.sys_mask)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) ATARIHW_SET(SCU);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) /* Assume a VME bus if there's a SCU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327) ATARIHW_SET(VME);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) pr_cont(" VME SCU");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) if (hwreg_present((void *)(0xffff9210))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) ATARIHW_SET(ANALOG_JOY);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) pr_cont(" ANALOG_JOY");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) if (hwreg_present(blitter.halftone)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) ATARIHW_SET(BLITTER);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) pr_cont(" BLITTER");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) if (hwreg_present((void *)0xfff00039)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339) ATARIHW_SET(IDE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) pr_cont(" IDE");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) #if 1 /* This maybe wrong */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343) if (!MACH_IS_MEDUSA && hwreg_present(&tt_microwire.data) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) hwreg_present(&tt_microwire.mask) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) (tt_microwire.mask = 0x7ff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) udelay(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) tt_microwire.data = MW_LM1992_PSG_HIGH | MW_LM1992_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) udelay(1),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) tt_microwire.data != 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) ATARIHW_SET(MICROWIRE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) while (tt_microwire.mask != 0x7ff)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352) ;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) pr_cont(" MICROWIRE");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356) if (hwreg_present(&tt_rtc.regsel)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) ATARIHW_SET(TT_CLK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) pr_cont(" TT_CLK");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359) mach_hwclk = atari_tt_hwclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) if (hwreg_present(&mste_rtc.sec_ones)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) ATARIHW_SET(MSTE_CLK);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) pr_cont(" MSTE_CLK");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) mach_hwclk = atari_mste_hwclk;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) if (!MACH_IS_MEDUSA && hwreg_present(&dma_wd.fdc_speed) &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) hwreg_write(&dma_wd.fdc_speed, 0)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) ATARIHW_SET(FDCSPEED);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) pr_cont(" FDC_SPEED");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371) if (!ATARIHW_PRESENT(ST_SCSI)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) ATARIHW_SET(ACSI);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) pr_cont(" ACSI");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) pr_cont("\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377) if (CPU_IS_040_OR_060)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) /* Now it seems to be safe to turn of the tt0 transparent
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) * translation (the one that must not be turned off in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) * head.S...)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) asm volatile ("\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) " moveq #0,%%d0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) " .chip 68040\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385) " movec %%d0,%%itt0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) " movec %%d0,%%dtt0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) " .chip 68k"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) : /* no outputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) : /* no inputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) : "d0");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) /* allocator for memory that must reside in st-ram */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) atari_stram_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) /* Set up a mapping for the VMEbus address region:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) * VME is either at phys. 0xfexxxxxx (TT) or 0xa00000..0xdfffff
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) * (MegaSTE) In both cases, the whole 16 MB chunk is mapped at
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) * 0xfe000000 virt., because this can be done with a single
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) * transparent translation. On the 68040, lots of often unused
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) * page tables would be needed otherwise. On a MegaSTE or similar,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) * the highest byte is stripped off by hardware due to the 24 bit
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403) * design of the bus.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) if (CPU_IS_020_OR_030) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407) unsigned long tt1_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) tt1_val = 0xfe008543; /* Translate 0xfexxxxxx, enable, cache
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) * inhibit, read and write, FDC mask = 3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) * FDC val = 4 -> Supervisor only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) asm volatile ("\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) " .chip 68030\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) " pmove %0,%/tt1\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414) " .chip 68k"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) : : "m" (tt1_val));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) asm volatile ("\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418) " .chip 68040\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419) " movec %0,%%itt1\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) " movec %0,%%dtt1\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) " .chip 68k"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) : "d" (0xfe00a040)); /* Translate 0xfexxxxxx, enable,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) * supervisor only, non-cacheable/
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) * serialized, writable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) /* Fetch tos version at Physical 2 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) * We my not be able to access this address if the kernel is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) * loaded to st ram, since the first page is unmapped. On the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433) * Medusa this is always the case and there is nothing we can do
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) * about this, so we just assume the smaller offset. For the TT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) * we use the fact that in head.S we have set up a mapping
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) * 0xFFxxxxxx -> 0x00xxxxxx, so that the first 16MB is accessible
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) * in the last 16MB of the address space.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) tos_version = (MACH_IS_MEDUSA) ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) 0xfff : *(unsigned short *)0xff000002;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441) atari_rtc_year_offset = (tos_version < 0x306) ? 70 : 68;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) #ifdef CONFIG_HEARTBEAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) static void atari_heartbeat(int on)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) unsigned char tmp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448) unsigned long flags;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) if (atari_dont_touch_floppy_select)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) local_irq_save(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) sound_ym.rd_data_reg_sel = 14; /* Select PSG Port A */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455) tmp = sound_ym.rd_data_reg_sel;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) sound_ym.wd_data = on ? (tmp & ~0x02) : (tmp | 0x02);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) local_irq_restore(flags);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) /* ++roman:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) * This function does a reset on machines that lack the ability to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) * assert the processor's _RESET signal somehow via hardware. It is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) * based on the fact that you can find the initial SP and PC values
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) * after a reset at physical addresses 0 and 4. This works pretty well
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) * for Atari machines, since the lowest 8 bytes of physical memory are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) * really ROM (mapped by hardware). For other 680x0 machines: don't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) * know if it works...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) * To get the values at addresses 0 and 4, the MMU better is turned
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) * off first. After that, we have to jump into physical address space
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) * (the PC before the pmove statement points to the virtual address of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) * the code). Getting that physical address is not hard, but the code
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) * becomes a bit complex since I've tried to ensure that the jump
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) * statement after the pmove is in the cache already (otherwise the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) * processor can't fetch it!). For that, the code first jumps to the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) * jump statement with the (virtual) address of the pmove section in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) * an address register . The jump statement is surely in the cache
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) * now. After that, that physical address of the reset code is loaded
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) * into the same address register, pmove is done and the same jump
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) * statements goes to the reset code. Since there are not many
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) * statements between the two jumps, I hope it stays in the cache.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) * The C code makes heavy use of the GCC features that you can get the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) * address of a C label. No hope to compile this with another compiler
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) * than GCC!
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490) /* ++andreas: no need for complicated code, just depend on prefetch */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) static void atari_reset(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) long tc_val = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) long reset_addr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) * On the Medusa, phys. 0x4 may contain garbage because it's no
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) * ROM. See above for explanation why we cannot use PTOV(4).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) reset_addr = MACH_IS_MEDUSA || MACH_IS_AB40 ? 0xe00030 :
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) *(unsigned long *) 0xff000004;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) /* reset ACIA for switch off OverScan, if it's active */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) if (atari_switches & ATARI_SWITCH_OVSC_IKBD)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) acia.key_ctrl = ACIA_RESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) if (atari_switches & ATARI_SWITCH_OVSC_MIDI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) acia.mid_ctrl = ACIA_RESET;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510) /* processor independent: turn off interrupts and reset the VBR;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) * the caches must be left enabled, else prefetching the final jump
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) * instruction doesn't work.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) local_irq_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) asm volatile ("movec %0,%%vbr"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) : : "d" (0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518) if (CPU_IS_040_OR_060) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) unsigned long jmp_addr040 = virt_to_phys(&&jmp_addr_label040);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) if (CPU_IS_060) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) /* 68060: clear PCR to turn off superscalar operation */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) asm volatile ("\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) " .chip 68060\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524) " movec %0,%%pcr\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) " .chip 68k"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) : : "d" (0));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) asm volatile ("\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) " move.l %0,%%d0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) " and.l #0xff000000,%%d0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) " or.w #0xe020,%%d0\n" /* map 16 MB, enable, cacheable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) " .chip 68040\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) " movec %%d0,%%itt0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) " movec %%d0,%%dtt0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) " .chip 68k\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) " jmp %0@"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) : : "a" (jmp_addr040)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) : "d0");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) jmp_addr_label040:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) asm volatile ("\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) " moveq #0,%%d0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) " nop\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) " .chip 68040\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) " cinva %%bc\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) " nop\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) " pflusha\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) " nop\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) " movec %%d0,%%tc\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) " nop\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551) /* the following setup of transparent translations is needed on the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) * Afterburner040 to successfully reboot. Other machines shouldn't
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) * care about a different tt regs setup, they also didn't care in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) * the past that the regs weren't turned off. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) " move.l #0xffc000,%%d0\n" /* whole insn space cacheable */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556) " movec %%d0,%%itt0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) " movec %%d0,%%itt1\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) " or.w #0x40,%/d0\n" /* whole data space non-cacheable/ser. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) " movec %%d0,%%dtt0\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) " movec %%d0,%%dtt1\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) " .chip 68k\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562) " jmp %0@"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) : /* no outputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) : "a" (reset_addr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) : "d0");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) } else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567) asm volatile ("\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) " pmove %0,%%tc\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) " jmp %1@"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) : /* no outputs */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571) : "m" (tc_val), "a" (reset_addr));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) static void atari_get_model(char *model)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) strcpy(model, "Atari ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) switch (atari_mch_cookie >> 16) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) case ATARI_MCH_ST:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) if (ATARIHW_PRESENT(MSTE_CLK))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) strcat(model, "Mega ST");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) strcat(model, "ST");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) case ATARI_MCH_STE:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) if (MACH_IS_MSTE)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) strcat(model, "Mega STE");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) strcat(model, "STE");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) case ATARI_MCH_TT:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) if (MACH_IS_MEDUSA)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) /* Medusa has TT _MCH cookie */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) strcat(model, "Medusa");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) strcat(model, "TT");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) case ATARI_MCH_FALCON:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599) strcat(model, "Falcon");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600) if (MACH_IS_AB40)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) strcat(model, " (with Afterburner040)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) default:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) sprintf(model + strlen(model), "(unknown mach cookie 0x%lx)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) atari_mch_cookie);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611) static void atari_get_hardware_list(struct seq_file *m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615) for (i = 0; i < m68k_num_memory; i++)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) seq_printf(m, "\t%3ld MB at 0x%08lx (%s)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) m68k_memory[i].size >> 20, m68k_memory[i].addr,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) (m68k_memory[i].addr & 0xff000000 ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) "alternate RAM" : "ST-RAM"));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) #define ATARIHW_ANNOUNCE(name, str) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) if (ATARIHW_PRESENT(name)) \
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) seq_printf(m, "\t%s\n", str)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) seq_puts(m, "Detected hardware:\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626) ATARIHW_ANNOUNCE(STND_SHIFTER, "ST Shifter");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) ATARIHW_ANNOUNCE(EXTD_SHIFTER, "STe Shifter");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) ATARIHW_ANNOUNCE(TT_SHIFTER, "TT Shifter");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) ATARIHW_ANNOUNCE(VIDEL_SHIFTER, "Falcon Shifter");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630) ATARIHW_ANNOUNCE(YM_2149, "Programmable Sound Generator");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) ATARIHW_ANNOUNCE(PCM_8BIT, "PCM 8 Bit Sound");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) ATARIHW_ANNOUNCE(CODEC, "CODEC Sound");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633) ATARIHW_ANNOUNCE(TT_SCSI, "SCSI Controller NCR5380 (TT style)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) ATARIHW_ANNOUNCE(ST_SCSI, "SCSI Controller NCR5380 (Falcon style)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) ATARIHW_ANNOUNCE(ACSI, "ACSI Interface");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) ATARIHW_ANNOUNCE(IDE, "IDE Interface");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) ATARIHW_ANNOUNCE(FDCSPEED, "8/16 Mhz Switch for FDC");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) ATARIHW_ANNOUNCE(ST_MFP, "Multi Function Peripheral MFP 68901");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) ATARIHW_ANNOUNCE(TT_MFP, "Second Multi Function Peripheral MFP 68901");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) ATARIHW_ANNOUNCE(SCC, "Serial Communications Controller SCC 8530");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) ATARIHW_ANNOUNCE(ST_ESCC, "Extended Serial Communications Controller SCC 85230");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) ATARIHW_ANNOUNCE(ANALOG_JOY, "Paddle Interface");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) ATARIHW_ANNOUNCE(MICROWIRE, "MICROWIRE(tm) Interface");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) ATARIHW_ANNOUNCE(STND_DMA, "DMA Controller (24 bit)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) ATARIHW_ANNOUNCE(EXTD_DMA, "DMA Controller (32 bit)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) ATARIHW_ANNOUNCE(SCSI_DMA, "DMA Controller for NCR5380");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) ATARIHW_ANNOUNCE(SCC_DMA, "DMA Controller for SCC");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) ATARIHW_ANNOUNCE(TT_CLK, "Clock Chip MC146818A");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) ATARIHW_ANNOUNCE(MSTE_CLK, "Clock Chip RP5C15");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650) ATARIHW_ANNOUNCE(SCU, "System Control Unit");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) ATARIHW_ANNOUNCE(BLITTER, "Blitter");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) ATARIHW_ANNOUNCE(VME, "VME Bus");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) ATARIHW_ANNOUNCE(DSP56K, "DSP56001 processor");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) * MSch: initial platform device support for Atari,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658) * required for EtherNAT/EtherNEC/NetUSBee drivers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) #if defined(CONFIG_ATARI_ETHERNAT) || defined(CONFIG_ATARI_ETHERNEC)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) static void isp1160_delay(struct device *dev, int delay)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) ndelay(delay);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) #ifdef CONFIG_ATARI_ETHERNAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) * EtherNAT: SMC91C111 Ethernet chipset, handled by smc91x driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) #define ATARI_ETHERNAT_IRQ 140
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) static struct resource smc91x_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) .name = "smc91x-regs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) .start = ATARI_ETHERNAT_PHYS_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) .end = ATARI_ETHERNAT_PHYS_ADDR + 0xfffff,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) .name = "smc91x-irq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) .start = ATARI_ETHERNAT_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685) .end = ATARI_ETHERNAT_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690) static struct platform_device smc91x_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) .name = "smc91x",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) .num_resources = ARRAY_SIZE(smc91x_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) .resource = smc91x_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) * ISP 1160 - using the isp116x-hcd module
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) #define ATARI_USB_PHYS_ADDR 0x80000012
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702) #define ATARI_USB_IRQ 139
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) static struct resource isp1160_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) .name = "isp1160-data",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) .start = ATARI_USB_PHYS_ADDR,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) .end = ATARI_USB_PHYS_ADDR + 0x1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) .name = "isp1160-regs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) .start = ATARI_USB_PHYS_ADDR + 0x4,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) .end = ATARI_USB_PHYS_ADDR + 0x5,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) [2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) .name = "isp1160-irq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) .start = ATARI_USB_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) .end = ATARI_USB_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) /* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) static struct isp116x_platform_data isp1160_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) /* Enable internal resistors on downstream ports */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) .sel15Kres = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) /* On-chip overcurrent protection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) .oc_enable = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) /* INT output polarity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) .int_act_high = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) /* INT edge or level triggered */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) .int_edge_triggered = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) /* WAKEUP pin connected - NOT SUPPORTED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) /* .remote_wakeup_connected = 0, */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) /* Wakeup by devices on usb bus enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) .remote_wakeup_enable = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) .delay = isp1160_delay,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) static struct platform_device isp1160_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) .name = "isp116x-hcd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) .id = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) .num_resources = ARRAY_SIZE(isp1160_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) .resource = isp1160_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) .platform_data = &isp1160_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) static struct platform_device *atari_ethernat_devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) &smc91x_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) &isp1160_device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) #endif /* CONFIG_ATARI_ETHERNAT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) #ifdef CONFIG_ATARI_ETHERNEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761) * EtherNEC: RTL8019 (NE2000 compatible) Ethernet chipset,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) * handled by ne.c driver
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) #define ATARI_ETHERNEC_PHYS_ADDR 0xfffa0000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) #define ATARI_ETHERNEC_BASE 0x300
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) #define ATARI_ETHERNEC_IRQ IRQ_MFP_TIMER1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) static struct resource rtl8019_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) .name = "rtl8019-regs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) .start = ATARI_ETHERNEC_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773) .end = ATARI_ETHERNEC_BASE + 0x20 - 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) .flags = IORESOURCE_IO,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777) .name = "rtl8019-irq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) .start = ATARI_ETHERNEC_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) .end = ATARI_ETHERNEC_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) static struct platform_device rtl8019_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) .name = "ne",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) .id = -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) .num_resources = ARRAY_SIZE(rtl8019_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) .resource = rtl8019_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792) * NetUSBee: ISP1160 USB host adapter via ROM-port adapter
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) #define ATARI_NETUSBEE_PHYS_ADDR 0xfffa8000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) #define ATARI_NETUSBEE_BASE 0x340
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) #define ATARI_NETUSBEE_IRQ IRQ_MFP_TIMER2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) static struct resource netusbee_resources[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) [0] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) .name = "isp1160-data",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) .start = ATARI_NETUSBEE_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) .end = ATARI_NETUSBEE_BASE + 0x1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806) [1] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807) .name = "isp1160-regs",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808) .start = ATARI_NETUSBEE_BASE + 0x20,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) .end = ATARI_NETUSBEE_BASE + 0x21,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) [2] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) .name = "isp1160-irq",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) .start = ATARI_NETUSBEE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) .end = ATARI_NETUSBEE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) /* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) static struct isp116x_platform_data netusbee_platform_data = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) /* Enable internal resistors on downstream ports */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) .sel15Kres = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824) /* On-chip overcurrent protection */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) .oc_enable = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826) /* INT output polarity */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) .int_act_high = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828) /* INT edge or level triggered */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) .int_edge_triggered = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) /* WAKEUP pin connected - NOT SUPPORTED */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) /* .remote_wakeup_connected = 0, */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) /* Wakeup by devices on usb bus enabled */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) .remote_wakeup_enable = 0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) .delay = isp1160_delay,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) static struct platform_device netusbee_device = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) .name = "isp116x-hcd",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) .id = 1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) .num_resources = ARRAY_SIZE(netusbee_resources),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) .resource = netusbee_resources,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843) .dev = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) .platform_data = &netusbee_platform_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848) static struct platform_device *atari_netusbee_devices[] __initdata = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) &rtl8019_device,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) &netusbee_device
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) #endif /* CONFIG_ATARI_ETHERNEC */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) #if IS_ENABLED(CONFIG_ATARI_SCSI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) static const struct resource atari_scsi_st_rsrc[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858) .start = IRQ_MFP_FSCSI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) .end = IRQ_MFP_FSCSI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) static const struct resource atari_scsi_tt_rsrc[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) .start = IRQ_TT_MFP_SCSI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) .end = IRQ_TT_MFP_SCSI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) * Falcon IDE interface
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) #define FALCON_IDE_BASE 0xfff00000
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) static const struct resource atari_falconide_rsrc[] __initconst = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) .flags = IORESOURCE_MEM,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881) .start = FALCON_IDE_BASE,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) .end = FALCON_IDE_BASE + 0x39,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885) .flags = IORESOURCE_IRQ,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886) .start = IRQ_MFP_FSCSI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) .end = IRQ_MFP_FSCSI,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) int __init atari_platform_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) struct platform_device *pdev;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) int rv = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) if (!MACH_IS_ATARI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) return -ENODEV;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) #ifdef CONFIG_ATARI_ETHERNAT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) unsigned char *enatc_virt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) enatc_virt = (unsigned char *)ioremap((ATARI_ETHERNAT_PHYS_ADDR+0x23), 0xf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903) if (hwreg_present(enatc_virt)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) rv = platform_add_devices(atari_ethernat_devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) ARRAY_SIZE(atari_ethernat_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) iounmap(enatc_virt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) #ifdef CONFIG_ATARI_ETHERNEC
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) int error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) unsigned char *enec_virt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) enec_virt = (unsigned char *)ioremap((ATARI_ETHERNEC_PHYS_ADDR), 0xf);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) if (hwreg_present(enec_virt)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) error = platform_add_devices(atari_netusbee_devices,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) ARRAY_SIZE(atari_netusbee_devices));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919) if (error && !rv)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) rv = error;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) iounmap(enec_virt);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) #if IS_ENABLED(CONFIG_ATARI_SCSI)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) if (ATARIHW_PRESENT(ST_SCSI))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) platform_device_register_simple("atari_scsi", -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) atari_scsi_st_rsrc, ARRAY_SIZE(atari_scsi_st_rsrc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) else if (ATARIHW_PRESENT(TT_SCSI))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931) platform_device_register_simple("atari_scsi", -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) atari_scsi_tt_rsrc, ARRAY_SIZE(atari_scsi_tt_rsrc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935) if (ATARIHW_PRESENT(IDE)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) pdev = platform_device_register_simple("atari-falcon-ide", -1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937) atari_falconide_rsrc, ARRAY_SIZE(atari_falconide_rsrc));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) if (IS_ERR(pdev))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) rv = PTR_ERR(pdev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) return rv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945) arch_initcall(atari_platform_init);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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