^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * License. See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * SGI UV Core Functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) 2008 Silicon Graphics, Inc. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #include <linux/acpi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #include <linux/efi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/percpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/uv/uv.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/uv/uv_mmrs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <asm/uv/uv_hub.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) bool ia64_is_uv;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) EXPORT_SYMBOL_GPL(ia64_is_uv);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) DEFINE_PER_CPU(struct uv_hub_info_s, __uv_hub_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) EXPORT_PER_CPU_SYMBOL_GPL(__uv_hub_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) struct redir_addr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) unsigned long redirect;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) unsigned long alias;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #define DEST_SHIFT UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR_DEST_BASE_SHFT
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) static __initdata struct redir_addr redir_addrs[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_0_MMR, UVH_SI_ALIAS0_OVERLAY_CONFIG},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_1_MMR, UVH_SI_ALIAS1_OVERLAY_CONFIG},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) {UVH_RH_GAM_ALIAS210_REDIRECT_CONFIG_2_MMR, UVH_SI_ALIAS2_OVERLAY_CONFIG},
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) static __init void get_lowmem_redirect(unsigned long *base, unsigned long *size)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) union uvh_si_alias0_overlay_config_u alias;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) union uvh_rh_gam_alias210_redirect_config_2_mmr_u redirect;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) for (i = 0; i < ARRAY_SIZE(redir_addrs); i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) alias.v = uv_read_local_mmr(redir_addrs[i].alias);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) if (alias.s.base == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) *size = (1UL << alias.s.m_alias);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) redirect.v = uv_read_local_mmr(redir_addrs[i].redirect);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) *base = (unsigned long)redirect.s.dest_base << DEST_SHIFT;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) BUG();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) void __init uv_probe_system_type(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) struct acpi_table_rsdp *rsdp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) struct acpi_table_xsdt *xsdt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) if (efi.acpi20 == EFI_INVALID_TABLE_ADDR) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) pr_err("ACPI 2.0 RSDP not found.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) rsdp = (struct acpi_table_rsdp *)__va(efi.acpi20);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) if (strncmp(rsdp->signature, ACPI_SIG_RSDP, sizeof(ACPI_SIG_RSDP) - 1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) pr_err("ACPI 2.0 RSDP signature incorrect.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) xsdt = (struct acpi_table_xsdt *)__va(rsdp->xsdt_physical_address);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) if (strncmp(xsdt->header.signature, ACPI_SIG_XSDT,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) sizeof(ACPI_SIG_XSDT) - 1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) pr_err("ACPI 2.0 XSDT signature incorrect.\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) if (!strcmp(xsdt->header.oem_id, "SGI") &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) !strcmp(xsdt->header.oem_table_id + 4, "UV"))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) ia64_is_uv = true;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) void __init uv_setup(char **cmdline_p)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) union uvh_si_addr_map_config_u m_n_config;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) union uvh_node_id_u node_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) unsigned long gnode_upper;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) int nid, cpu, m_val, n_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) unsigned long mmr_base, lowmem_redir_base, lowmem_redir_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) get_lowmem_redirect(&lowmem_redir_base, &lowmem_redir_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) node_id.v = uv_read_local_mmr(UVH_NODE_ID);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) m_n_config.v = uv_read_local_mmr(UVH_SI_ADDR_MAP_CONFIG);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) mmr_base = uv_read_local_mmr(UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) ~UV_MMR_ENABLE;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) m_val = m_n_config.s.m_skt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) n_val = m_n_config.s.n_skt;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) printk(KERN_DEBUG "UV: global MMR base 0x%lx\n", mmr_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) gnode_upper = (((unsigned long)node_id.s.node_id) &
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) ~((1 << n_val) - 1)) << m_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) for_each_present_cpu(cpu) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) nid = cpu_to_node(cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) uv_cpu_hub_info(cpu)->lowmem_remap_base = lowmem_redir_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) uv_cpu_hub_info(cpu)->lowmem_remap_top =
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) lowmem_redir_base + lowmem_redir_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) uv_cpu_hub_info(cpu)->m_val = m_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) uv_cpu_hub_info(cpu)->n_val = n_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) uv_cpu_hub_info(cpu)->pnode_mask = (1 << n_val) -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) uv_cpu_hub_info(cpu)->gpa_mask = (1 << (m_val + n_val)) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) uv_cpu_hub_info(cpu)->gnode_upper = gnode_upper;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) uv_cpu_hub_info(cpu)->global_mmr_base = mmr_base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) uv_cpu_hub_info(cpu)->coherency_domain_number = 0;/* ZZZ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) printk(KERN_DEBUG "UV cpu %d, nid %d\n", cpu, nid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120)