^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * palinfo.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Prints processor specific information reported by PAL.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * This code is based on specification of PAL as of the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Intel IA-64 Architecture Software Developer's Manual v1.0.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * Copyright (C) 2000-2001, 2003 Hewlett-Packard Co
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * Stephane Eranian <eranian@hpl.hp.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) * Copyright (C) 2004 Intel Corporation
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Ashok Raj <ashok.raj@intel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * 05/26/2000 S.Eranian initial release
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * 08/21/2000 S.Eranian updated to July 2000 PAL specs
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * 02/05/2001 S.Eranian fixed module support
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) * 10/23/2001 S.Eranian updated pal_perf_mon_info bug fixes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) * 03/24/2004 Ashok Raj updated to work with CPU Hotplug
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) * 10/26/2006 Russ Anderson updated processor features to rev 2.2 spec
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/errno.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/init.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/proc_fs.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) #include <linux/seq_file.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #include <linux/efi.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) #include <linux/notifier.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) #include <linux/cpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #include <linux/cpumask.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #include <asm/pal.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) #include <asm/sal.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) #include <asm/page.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <asm/processor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <linux/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) MODULE_AUTHOR("Stephane Eranian <eranian@hpl.hp.com>");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) MODULE_DESCRIPTION("/proc interface to IA-64 PAL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) MODULE_LICENSE("GPL");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) #define PALINFO_VERSION "0.5"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) typedef int (*palinfo_func_t)(struct seq_file *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) typedef struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) const char *name; /* name of the proc entry */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) palinfo_func_t proc_read; /* function to call for reading */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) struct proc_dir_entry *entry; /* registered entry (removal) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) } palinfo_entry_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) * A bunch of string array to get pretty printing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) static const char *cache_types[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) "", /* not used */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) "Instruction",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) "Data",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) "Data/Instruction" /* unified */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) static const char *cache_mattrib[]={
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) "WriteThrough",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) "WriteBack",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) "", /* reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) "" /* reserved */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) static const char *cache_st_hints[]={
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) "Temporal, level 1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) "Reserved",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) "Reserved",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) "Non-temporal, all levels",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) "Reserved",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) "Reserved",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) "Reserved",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) "Reserved"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) static const char *cache_ld_hints[]={
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) "Temporal, level 1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) "Non-temporal, level 1",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) "Reserved",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) "Non-temporal, all levels",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) "Reserved",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) "Reserved",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) "Reserved",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) "Reserved"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) static const char *rse_hints[]={
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) "enforced lazy",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) "eager stores",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) "eager loads",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) "eager loads and stores"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define RSE_HINTS_COUNT ARRAY_SIZE(rse_hints)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) static const char *mem_attrib[]={
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) "WB", /* 000 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) "SW", /* 001 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) "010", /* 010 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) "011", /* 011 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) "UC", /* 100 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) "UCE", /* 101 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) "WC", /* 110 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) "NaTPage" /* 111 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) * Take a 64bit vector and produces a string such that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) * if bit n is set then 2^n in clear text is generated. The adjustment
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) * to the right unit is also done.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) * Input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) * - a pointer to a buffer to hold the string
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) * - a 64-bit vector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) * Ouput:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) * - a pointer to the end of the buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) static void bitvector_process(struct seq_file *m, u64 vector)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) int i,j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) static const char *units[]={ "", "K", "M", "G", "T" };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) for (i=0, j=0; i < 64; i++ , j=i/10) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) if (vector & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) seq_printf(m, "%d%s ", 1 << (i-j*10), units[j]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) vector >>= 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) * Take a 64bit vector and produces a string such that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) * if bit n is set then register n is present. The function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) * takes into account consecutive registers and prints out ranges.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) * Input:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) * - a pointer to a buffer to hold the string
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) * - a 64-bit vector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) * Ouput:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) * - a pointer to the end of the buffer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) static void bitregister_process(struct seq_file *m, u64 *reg_info, int max)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) int i, begin, skip = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) u64 value = reg_info[0];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) value >>= i = begin = ffs(value) - 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) for(; i < max; i++ ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) if (i != 0 && (i%64) == 0) value = *++reg_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) if ((value & 0x1) == 0 && skip == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) if (begin <= i - 2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) seq_printf(m, "%d-%d ", begin, i-1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) seq_printf(m, "%d ", i-1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) skip = 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) begin = -1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) } else if ((value & 0x1) && skip == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) skip = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) begin = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) value >>=1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) if (begin > -1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) if (begin < 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) seq_printf(m, "%d-127", begin);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) seq_puts(m, "127");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) static int power_info(struct seq_file *m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) s64 status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) u64 halt_info_buffer[8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) pal_power_mgmt_info_u_t *halt_info =(pal_power_mgmt_info_u_t *)halt_info_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) status = ia64_pal_halt_info(halt_info);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) if (status != 0) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) for (i=0; i < 8 ; i++ ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) if (halt_info[i].pal_power_mgmt_info_s.im == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195) seq_printf(m,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) "Power level %d:\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) "\tentry_latency : %d cycles\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) "\texit_latency : %d cycles\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199) "\tpower consumption : %d mW\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200) "\tCache+TLB coherency : %s\n", i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) halt_info[i].pal_power_mgmt_info_s.entry_latency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) halt_info[i].pal_power_mgmt_info_s.exit_latency,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) halt_info[i].pal_power_mgmt_info_s.power_consumption,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) halt_info[i].pal_power_mgmt_info_s.co ? "Yes" : "No");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) seq_printf(m,"Power level %d: not implemented\n", i);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) static int cache_info(struct seq_file *m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) unsigned long i, levels, unique_caches;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) pal_cache_config_info_t cci;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) int j, k;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) long status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219) if ((status = ia64_pal_cache_summary(&levels, &unique_caches)) != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220) printk(KERN_ERR "ia64_pal_cache_summary=%ld\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) seq_printf(m, "Cache levels : %ld\nUnique caches : %ld\n\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) levels, unique_caches);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227) for (i=0; i < levels; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) for (j=2; j >0 ; j--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) /* even without unification some level may not be present */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) if ((status=ia64_pal_cache_config_info(i,j, &cci)) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) seq_printf(m,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 234) "%s Cache level %lu:\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 235) "\tSize : %u bytes\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 236) "\tAttributes : ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 237) cache_types[j+cci.pcci_unified], i+1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 238) cci.pcci_cache_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 239)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 240) if (cci.pcci_unified)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 241) seq_puts(m, "Unified ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 242)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 243) seq_printf(m, "%s\n", cache_mattrib[cci.pcci_cache_attr]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 244)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 245) seq_printf(m,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 246) "\tAssociativity : %d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 247) "\tLine size : %d bytes\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 248) "\tStride : %d bytes\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 249) cci.pcci_assoc,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 250) 1<<cci.pcci_line_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 251) 1<<cci.pcci_stride);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 252) if (j == 1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 253) seq_puts(m, "\tStore latency : N/A\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 254) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 255) seq_printf(m, "\tStore latency : %d cycle(s)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 256) cci.pcci_st_latency);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 257)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 258) seq_printf(m,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 259) "\tLoad latency : %d cycle(s)\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 260) "\tStore hints : ", cci.pcci_ld_latency);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 261)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 262) for(k=0; k < 8; k++ ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 263) if ( cci.pcci_st_hints & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 264) seq_printf(m, "[%s]", cache_st_hints[k]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 265) cci.pcci_st_hints >>=1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 266) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 267) seq_puts(m, "\n\tLoad hints : ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 268)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 269) for(k=0; k < 8; k++ ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 270) if (cci.pcci_ld_hints & 0x1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 271) seq_printf(m, "[%s]", cache_ld_hints[k]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 272) cci.pcci_ld_hints >>=1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 273) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 274) seq_printf(m,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 275) "\n\tAlias boundary : %d byte(s)\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 276) "\tTag LSB : %d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 277) "\tTag MSB : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 278) 1<<cci.pcci_alias_boundary, cci.pcci_tag_lsb,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 279) cci.pcci_tag_msb);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 280)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 281) /* when unified, data(j=2) is enough */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 282) if (cci.pcci_unified)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 283) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 284) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 285) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 286) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 287) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 288)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 289)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 290) static int vm_info(struct seq_file *m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 291) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 292) u64 tr_pages =0, vw_pages=0, tc_pages;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 293) u64 attrib;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 294) pal_vm_info_1_u_t vm_info_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 295) pal_vm_info_2_u_t vm_info_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 296) pal_tc_info_u_t tc_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 297) ia64_ptce_info_t ptce;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 298) const char *sep;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 299) int i, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 300) long status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 301)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 302) if ((status = ia64_pal_vm_summary(&vm_info_1, &vm_info_2)) !=0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 303) printk(KERN_ERR "ia64_pal_vm_summary=%ld\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 304) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 305)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 306) seq_printf(m,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 307) "Physical Address Space : %d bits\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 308) "Virtual Address Space : %d bits\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 309) "Protection Key Registers(PKR) : %d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 310) "Implemented bits in PKR.key : %d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 311) "Hash Tag ID : 0x%x\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 312) "Size of RR.rid : %d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 313) "Max Purges : ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 314) vm_info_1.pal_vm_info_1_s.phys_add_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 315) vm_info_2.pal_vm_info_2_s.impl_va_msb+1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 316) vm_info_1.pal_vm_info_1_s.max_pkr+1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 317) vm_info_1.pal_vm_info_1_s.key_size,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 318) vm_info_1.pal_vm_info_1_s.hash_tag_id,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 319) vm_info_2.pal_vm_info_2_s.rid_size);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 320) if (vm_info_2.pal_vm_info_2_s.max_purges == PAL_MAX_PURGES)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 321) seq_puts(m, "unlimited\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 322) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 323) seq_printf(m, "%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 324) vm_info_2.pal_vm_info_2_s.max_purges ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 325) vm_info_2.pal_vm_info_2_s.max_purges : 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 326) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 327)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 328) if (ia64_pal_mem_attrib(&attrib) == 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 329) seq_puts(m, "Supported memory attributes : ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 330) sep = "";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 331) for (i = 0; i < 8; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 332) if (attrib & (1 << i)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 333) seq_printf(m, "%s%s", sep, mem_attrib[i]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 334) sep = ", ";
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 335) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 336) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 337) seq_putc(m, '\n');
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 338) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 339)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 340) if ((status = ia64_pal_vm_page_size(&tr_pages, &vw_pages)) !=0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 341) printk(KERN_ERR "ia64_pal_vm_page_size=%ld\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 342) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 343)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 344) seq_printf(m,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 345) "\nTLB walker : %simplemented\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 346) "Number of DTR : %d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 347) "Number of ITR : %d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 348) "TLB insertable page sizes : ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 349) vm_info_1.pal_vm_info_1_s.vw ? "" : "not ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 350) vm_info_1.pal_vm_info_1_s.max_dtr_entry+1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 351) vm_info_1.pal_vm_info_1_s.max_itr_entry+1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 352)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 353) bitvector_process(m, tr_pages);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 354)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 355) seq_puts(m, "\nTLB purgeable page sizes : ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 356)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 357) bitvector_process(m, vw_pages);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 358) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 359)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 360) if ((status = ia64_get_ptce(&ptce)) != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 361) printk(KERN_ERR "ia64_get_ptce=%ld\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 362) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 363) seq_printf(m,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 364) "\nPurge base address : 0x%016lx\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 365) "Purge outer loop count : %d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 366) "Purge inner loop count : %d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 367) "Purge outer loop stride : %d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 368) "Purge inner loop stride : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 369) ptce.base, ptce.count[0], ptce.count[1],
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 370) ptce.stride[0], ptce.stride[1]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 371)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 372) seq_printf(m,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 373) "TC Levels : %d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 374) "Unique TC(s) : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 375) vm_info_1.pal_vm_info_1_s.num_tc_levels,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 376) vm_info_1.pal_vm_info_1_s.max_unique_tcs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 377)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 378) for(i=0; i < vm_info_1.pal_vm_info_1_s.num_tc_levels; i++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 379) for (j=2; j>0 ; j--) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 380) tc_pages = 0; /* just in case */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 381)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 382) /* even without unification, some levels may not be present */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 383) if ((status=ia64_pal_vm_info(i,j, &tc_info, &tc_pages)) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 384) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 385)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 386) seq_printf(m,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 387) "\n%s Translation Cache Level %d:\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 388) "\tHash sets : %d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 389) "\tAssociativity : %d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 390) "\tNumber of entries : %d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 391) "\tFlags : ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 392) cache_types[j+tc_info.tc_unified], i+1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 393) tc_info.tc_num_sets,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 394) tc_info.tc_associativity,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 395) tc_info.tc_num_entries);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 396)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 397) if (tc_info.tc_pf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 398) seq_puts(m, "PreferredPageSizeOptimized ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 399) if (tc_info.tc_unified)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 400) seq_puts(m, "Unified ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 401) if (tc_info.tc_reduce_tr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 402) seq_puts(m, "TCReduction");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 403)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 404) seq_puts(m, "\n\tSupported page sizes: ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 405)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 406) bitvector_process(m, tc_pages);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 407)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 408) /* when unified date (j=2) is enough */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 409) if (tc_info.tc_unified)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 410) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 411) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 412) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 413) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 414)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 415) seq_putc(m, '\n');
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 416) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 417) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 418)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 419)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 420) static int register_info(struct seq_file *m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 421) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 422) u64 reg_info[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 423) u64 info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 424) unsigned long phys_stacked;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 425) pal_hints_u_t hints;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 426) unsigned long iregs, dregs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 427) static const char * const info_type[] = {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 428) "Implemented AR(s)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 429) "AR(s) with read side-effects",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 430) "Implemented CR(s)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 431) "CR(s) with read side-effects",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 432) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 433)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 434) for(info=0; info < 4; info++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 435) if (ia64_pal_register_info(info, ®_info[0], ®_info[1]) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 436) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 437) seq_printf(m, "%-32s : ", info_type[info]);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 438) bitregister_process(m, reg_info, 128);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 439) seq_putc(m, '\n');
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 440) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 441)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 442) if (ia64_pal_rse_info(&phys_stacked, &hints) == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 443) seq_printf(m,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 444) "RSE stacked physical registers : %ld\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 445) "RSE load/store hints : %ld (%s)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 446) phys_stacked, hints.ph_data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 447) hints.ph_data < RSE_HINTS_COUNT ? rse_hints[hints.ph_data]: "(??)");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 448)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 449) if (ia64_pal_debug_info(&iregs, &dregs))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 450) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 451)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 452) seq_printf(m,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 453) "Instruction debug register pairs : %ld\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 454) "Data debug register pairs : %ld\n", iregs, dregs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 455)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 456) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 457) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 458)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 459) static const char *const proc_features_0[]={ /* Feature set 0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 460) NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 461) NULL,NULL,NULL,NULL,NULL,NULL,NULL, NULL,NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 462) NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 463) NULL,NULL,NULL,NULL,NULL, NULL,NULL,NULL,NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 464) "Unimplemented instruction address fault",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 465) "INIT, PMI, and LINT pins",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 466) "Simple unimplemented instr addresses",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 467) "Variable P-state performance",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 468) "Virtual machine features implemented",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 469) "XIP,XPSR,XFS implemented",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 470) "XR1-XR3 implemented",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 471) "Disable dynamic predicate prediction",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 472) "Disable processor physical number",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 473) "Disable dynamic data cache prefetch",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 474) "Disable dynamic inst cache prefetch",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 475) "Disable dynamic branch prediction",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 476) NULL, NULL, NULL, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 477) "Disable P-states",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 478) "Enable MCA on Data Poisoning",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 479) "Enable vmsw instruction",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 480) "Enable extern environmental notification",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 481) "Disable BINIT on processor time-out",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 482) "Disable dynamic power management (DPM)",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 483) "Disable coherency",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 484) "Disable cache",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 485) "Enable CMCI promotion",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 486) "Enable MCA to BINIT promotion",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 487) "Enable MCA promotion",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 488) "Enable BERR promotion"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 489) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 490)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 491) static const char *const proc_features_16[]={ /* Feature set 16 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 492) "Disable ETM",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 493) "Enable ETM",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 494) "Enable MCA on half-way timer",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 495) "Enable snoop WC",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 496) NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 497) "Enable Fast Deferral",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 498) "Disable MCA on memory aliasing",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 499) "Enable RSB",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 500) NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 501) "DP system processor",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 502) "Low Voltage",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 503) "HT supported",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 504) NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 505) NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 506) NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 507) NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 508) NULL, NULL, NULL, NULL, NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 509) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 510)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 511) static const char *const *const proc_features[]={
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 512) proc_features_0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 513) NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 514) NULL, NULL, NULL, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 515) proc_features_16,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 516) NULL, NULL, NULL, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 517) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 518)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 519) static void feature_set_info(struct seq_file *m, u64 avail, u64 status, u64 control,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 520) unsigned long set)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 521) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 522) const char *const *vf, *const *v;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 523) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 524)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 525) vf = v = proc_features[set];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 526) for(i=0; i < 64; i++, avail >>=1, status >>=1, control >>=1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 527)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 528) if (!(control)) /* No remaining bits set */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 529) break;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 530) if (!(avail & 0x1)) /* Print only bits that are available */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 531) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 532) if (vf)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 533) v = vf + i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 534) if ( v && *v ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 535) seq_printf(m, "%-40s : %s %s\n", *v,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 536) avail & 0x1 ? (status & 0x1 ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 537) "On " : "Off"): "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 538) avail & 0x1 ? (control & 0x1 ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 539) "Ctrl" : "NoCtrl"): "");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 540) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 541) seq_printf(m, "Feature set %2ld bit %2d\t\t\t"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 542) " : %s %s\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 543) set, i,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 544) avail & 0x1 ? (status & 0x1 ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 545) "On " : "Off"): "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 546) avail & 0x1 ? (control & 0x1 ?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 547) "Ctrl" : "NoCtrl"): "");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 548) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 549) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 550) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 551)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 552) static int processor_info(struct seq_file *m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 553) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 554) u64 avail=1, status=1, control=1, feature_set=0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 555) s64 ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 556)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 557) do {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 558) ret = ia64_pal_proc_get_features(&avail, &status, &control,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 559) feature_set);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 560) if (ret < 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 561) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 562)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 563) if (ret == 1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 564) feature_set++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 565) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 566) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 567)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 568) feature_set_info(m, avail, status, control, feature_set);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 569) feature_set++;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 570) } while(1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 571)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 572) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 573) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 574)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 575) static const char *const bus_features[]={
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 576) NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 577) NULL,NULL,NULL,NULL,NULL,NULL,NULL, NULL,NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 578) NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 579) NULL,NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 580) "Request Bus Parking",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 581) "Bus Lock Mask",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 582) "Enable Half Transfer",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 583) NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 584) NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 585) NULL, NULL, NULL, NULL,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 586) "Enable Cache Line Repl. Shared",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 587) "Enable Cache Line Repl. Exclusive",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 588) "Disable Transaction Queuing",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 589) "Disable Response Error Checking",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 590) "Disable Bus Error Checking",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 591) "Disable Bus Requester Internal Error Signalling",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 592) "Disable Bus Requester Error Signalling",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 593) "Disable Bus Initialization Event Checking",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 594) "Disable Bus Initialization Event Signalling",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 595) "Disable Bus Address Error Checking",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 596) "Disable Bus Address Error Signalling",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 597) "Disable Bus Data Error Checking"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 598) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 599)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 600)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 601) static int bus_info(struct seq_file *m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 602) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 603) const char *const *v = bus_features;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 604) pal_bus_features_u_t av, st, ct;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 605) u64 avail, status, control;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 606) int i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 607) s64 ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 608)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 609) if ((ret=ia64_pal_bus_get_features(&av, &st, &ct)) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 610) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 611)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 612) avail = av.pal_bus_features_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 613) status = st.pal_bus_features_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 614) control = ct.pal_bus_features_val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 615)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 616) for(i=0; i < 64; i++, v++, avail >>=1, status >>=1, control >>=1) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 617) if ( ! *v )
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 618) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 619) seq_printf(m, "%-48s : %s%s %s\n", *v,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 620) avail & 0x1 ? "" : "NotImpl",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 621) avail & 0x1 ? (status & 0x1 ? "On" : "Off"): "",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 622) avail & 0x1 ? (control & 0x1 ? "Ctrl" : "NoCtrl"): "");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 623) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 624) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 625) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 626)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 627) static int version_info(struct seq_file *m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 628) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 629) pal_version_u_t min_ver, cur_ver;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 630)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 631) if (ia64_pal_version(&min_ver, &cur_ver) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 632) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 633)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 634) seq_printf(m,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 635) "PAL_vendor : 0x%02x (min=0x%02x)\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 636) "PAL_A : %02x.%02x (min=%02x.%02x)\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 637) "PAL_B : %02x.%02x (min=%02x.%02x)\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 638) cur_ver.pal_version_s.pv_pal_vendor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 639) min_ver.pal_version_s.pv_pal_vendor,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 640) cur_ver.pal_version_s.pv_pal_a_model,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 641) cur_ver.pal_version_s.pv_pal_a_rev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 642) min_ver.pal_version_s.pv_pal_a_model,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 643) min_ver.pal_version_s.pv_pal_a_rev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 644) cur_ver.pal_version_s.pv_pal_b_model,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 645) cur_ver.pal_version_s.pv_pal_b_rev,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 646) min_ver.pal_version_s.pv_pal_b_model,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 647) min_ver.pal_version_s.pv_pal_b_rev);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 648) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 649) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 650)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 651) static int perfmon_info(struct seq_file *m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 652) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 653) u64 pm_buffer[16];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 654) pal_perf_mon_info_u_t pm_info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 655)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 656) if (ia64_pal_perf_mon_info(pm_buffer, &pm_info) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 657) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 658)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 659) seq_printf(m,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 660) "PMC/PMD pairs : %d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 661) "Counter width : %d bits\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 662) "Cycle event number : %d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 663) "Retired event number : %d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 664) "Implemented PMC : ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 665) pm_info.pal_perf_mon_info_s.generic,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 666) pm_info.pal_perf_mon_info_s.width,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 667) pm_info.pal_perf_mon_info_s.cycles,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 668) pm_info.pal_perf_mon_info_s.retired);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 669)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 670) bitregister_process(m, pm_buffer, 256);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 671) seq_puts(m, "\nImplemented PMD : ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 672) bitregister_process(m, pm_buffer+4, 256);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 673) seq_puts(m, "\nCycles count capable : ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 674) bitregister_process(m, pm_buffer+8, 256);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 675) seq_puts(m, "\nRetired bundles count capable : ");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 676)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 677) #ifdef CONFIG_ITANIUM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 678) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 679) * PAL_PERF_MON_INFO reports that only PMC4 can be used to count CPU_CYCLES
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 680) * which is wrong, both PMC4 and PMD5 support it.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 681) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 682) if (pm_buffer[12] == 0x10)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 683) pm_buffer[12]=0x30;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 684) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 685)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 686) bitregister_process(m, pm_buffer+12, 256);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 687) seq_putc(m, '\n');
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 688) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 689) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 690)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 691) static int frequency_info(struct seq_file *m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 692) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 693) struct pal_freq_ratio proc, itc, bus;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 694) unsigned long base;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 695)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 696) if (ia64_pal_freq_base(&base) == -1)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 697) seq_puts(m, "Output clock : not implemented\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 698) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 699) seq_printf(m, "Output clock : %ld ticks/s\n", base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 700)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 701) if (ia64_pal_freq_ratios(&proc, &bus, &itc) != 0) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 702)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 703) seq_printf(m,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 704) "Processor/Clock ratio : %d/%d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 705) "Bus/Clock ratio : %d/%d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 706) "ITC/Clock ratio : %d/%d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 707) proc.num, proc.den, bus.num, bus.den, itc.num, itc.den);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 708) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 709) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 710)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 711) static int tr_info(struct seq_file *m)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 712) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 713) long status;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 714) pal_tr_valid_u_t tr_valid;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 715) u64 tr_buffer[4];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 716) pal_vm_info_1_u_t vm_info_1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 717) pal_vm_info_2_u_t vm_info_2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 718) unsigned long i, j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 719) unsigned long max[3], pgm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 720) struct ifa_reg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 721) unsigned long valid:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 722) unsigned long ig:11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 723) unsigned long vpn:52;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 724) } *ifa_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 725) struct itir_reg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 726) unsigned long rv1:2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 727) unsigned long ps:6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 728) unsigned long key:24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 729) unsigned long rv2:32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 730) } *itir_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 731) struct gr_reg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 732) unsigned long p:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 733) unsigned long rv1:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 734) unsigned long ma:3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 735) unsigned long a:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 736) unsigned long d:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 737) unsigned long pl:2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 738) unsigned long ar:3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 739) unsigned long ppn:38;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 740) unsigned long rv2:2;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 741) unsigned long ed:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 742) unsigned long ig:11;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 743) } *gr_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 744) struct rid_reg {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 745) unsigned long ig1:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 746) unsigned long rv1:1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 747) unsigned long ig2:6;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 748) unsigned long rid:24;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 749) unsigned long rv2:32;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 750) } *rid_reg;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 751)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 752) if ((status = ia64_pal_vm_summary(&vm_info_1, &vm_info_2)) !=0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 753) printk(KERN_ERR "ia64_pal_vm_summary=%ld\n", status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 754) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 755) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 756) max[0] = vm_info_1.pal_vm_info_1_s.max_itr_entry+1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 757) max[1] = vm_info_1.pal_vm_info_1_s.max_dtr_entry+1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 758)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 759) for (i=0; i < 2; i++ ) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 760) for (j=0; j < max[i]; j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 761)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 762) status = ia64_pal_tr_read(j, i, tr_buffer, &tr_valid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 763) if (status != 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 764) printk(KERN_ERR "palinfo: pal call failed on tr[%lu:%lu]=%ld\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 765) i, j, status);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 766) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 767) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 768)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 769) ifa_reg = (struct ifa_reg *)&tr_buffer[2];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 770)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 771) if (ifa_reg->valid == 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 772) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 773)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 774) gr_reg = (struct gr_reg *)tr_buffer;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 775) itir_reg = (struct itir_reg *)&tr_buffer[1];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 776) rid_reg = (struct rid_reg *)&tr_buffer[3];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 777)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 778) pgm = -1 << (itir_reg->ps - 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 779) seq_printf(m,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 780) "%cTR%lu: av=%d pv=%d dv=%d mv=%d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 781) "\tppn : 0x%lx\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 782) "\tvpn : 0x%lx\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 783) "\tps : ",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 784) "ID"[i], j,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 785) tr_valid.pal_tr_valid_s.access_rights_valid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 786) tr_valid.pal_tr_valid_s.priv_level_valid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 787) tr_valid.pal_tr_valid_s.dirty_bit_valid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 788) tr_valid.pal_tr_valid_s.mem_attr_valid,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 789) (gr_reg->ppn & pgm)<< 12, (ifa_reg->vpn & pgm)<< 12);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 790)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 791) bitvector_process(m, 1<< itir_reg->ps);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 792)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 793) seq_printf(m,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 794) "\n\tpl : %d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 795) "\tar : %d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 796) "\trid : %x\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 797) "\tp : %d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 798) "\tma : %d\n"
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 799) "\td : %d\n",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 800) gr_reg->pl, gr_reg->ar, rid_reg->rid, gr_reg->p, gr_reg->ma,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 801) gr_reg->d);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 802) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 803) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 804) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 805) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 806)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 807)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 808)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 809) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 810) * List {name,function} pairs for every entry in /proc/palinfo/cpu*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 811) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 812) static const palinfo_entry_t palinfo_entries[]={
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 813) { "version_info", version_info, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 814) { "vm_info", vm_info, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 815) { "cache_info", cache_info, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 816) { "power_info", power_info, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 817) { "register_info", register_info, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 818) { "processor_info", processor_info, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 819) { "perfmon_info", perfmon_info, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 820) { "frequency_info", frequency_info, },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 821) { "bus_info", bus_info },
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 822) { "tr_info", tr_info, }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 823) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 824)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 825) #define NR_PALINFO_ENTRIES (int) ARRAY_SIZE(palinfo_entries)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 826)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 827) static struct proc_dir_entry *palinfo_dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 828)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 829) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 830) * This data structure is used to pass which cpu,function is being requested
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 831) * It must fit in a 64bit quantity to be passed to the proc callback routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 832) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 833) * In SMP mode, when we get a request for another CPU, we must call that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 834) * other CPU using IPI and wait for the result before returning.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 835) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 836) typedef union {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 837) u64 value;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 838) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 839) unsigned req_cpu: 32; /* for which CPU this info is */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 840) unsigned func_id: 32; /* which function is requested */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 841) } pal_func_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 842) } pal_func_cpu_u_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 843)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 844) #define req_cpu pal_func_cpu.req_cpu
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 845) #define func_id pal_func_cpu.func_id
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 846)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 847) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 848)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 849) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 850) * used to hold information about final function to call
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 851) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 852) typedef struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 853) palinfo_func_t func; /* pointer to function to call */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 854) struct seq_file *m; /* buffer to store results */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 855) int ret; /* return value from call */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 856) } palinfo_smp_data_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 857)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 858)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 859) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 860) * this function does the actual final call and he called
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 861) * from the smp code, i.e., this is the palinfo callback routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 862) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 863) static void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 864) palinfo_smp_call(void *info)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 865) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 866) palinfo_smp_data_t *data = (palinfo_smp_data_t *)info;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 867) data->ret = (*data->func)(data->m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 868) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 869)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 870) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 871) * function called to trigger the IPI, we need to access a remote CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 872) * Return:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 873) * 0 : error or nothing to output
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 874) * otherwise how many bytes in the "page" buffer were written
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 875) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 876) static
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 877) int palinfo_handle_smp(struct seq_file *m, pal_func_cpu_u_t *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 878) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 879) palinfo_smp_data_t ptr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 880) int ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 881)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 882) ptr.func = palinfo_entries[f->func_id].proc_read;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 883) ptr.m = m;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 884) ptr.ret = 0; /* just in case */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 885)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 886)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 887) /* will send IPI to other CPU and wait for completion of remote call */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 888) if ((ret=smp_call_function_single(f->req_cpu, palinfo_smp_call, &ptr, 1))) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 889) printk(KERN_ERR "palinfo: remote CPU call from %d to %d on function %d: "
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 890) "error %d\n", smp_processor_id(), f->req_cpu, f->func_id, ret);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 891) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 892) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 893) return ptr.ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 894) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 895) #else /* ! CONFIG_SMP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 896) static
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 897) int palinfo_handle_smp(struct seq_file *m, pal_func_cpu_u_t *f)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 898) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 899) printk(KERN_ERR "palinfo: should not be called with non SMP kernel\n");
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 900) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 901) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 902) #endif /* CONFIG_SMP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 903)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 904) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 905) * Entry point routine: all calls go through this function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 906) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 907) static int proc_palinfo_show(struct seq_file *m, void *v)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 908) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 909) pal_func_cpu_u_t *f = (pal_func_cpu_u_t *)&m->private;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 910)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 911) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 912) * in SMP mode, we may need to call another CPU to get correct
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 913) * information. PAL, by definition, is processor specific
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 914) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 915) if (f->req_cpu == get_cpu())
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 916) (*palinfo_entries[f->func_id].proc_read)(m);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 917) else
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 918) palinfo_handle_smp(m, f);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 919)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 920) put_cpu();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 921) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 922) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 923)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 924) static int palinfo_add_proc(unsigned int cpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 925) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 926) pal_func_cpu_u_t f;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 927) struct proc_dir_entry *cpu_dir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 928) int j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 929) char cpustr[3+4+1]; /* cpu numbers are up to 4095 on itanic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 930) sprintf(cpustr, "cpu%d", cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 931)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 932) cpu_dir = proc_mkdir(cpustr, palinfo_dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 933) if (!cpu_dir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 934) return -EINVAL;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 935)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 936) f.req_cpu = cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 937)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 938) for (j=0; j < NR_PALINFO_ENTRIES; j++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 939) f.func_id = j;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 940) proc_create_single_data(palinfo_entries[j].name, 0, cpu_dir,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 941) proc_palinfo_show, (void *)f.value);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 942) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 943) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 944) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 945)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 946) static int palinfo_del_proc(unsigned int hcpu)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 947) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 948) char cpustr[3+4+1]; /* cpu numbers are up to 4095 on itanic */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 949)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 950) sprintf(cpustr, "cpu%d", hcpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 951) remove_proc_subtree(cpustr, palinfo_dir);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 952) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 953) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 954)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 955) static enum cpuhp_state hp_online;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 956)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 957) static int __init palinfo_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 958) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 959) int i = 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 960)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 961) printk(KERN_INFO "PAL Information Facility v%s\n", PALINFO_VERSION);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 962) palinfo_dir = proc_mkdir("pal", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 963) if (!palinfo_dir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 964) return -ENOMEM;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 965)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 966) i = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "ia64/palinfo:online",
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 967) palinfo_add_proc, palinfo_del_proc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 968) if (i < 0) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 969) remove_proc_subtree("pal", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 970) return i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 971) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 972) hp_online = i;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 973) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 974) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 975)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 976) static void __exit palinfo_exit(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 977) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 978) cpuhp_remove_state(hp_online);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 979) remove_proc_subtree("pal", NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 980) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 981)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 982) module_init(palinfo_init);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 983) module_exit(palinfo_exit);
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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