^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) // SPDX-License-Identifier: GPL-2.0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * linux/arch/ia64/kernel/irq.c
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) * Copyright (C) 1992, 1998 Linus Torvalds, Ingo Molnar
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * This file contains the code used by various IRQ handling routines:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * asking for different IRQs should be done through these routines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * instead of just grabbing them. Thus setups with different IRQ numbers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) * shouldn't result in any weird surprises, and installing new handlers
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) * should be easier.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) * Copyright (C) Ashok Raj<ashok.raj@intel.com>, Intel Corporation 2004
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) * 4/14/2004: Added code to handle cpu migration and do safe irq
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) * migration without losing interrupts for iosapic
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) * architecture.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/delay.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/uaccess.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <linux/module.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <linux/seq_file.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #include <linux/kernel_stat.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) #include <asm/mca.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) #include <asm/xtp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) * 'what should we do if we get a hw irq event on an illegal vector'.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) * each architecture has to answer this themselves.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) void ack_bad_irq(unsigned int irq)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) printk(KERN_ERR "Unexpected irq vector 0x%x on CPU %u!\n", irq, smp_processor_id());
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) * Interrupt statistics:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) atomic_t irq_err_count;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) * /proc/interrupts printing:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) int arch_show_interrupts(struct seq_file *p, int prec)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) seq_printf(p, "ERR: %10u\n", atomic_read(&irq_err_count));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) #ifdef CONFIG_SMP
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) static char irq_redir [NR_IRQS]; // = { [0 ... NR_IRQS-1] = 1 };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) void set_irq_affinity_info (unsigned int irq, int hwid, int redir)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) if (irq < NR_IRQS) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) cpumask_copy(irq_get_affinity_mask(irq),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) cpumask_of(cpu_logical_id(hwid)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) irq_redir[irq] = (char) (redir & 0xff);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) #endif /* CONFIG_SMP */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) int __init arch_early_irq_init(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) ia64_mca_irq_init();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) return 0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) #ifdef CONFIG_HOTPLUG_CPU
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) unsigned int vectors_in_migration[NR_IRQS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) * Since cpu_online_mask is already updated, we just need to check for
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) * affinity that has zeros
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) static void migrate_irqs(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) int irq, new_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) for (irq=0; irq < NR_IRQS; irq++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) struct irq_desc *desc = irq_to_desc(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) struct irq_data *data = irq_desc_get_irq_data(desc);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) struct irq_chip *chip = irq_data_get_irq_chip(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) if (irqd_irq_disabled(data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) * No handling for now.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) * TBD: Implement a disable function so we can now
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * tell CPU not to respond to these local intr sources.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * such as ITV,CPEI,MCA etc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) if (irqd_is_per_cpu(data))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) continue;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) if (cpumask_any_and(irq_data_get_affinity_mask(data),
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) cpu_online_mask) >= nr_cpu_ids) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) * Save it for phase 2 processing
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) vectors_in_migration[irq] = irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) new_cpu = cpumask_any(cpu_online_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) * Al three are essential, currently WARN_ON.. maybe panic?
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) if (chip && chip->irq_disable &&
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) chip->irq_enable && chip->irq_set_affinity) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) chip->irq_disable(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) chip->irq_set_affinity(data,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) cpumask_of(new_cpu), false);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) chip->irq_enable(data);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) } else {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) WARN_ON((!chip || !chip->irq_disable ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) !chip->irq_enable ||
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) !chip->irq_set_affinity));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) void fixup_irqs(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) unsigned int irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) extern void ia64_process_pending_intr(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) extern volatile int time_keeper_id;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /* Mask ITV to disable timer */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135) ia64_set_itv(1 << 16);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) * Find a new timesync master
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) if (smp_processor_id() == time_keeper_id) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) time_keeper_id = cpumask_first(cpu_online_mask);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) printk ("CPU %d is now promoted to time-keeper master\n", time_keeper_id);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) * Phase 1: Locate IRQs bound to this cpu and
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) * relocate them for cpu removal.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) migrate_irqs();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) * Phase 2: Perform interrupt processing for all entries reported in
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) * local APIC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) ia64_process_pending_intr();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) * Phase 3: Now handle any interrupts not captured in local APIC.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) * This is to account for cases that device interrupted during the time the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) * rte was being disabled and re-programmed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) for (irq=0; irq < NR_IRQS; irq++) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) if (vectors_in_migration[irq]) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) struct pt_regs *old_regs = set_irq_regs(NULL);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) vectors_in_migration[irq]=0;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) generic_handle_irq(irq);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) set_irq_regs(old_regs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) * Now let processor die. We do irq disable and max_xtp() to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) * ensure there is no more interrupts routed to this processor.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) * But the local timer interrupt can have 1 pending which we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) * take care in timer_interrupt().
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) max_xtp();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) local_irq_disable();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #endif
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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