Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0-only */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * ESI call stub.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (C) 2005 Hewlett-Packard Co
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  *	Alex Williamson <alex.williamson@hp.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * Based on EFI call stub by David Mosberger.  The stub is virtually
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * identical to the one for EFI phys-mode calls, except that ESI
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  * calls may have up to 8 arguments, so they get passed to this routine
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  * through memory.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  * This stub allows us to make ESI calls in physical mode with interrupts
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)  * turned off.  ESI calls may not support calling from virtual mode.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)  * Google for "Extensible SAL specification" for a document describing the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17)  * ESI standard.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)  * PSR settings as per SAL spec (Chapter 8 in the "IA-64 System
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)  * Abstraction Layer Specification", revision 2.6e).  Note that
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)  * psr.dfl and psr.dfh MUST be cleared, despite what this manual says.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)  * Otherwise, SAL dies whenever it's trying to do an IA-32 BIOS call
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)  * (the br.ia instruction fails unless psr.dfl and psr.dfh are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)  * cleared).  Fortunately, SAL promises not to touch the floating
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)  * point regs, so at least we don't have to save f2-f127.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) #define PSR_BITS_TO_CLEAR						\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	(IA64_PSR_I | IA64_PSR_IT | IA64_PSR_DT | IA64_PSR_RT |		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 	 IA64_PSR_DD | IA64_PSR_SS | IA64_PSR_RI | IA64_PSR_ED |	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 	 IA64_PSR_DFL | IA64_PSR_DFH)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) #define PSR_BITS_TO_SET							\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	(IA64_PSR_BN)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) #include <asm/processor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) #include <asm/asmmacro.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) #include <asm/export.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)  * Inputs:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)  *	in0 = address of function descriptor of ESI routine to call
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)  *	in1 = address of array of ESI parameters
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)  * Outputs:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)  *	r8 = result returned by called function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) GLOBAL_ENTRY(esi_call_phys)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	.prologue ASM_UNW_PRLG_RP|ASM_UNW_PRLG_PFS, ASM_UNW_PRLG_GRSAVE(2)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) 	alloc loc1=ar.pfs,2,7,8,0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 	ld8 r2=[in0],8			// load ESI function's entry point
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) 	mov loc0=rp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) 	.body
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) 	;;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	ld8 out0=[in1],8		// ESI params loaded from array
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	;;				// passing all as inputs doesn't work
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	ld8 out1=[in1],8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	;;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 	ld8 out2=[in1],8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) 	;;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 	ld8 out3=[in1],8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	;;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 	ld8 out4=[in1],8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	;;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 	ld8 out5=[in1],8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 	;;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 	ld8 out6=[in1],8
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 	;;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	ld8 out7=[in1]
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 	mov loc2=gp			// save global pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) 	mov loc4=ar.rsc			// save RSE configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 	mov ar.rsc=0			// put RSE in enforced lazy, LE mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) 	;;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 	ld8 gp=[in0]			// load ESI function's global pointer
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) 	movl r16=PSR_BITS_TO_CLEAR
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 	mov loc3=psr			// save processor status word
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) 	movl r17=PSR_BITS_TO_SET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) 	;;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) 	or loc3=loc3,r17
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 	mov b6=r2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) 	;;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) 	andcm r16=loc3,r16	// get psr with IT, DT, and RT bits cleared
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) 	br.call.sptk.many rp=ia64_switch_mode_phys
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) .ret0:	mov loc5=r19			// old ar.bsp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) 	mov loc6=r20			// old sp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) 	br.call.sptk.many rp=b6		// call the ESI function
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) .ret1:	mov ar.rsc=0			// put RSE in enforced lazy, LE mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) 	mov r16=loc3			// save virtual mode psr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) 	mov r19=loc5			// save virtual mode bspstore
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) 	mov r20=loc6			// save virtual mode sp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) 	br.call.sptk.many rp=ia64_switch_mode_virt // return to virtual mode
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) .ret2:	mov ar.rsc=loc4			// restore RSE configuration
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) 	mov ar.pfs=loc1
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) 	mov rp=loc0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) 	mov gp=loc2
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) 	br.ret.sptk.many rp
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) END(esi_call_phys)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) EXPORT_SYMBOL_GPL(esi_call_phys)