Orange Pi5 kernel

Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards

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^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #ifndef _ASM_IA64_TIMEX_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #define _ASM_IA64_TIMEX_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Copyright (C) 1998-2001, 2003 Hewlett-Packard Co
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *	David Mosberger-Tang <davidm@hpl.hp.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  * 2001/01/18 davidm	Removed CLOCK_TICK_RATE.  It makes no sense on IA-64.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  *			Also removed cacheflush_time as it's entirely unused.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <asm/intrinsics.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/processor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) typedef unsigned long cycles_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) extern void (*ia64_udelay)(unsigned long usecs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)  * For performance reasons, we don't want to define CLOCK_TICK_TRATE as
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)  * local_cpu_data->itc_rate.  Fortunately, we don't have to, either: according to George
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)  * Anzinger, 1/CLOCK_TICK_RATE is taken as the resolution of the timer clock.  The time
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25)  * calculation assumes that you will use enough of these so that your tick size <= 1/HZ.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)  * If the calculation shows that your CLOCK_TICK_RATE can not supply exactly 1/HZ ticks,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27)  * the actual value is calculated and used to update the wall clock each jiffie.  Setting
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28)  * the CLOCK_TICK_RATE to x*HZ insures that the calculation will find no errors.  Hence we
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29)  * pick a multiple of HZ which gives us a (totally virtual) CLOCK_TICK_RATE of about
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30)  * 100MHz.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) #define CLOCK_TICK_RATE		(HZ * 100000UL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) static inline cycles_t
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) get_cycles (void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	cycles_t ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	ret = ia64_getreg(_IA64_REG_AR_ITC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	return ret;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) extern void ia64_cpu_local_tick (void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) extern unsigned long long ia64_native_sched_clock (void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #endif /* _ASM_IA64_TIMEX_H */