Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2)  * This file is subject to the terms and conditions of the GNU General Public
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * License.  See the file "COPYING" in the main directory of this archive
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  * for more details.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * This file contains NUMA specific prototypes and definitions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * 2002/08/05 Erich Focht <efocht@ess.nec.de>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11) #ifndef _ASM_IA64_NUMA_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #define _ASM_IA64_NUMA_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #ifdef CONFIG_NUMA
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/cache.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/cpumask.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) #include <linux/numa.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <linux/smp.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <linux/threads.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm/mmzone.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) extern u16 cpu_to_node_map[NR_CPUS] __cacheline_aligned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) extern cpumask_t node_to_cpu_mask[MAX_NUMNODES] __cacheline_aligned;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) extern pg_data_t *pgdat_list[MAX_NUMNODES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) /* Stuff below this line could be architecture independent */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) extern int num_node_memblks;		/* total number of memory chunks */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34)  * List of node memory chunks. Filled when parsing SRAT table to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)  * obtain information about memory nodes.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) struct node_memblk_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	unsigned long start_paddr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) 	unsigned long size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 	int nid;		/* which logical node contains this chunk? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) 	int bank;		/* which mem bank on this node */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) struct node_cpuid_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 	u16	phys_id;	/* id << 8 | eid */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) 	int	nid;		/* logical node containing this CPU */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) extern struct node_memblk_s node_memblk[NR_NODE_MEMBLKS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) extern struct node_cpuid_s node_cpuid[NR_CPUS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)  * ACPI 2.0 SLIT (System Locality Information Table)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)  * http://devresource.hp.com/devresource/Docs/TechPapers/IA64/slit.pdf
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57)  * This is a matrix with "distances" between nodes, they should be
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58)  * proportional to the memory access latency ratios.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) extern u8 numa_slit[MAX_NUMNODES * MAX_NUMNODES];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) #define slit_distance(from,to) (numa_slit[(from) * MAX_NUMNODES + (to)])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) extern int __node_distance(int from, int to);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) #define node_distance(from,to) __node_distance(from, to)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) extern int paddr_to_nid(unsigned long paddr);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) #define local_nodeid (cpu_to_node_map[smp_processor_id()])
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) #define numa_off     0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) extern void map_cpu_to_node(int cpu, int nid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) extern void unmap_cpu_from_node(int cpu, int nid);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) extern void numa_clear_node(int cpu);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) #else /* !CONFIG_NUMA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) #define map_cpu_to_node(cpu, nid)	do{}while(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) #define unmap_cpu_from_node(cpu, nid)	do{}while(0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) #define paddr_to_nid(addr)	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) #define numa_clear_node(cpu)	do { } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) #endif /* CONFIG_NUMA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) #endif /* _ASM_IA64_NUMA_H */