Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #ifndef _ASM_IA64_MMIOWB_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) #define _ASM_IA64_MMIOWB_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6) /**
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  * mmiowb - I/O write barrier
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * Ensure ordering of I/O space writes.  This will make sure that writes
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  * following the barrier will arrive after all previous writes.  For most
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  * ia64 platforms, this is a simple 'mf.a' instruction.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define mmiowb()	ia64_mfa()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm-generic/mmiowb.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #endif	/* _ASM_IA64_MMIOWB_H */