^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 3) * File: mca.h
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 4) * Purpose: Machine check handling specific defines
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 5) *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 6) * Copyright (C) 1999, 2004 Silicon Graphics, Inc.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 7) * Copyright (C) Vijay Chander <vijay@engr.sgi.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 8) * Copyright (C) Srinivasa Thirumalachar <sprasad@engr.sgi.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 9) * Copyright (C) Russ Anderson <rja@sgi.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12) #ifndef _ASM_IA64_MCA_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #define _ASM_IA64_MCA_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #if !defined(__ASSEMBLY__)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/interrupt.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/types.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/param.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/sal.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) #include <asm/processor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) #include <asm/mca_asm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) #define IA64_MCA_RENDEZ_TIMEOUT (20 * 1000) /* value in milliseconds - 20 seconds */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) typedef struct ia64_fptr {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) unsigned long fp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) unsigned long gp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) } ia64_fptr_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) typedef union cmcv_reg_u {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) u64 cmcv_regval;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) struct {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) u64 cmcr_vector : 8;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) u64 cmcr_reserved1 : 4;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) u64 cmcr_ignored1 : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) u64 cmcr_reserved2 : 3;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) u64 cmcr_mask : 1;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) u64 cmcr_ignored2 : 47;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) } cmcv_reg_s;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) } cmcv_reg_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) #define cmcv_mask cmcv_reg_s.cmcr_mask
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) #define cmcv_vector cmcv_reg_s.cmcr_vector
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) IA64_MCA_RENDEZ_CHECKIN_NOTDONE = 0x0,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) IA64_MCA_RENDEZ_CHECKIN_DONE = 0x1,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) IA64_MCA_RENDEZ_CHECKIN_INIT = 0x2,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) IA64_MCA_RENDEZ_CHECKIN_CONCURRENT_MCA = 0x3,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) /* Information maintained by the MC infrastructure */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) typedef struct ia64_mc_info_s {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) u64 imi_mca_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) size_t imi_mca_handler_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) u64 imi_monarch_init_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) size_t imi_monarch_init_handler_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) u64 imi_slave_init_handler;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) size_t imi_slave_init_handler_size;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) u8 imi_rendez_checkin[NR_CPUS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) } ia64_mc_info_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) /* Handover state from SAL to OS and vice versa, for both MCA and INIT events.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) * Besides the handover state, it also contains some saved registers from the
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) * time of the event.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) * Note: mca_asm.S depends on the precise layout of this structure.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) struct ia64_sal_os_state {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) /* SAL to OS */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) unsigned long os_gp; /* GP of the os registered with the SAL, physical */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) unsigned long pal_proc; /* PAL_PROC entry point, physical */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) unsigned long sal_proc; /* SAL_PROC entry point, physical */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) unsigned long rv_rc; /* MCA - Rendezvous state, INIT - reason code */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) unsigned long proc_state_param; /* from R18 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) unsigned long monarch; /* 1 for a monarch event, 0 for a slave */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) /* common */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) unsigned long sal_ra; /* Return address in SAL, physical */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) unsigned long sal_gp; /* GP of the SAL - physical */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) pal_min_state_area_t *pal_min_state; /* from R17. physical in asm, virtual in C */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) /* Previous values of IA64_KR(CURRENT) and IA64_KR(CURRENT_STACK).
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) * Note: if the MCA/INIT recovery code wants to resume to a new context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) * then it must change these values to reflect the new kernel stack.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 90) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 91) unsigned long prev_IA64_KR_CURRENT; /* previous value of IA64_KR(CURRENT) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 92) unsigned long prev_IA64_KR_CURRENT_STACK;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 93) struct task_struct *prev_task; /* previous task, NULL if it is not useful */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 94) /* Some interrupt registers are not saved in minstate, pt_regs or
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 95) * switch_stack. Because MCA/INIT can occur when interrupts are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 96) * disabled, we need to save the additional interrupt registers over
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 97) * MCA/INIT and resume.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 98) */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 99) unsigned long isr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) unsigned long ifa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) unsigned long itir;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) unsigned long iipa;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) unsigned long iim;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) unsigned long iha;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) /* OS to SAL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) unsigned long os_status; /* OS status to SAL, enum below */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) unsigned long context; /* 0 if return to same context
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) 1 if return to new context */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) /* I-resources */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) unsigned long iip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) unsigned long ipsr;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) unsigned long ifs;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) IA64_MCA_CORRECTED = 0x0, /* Error has been corrected by OS_MCA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) IA64_MCA_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) IA64_MCA_COLD_BOOT = -2, /* Cold boot of the system need from SAL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) IA64_MCA_HALT = -3 /* System to be halted by SAL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) IA64_INIT_RESUME = 0x0, /* Resume after return from INIT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) IA64_INIT_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) enum {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) IA64_MCA_SAME_CONTEXT = 0x0, /* SAL to return to same context */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) IA64_MCA_NEW_CONTEXT = -1 /* SAL to return to new context */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /* Per-CPU MCA state that is too big for normal per-CPU variables. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136) struct ia64_mca_cpu {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137) u64 mca_stack[KERNEL_STACK_SIZE/8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138) u64 init_stack[KERNEL_STACK_SIZE/8];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) /* Array of physical addresses of each CPU's MCA area. */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) extern unsigned long __per_cpu_mca[NR_CPUS];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) extern int cpe_vector;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) extern int ia64_cpe_irq;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146) extern void ia64_mca_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147) extern void ia64_mca_irq_init(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148) extern void ia64_mca_cpu_init(void *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149) extern void ia64_os_mca_dispatch(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150) extern void ia64_os_mca_dispatch_end(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151) extern void ia64_mca_ucmc_handler(struct pt_regs *, struct ia64_sal_os_state *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152) extern void ia64_init_handler(struct pt_regs *,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153) struct switch_stack *,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154) struct ia64_sal_os_state *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) extern void ia64_os_init_on_kdump(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) extern void ia64_monarch_init_handler(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) extern void ia64_slave_init_handler(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) extern void ia64_mca_cmc_vector_setup(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) extern int ia64_reg_MCA_extension(int (*fn)(void *, struct ia64_sal_os_state *));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) extern void ia64_unreg_MCA_extension(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) extern unsigned long ia64_get_rnat(unsigned long *);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) extern void ia64_set_psr_mc(void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) extern void ia64_mca_printk(const char * fmt, ...)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) __attribute__ ((format (printf, 1, 2)));
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) struct ia64_mca_notify_die {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) struct ia64_sal_os_state *sos;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) int *monarch_cpu;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) int *data;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) DECLARE_PER_CPU(u64, ia64_mca_pal_base);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #else /* __ASSEMBLY__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #define IA64_MCA_CORRECTED 0x0 /* Error has been corrected by OS_MCA */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define IA64_MCA_WARM_BOOT -1 /* Warm boot of the system need from SAL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #define IA64_MCA_COLD_BOOT -2 /* Cold boot of the system need from SAL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #define IA64_MCA_HALT -3 /* System to be halted by SAL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) #define IA64_INIT_RESUME 0x0 /* Resume after return from INIT */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) #define IA64_INIT_WARM_BOOT -1 /* Warm boot of the system need from SAL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) #define IA64_MCA_SAME_CONTEXT 0x0 /* SAL to return to same context */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) #define IA64_MCA_NEW_CONTEXT -1 /* SAL to return to new context */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) #endif /* !__ASSEMBLY__ */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) #endif /* _ASM_IA64_MCA_H */
Orange Pi5 kernel
Deprecated Linux kernel 5.10.110 for OrangePi 5/5B/5+ boards
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