Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   2) #ifndef _ASM_IA64_ELF_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   3) #define _ASM_IA64_ELF_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   5) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   6)  * ELF-specific definitions.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   8)  * Copyright (C) 1998-1999, 2002-2004 Hewlett-Packard Co
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300   9)  *	David Mosberger-Tang <davidm@hpl.hp.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  10)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  11) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  12) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  13) #include <asm/fpu.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  14) #include <asm/page.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  15) #include <asm/auxvec.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  16) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  17) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  18)  * This is used to ensure we don't load something for the wrong architecture.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  19)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  20) #define elf_check_arch(x) ((x)->e_machine == EM_IA_64)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  21) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  22) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  23)  * These are used to set parameters in the core dumps.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  24)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  25) #define ELF_CLASS	ELFCLASS64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  26) #define ELF_DATA	ELFDATA2LSB
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  27) #define ELF_ARCH	EM_IA_64
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  28) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  29) #define CORE_DUMP_USE_REGSET
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  30) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  31) /* Least-significant four bits of ELF header's e_flags are OS-specific.  The bits are
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  32)    interpreted as follows by Linux: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  33) #define EF_IA_64_LINUX_EXECUTABLE_STACK	0x1	/* is stack (& heap) executable by default? */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  35) #define ELF_EXEC_PAGESIZE	PAGE_SIZE
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  36) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  37) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  38)  * This is the location that an ET_DYN program is loaded if exec'ed.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  39)  * Typical use of this is to invoke "./ld.so someprog" to test out a
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  40)  * new version of the loader.  We need to make sure that it is out of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  41)  * the way of the program that it will "exec", and that there is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  42)  * sufficient room for the brk.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  43)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  44) #define ELF_ET_DYN_BASE		(TASK_UNMAPPED_BASE + 0x800000000UL)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  45) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  46) #define PT_IA_64_UNWIND		0x70000001
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  47) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  48) /* IA-64 relocations: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  49) #define R_IA64_NONE		0x00	/* none */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  50) #define R_IA64_IMM14		0x21	/* symbol + addend, add imm14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  51) #define R_IA64_IMM22		0x22	/* symbol + addend, add imm22 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  52) #define R_IA64_IMM64		0x23	/* symbol + addend, mov imm64 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  53) #define R_IA64_DIR32MSB		0x24	/* symbol + addend, data4 MSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  54) #define R_IA64_DIR32LSB		0x25	/* symbol + addend, data4 LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  55) #define R_IA64_DIR64MSB		0x26	/* symbol + addend, data8 MSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  56) #define R_IA64_DIR64LSB		0x27	/* symbol + addend, data8 LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  57) #define R_IA64_GPREL22		0x2a	/* @gprel(sym+add), add imm22 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  58) #define R_IA64_GPREL64I		0x2b	/* @gprel(sym+add), mov imm64 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  59) #define R_IA64_GPREL32MSB	0x2c	/* @gprel(sym+add), data4 MSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  60) #define R_IA64_GPREL32LSB	0x2d	/* @gprel(sym+add), data4 LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  61) #define R_IA64_GPREL64MSB	0x2e	/* @gprel(sym+add), data8 MSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  62) #define R_IA64_GPREL64LSB	0x2f	/* @gprel(sym+add), data8 LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  63) #define R_IA64_LTOFF22		0x32	/* @ltoff(sym+add), add imm22 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  64) #define R_IA64_LTOFF64I		0x33	/* @ltoff(sym+add), mov imm64 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  65) #define R_IA64_PLTOFF22		0x3a	/* @pltoff(sym+add), add imm22 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  66) #define R_IA64_PLTOFF64I	0x3b	/* @pltoff(sym+add), mov imm64 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  67) #define R_IA64_PLTOFF64MSB	0x3e	/* @pltoff(sym+add), data8 MSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  68) #define R_IA64_PLTOFF64LSB	0x3f	/* @pltoff(sym+add), data8 LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  69) #define R_IA64_FPTR64I		0x43	/* @fptr(sym+add), mov imm64 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  70) #define R_IA64_FPTR32MSB	0x44	/* @fptr(sym+add), data4 MSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  71) #define R_IA64_FPTR32LSB	0x45	/* @fptr(sym+add), data4 LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  72) #define R_IA64_FPTR64MSB	0x46	/* @fptr(sym+add), data8 MSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  73) #define R_IA64_FPTR64LSB	0x47	/* @fptr(sym+add), data8 LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  74) #define R_IA64_PCREL60B		0x48	/* @pcrel(sym+add), brl */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  75) #define R_IA64_PCREL21B		0x49	/* @pcrel(sym+add), ptb, call */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  76) #define R_IA64_PCREL21M		0x4a	/* @pcrel(sym+add), chk.s */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  77) #define R_IA64_PCREL21F		0x4b	/* @pcrel(sym+add), fchkf */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  78) #define R_IA64_PCREL32MSB	0x4c	/* @pcrel(sym+add), data4 MSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  79) #define R_IA64_PCREL32LSB	0x4d	/* @pcrel(sym+add), data4 LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  80) #define R_IA64_PCREL64MSB	0x4e	/* @pcrel(sym+add), data8 MSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  81) #define R_IA64_PCREL64LSB	0x4f	/* @pcrel(sym+add), data8 LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  82) #define R_IA64_LTOFF_FPTR22	0x52	/* @ltoff(@fptr(s+a)), imm22 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  83) #define R_IA64_LTOFF_FPTR64I	0x53	/* @ltoff(@fptr(s+a)), imm64 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  84) #define R_IA64_LTOFF_FPTR32MSB	0x54	/* @ltoff(@fptr(s+a)), 4 MSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  85) #define R_IA64_LTOFF_FPTR32LSB	0x55	/* @ltoff(@fptr(s+a)), 4 LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  86) #define R_IA64_LTOFF_FPTR64MSB	0x56	/* @ltoff(@fptr(s+a)), 8 MSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  87) #define R_IA64_LTOFF_FPTR64LSB	0x57	/* @ltoff(@fptr(s+a)), 8 LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  88) #define R_IA64_SEGREL32MSB	0x5c	/* @segrel(sym+add), data4 MSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  89) #define R_IA64_SEGREL32LSB	0x5d	/* @segrel(sym+add), data4 LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  90) #define R_IA64_SEGREL64MSB	0x5e	/* @segrel(sym+add), data8 MSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  91) #define R_IA64_SEGREL64LSB	0x5f	/* @segrel(sym+add), data8 LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  92) #define R_IA64_SECREL32MSB	0x64	/* @secrel(sym+add), data4 MSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  93) #define R_IA64_SECREL32LSB	0x65	/* @secrel(sym+add), data4 LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  94) #define R_IA64_SECREL64MSB	0x66	/* @secrel(sym+add), data8 MSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  95) #define R_IA64_SECREL64LSB	0x67	/* @secrel(sym+add), data8 LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  96) #define R_IA64_REL32MSB		0x6c	/* data 4 + REL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  97) #define R_IA64_REL32LSB		0x6d	/* data 4 + REL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  98) #define R_IA64_REL64MSB		0x6e	/* data 8 + REL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  99) #define R_IA64_REL64LSB		0x6f	/* data 8 + REL */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 100) #define R_IA64_LTV32MSB		0x74	/* symbol + addend, data4 MSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 101) #define R_IA64_LTV32LSB		0x75	/* symbol + addend, data4 LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 102) #define R_IA64_LTV64MSB		0x76	/* symbol + addend, data8 MSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 103) #define R_IA64_LTV64LSB		0x77	/* symbol + addend, data8 LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 104) #define R_IA64_PCREL21BI	0x79	/* @pcrel(sym+add), ptb, call */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 105) #define R_IA64_PCREL22		0x7a	/* @pcrel(sym+add), imm22 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 106) #define R_IA64_PCREL64I		0x7b	/* @pcrel(sym+add), imm64 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 107) #define R_IA64_IPLTMSB		0x80	/* dynamic reloc, imported PLT, MSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 108) #define R_IA64_IPLTLSB		0x81	/* dynamic reloc, imported PLT, LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 109) #define R_IA64_COPY		0x84	/* dynamic reloc, data copy */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 110) #define R_IA64_SUB		0x85	/* -symbol + addend, add imm22 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 111) #define R_IA64_LTOFF22X		0x86	/* LTOFF22, relaxable.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 112) #define R_IA64_LDXMOV		0x87	/* Use of LTOFF22X.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 113) #define R_IA64_TPREL14		0x91	/* @tprel(sym+add), add imm14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 114) #define R_IA64_TPREL22		0x92	/* @tprel(sym+add), add imm22 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 115) #define R_IA64_TPREL64I		0x93	/* @tprel(sym+add), add imm64 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 116) #define R_IA64_TPREL64MSB	0x96	/* @tprel(sym+add), data8 MSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 117) #define R_IA64_TPREL64LSB	0x97	/* @tprel(sym+add), data8 LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 118) #define R_IA64_LTOFF_TPREL22	0x9a	/* @ltoff(@tprel(s+a)), add imm22 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 119) #define R_IA64_DTPMOD64MSB	0xa6	/* @dtpmod(sym+add), data8 MSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 120) #define R_IA64_DTPMOD64LSB	0xa7	/* @dtpmod(sym+add), data8 LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 121) #define R_IA64_LTOFF_DTPMOD22	0xaa	/* @ltoff(@dtpmod(s+a)), imm22 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 122) #define R_IA64_DTPREL14		0xb1	/* @dtprel(sym+add), imm14 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 123) #define R_IA64_DTPREL22		0xb2	/* @dtprel(sym+add), imm22 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 124) #define R_IA64_DTPREL64I	0xb3	/* @dtprel(sym+add), imm64 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 125) #define R_IA64_DTPREL32MSB	0xb4	/* @dtprel(sym+add), data4 MSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 126) #define R_IA64_DTPREL32LSB	0xb5	/* @dtprel(sym+add), data4 LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 127) #define R_IA64_DTPREL64MSB	0xb6	/* @dtprel(sym+add), data8 MSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 128) #define R_IA64_DTPREL64LSB	0xb7	/* @dtprel(sym+add), data8 LSB */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 129) #define R_IA64_LTOFF_DTPREL22	0xba	/* @ltoff(@dtprel(s+a)), imm22 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 130) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 131) /* IA-64 specific section flags: */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 132) #define SHF_IA_64_SHORT		0x10000000	/* section near gp */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 133) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 134) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 135)  * We use (abuse?) this macro to insert the (empty) vm_area that is
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 136)  * used to map the register backing store.  I don't see any better
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 137)  * place to do this, but we should discuss this with Linus once we can
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 138)  * talk to him...
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 139)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 140) extern void ia64_init_addr_space (void);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 141) #define ELF_PLAT_INIT(_r, load_addr)	ia64_init_addr_space()
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 142) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 143) /* ELF register definitions.  This is needed for core dump support.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 144) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 145) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 146)  * elf_gregset_t contains the application-level state in the following order:
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 147)  *	r0-r31
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 148)  *	NaT bits (for r0-r31; bit N == 1 iff rN is a NaT)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 149)  *	predicate registers (p0-p63)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 150)  *	b0-b7
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 151)  *	ip cfm psr
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 152)  *	ar.rsc ar.bsp ar.bspstore ar.rnat
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 153)  *	ar.ccv ar.unat ar.fpsr ar.pfs ar.lc ar.ec ar.csd ar.ssd
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 154)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 155) #define ELF_NGREG	128	/* we really need just 72 but let's leave some headroom... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 156) #define ELF_NFPREG	128	/* f0 and f1 could be omitted, but so what... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 157) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 158) /* elf_gregset_t register offsets */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 159) #define ELF_GR_0_OFFSET     0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 160) #define ELF_NAT_OFFSET     (32 * sizeof(elf_greg_t))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 161) #define ELF_PR_OFFSET      (33 * sizeof(elf_greg_t))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 162) #define ELF_BR_0_OFFSET    (34 * sizeof(elf_greg_t))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 163) #define ELF_CR_IIP_OFFSET  (42 * sizeof(elf_greg_t))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 164) #define ELF_CFM_OFFSET     (43 * sizeof(elf_greg_t))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 165) #define ELF_CR_IPSR_OFFSET (44 * sizeof(elf_greg_t))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 166) #define ELF_GR_OFFSET(i)   (ELF_GR_0_OFFSET + i * sizeof(elf_greg_t))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 167) #define ELF_BR_OFFSET(i)   (ELF_BR_0_OFFSET + i * sizeof(elf_greg_t))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 168) #define ELF_AR_RSC_OFFSET  (45 * sizeof(elf_greg_t))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 169) #define ELF_AR_BSP_OFFSET  (46 * sizeof(elf_greg_t))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 170) #define ELF_AR_BSPSTORE_OFFSET (47 * sizeof(elf_greg_t))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 171) #define ELF_AR_RNAT_OFFSET (48 * sizeof(elf_greg_t))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 172) #define ELF_AR_CCV_OFFSET  (49 * sizeof(elf_greg_t))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 173) #define ELF_AR_UNAT_OFFSET (50 * sizeof(elf_greg_t))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 174) #define ELF_AR_FPSR_OFFSET (51 * sizeof(elf_greg_t))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 175) #define ELF_AR_PFS_OFFSET  (52 * sizeof(elf_greg_t))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 176) #define ELF_AR_LC_OFFSET   (53 * sizeof(elf_greg_t))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 177) #define ELF_AR_EC_OFFSET   (54 * sizeof(elf_greg_t))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 178) #define ELF_AR_CSD_OFFSET  (55 * sizeof(elf_greg_t))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 179) #define ELF_AR_SSD_OFFSET  (56 * sizeof(elf_greg_t))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 180) #define ELF_AR_END_OFFSET  (57 * sizeof(elf_greg_t))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 181) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 182) typedef unsigned long elf_greg_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 183) typedef elf_greg_t elf_gregset_t[ELF_NGREG];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 184) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 185) typedef struct ia64_fpreg elf_fpreg_t;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 186) typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG];
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 187) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 188) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 189) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 190) struct pt_regs;	/* forward declaration... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 191) extern void ia64_elf_core_copy_regs (struct pt_regs *src, elf_gregset_t dst);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 192) #define ELF_CORE_COPY_REGS(_dest,_regs)	ia64_elf_core_copy_regs(_regs, _dest);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 193) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 194) /* This macro yields a bitmask that programs can use to figure out
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 195)    what instruction set this CPU supports.  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 196) #define ELF_HWCAP 	0
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 197) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 198) /* This macro yields a string that ld.so will use to load
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 199)    implementation specific libraries for optimization.  Not terribly
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 200)    relevant until we have real hardware to play with... */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 201) #define ELF_PLATFORM	NULL
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 202) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 203) #define elf_read_implies_exec(ex, executable_stack)					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 204) 	((executable_stack!=EXSTACK_DISABLE_X) && ((ex).e_flags & EF_IA_64_LINUX_EXECUTABLE_STACK) != 0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 205) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 206) struct task_struct;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 207) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 208) #define GATE_EHDR	((const struct elfhdr *) GATE_ADDR)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 209) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 210) /* update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 211) #define ARCH_DLINFO								\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 212) do {										\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 213) 	extern char __kernel_syscall_via_epc[];					\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 214) 	NEW_AUX_ENT(AT_SYSINFO, (unsigned long) __kernel_syscall_via_epc);	\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 215) 	NEW_AUX_ENT(AT_SYSINFO_EHDR, (unsigned long) GATE_EHDR);		\
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 216) } while (0)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 217) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 218) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 219)  * format for entries in the Global Offset Table
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 220)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 221) struct got_entry {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 222) 	uint64_t val;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 223) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 224) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 225) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 226)  * Layout of the Function Descriptor
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 227)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 228) struct fdesc {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 229) 	uint64_t ip;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 230) 	uint64_t gp;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 231) };
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 232) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 233) #endif /* _ASM_IA64_ELF_H */