Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) /* SPDX-License-Identifier: GPL-2.0 */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) #ifndef _ASM_IA64_DELAY_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3) #define _ASM_IA64_DELAY_H
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  * Delay routines using a pre-computed "cycles/usec" value.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8)  * Copyright (C) 1998, 1999 Hewlett-Packard Co
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  *	David Mosberger-Tang <davidm@hpl.hp.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  * Copyright (C) 1999 VA Linux Systems
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  * Copyright (C) 1999 Walt Drummond <drummond@valinux.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  * Copyright (C) 1999 Asit Mallick <asit.k.mallick@intel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13)  * Copyright (C) 1999 Don Dugger <don.dugger@intel.com>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <linux/kernel.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) #include <linux/compiler.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20) #include <asm/intrinsics.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21) #include <asm/processor.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23) static __inline__ void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24) ia64_set_itm (unsigned long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 	ia64_setreg(_IA64_REG_CR_ITM, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) 	ia64_srlz_d();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) static __inline__ unsigned long
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) ia64_get_itm (void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 	unsigned long result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35) 	result = ia64_getreg(_IA64_REG_CR_ITM);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36) 	ia64_srlz_d();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) 	return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) static __inline__ void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) ia64_set_itv (unsigned long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43) 	ia64_setreg(_IA64_REG_CR_ITV, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44) 	ia64_srlz_d();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) static __inline__ unsigned long
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) ia64_get_itv (void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	return ia64_getreg(_IA64_REG_CR_ITV);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) static __inline__ void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54) ia64_set_itc (unsigned long val)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) 	ia64_setreg(_IA64_REG_AR_ITC, val);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) 	ia64_srlz_d();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) static __inline__ unsigned long
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) ia64_get_itc (void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) 	unsigned long result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65) 	result = ia64_getreg(_IA64_REG_AR_ITC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) 	ia64_barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) #ifdef CONFIG_ITANIUM
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 	while (unlikely((__s32) result == -1)) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 		result = ia64_getreg(_IA64_REG_AR_ITC);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 		ia64_barrier();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 	}
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) #endif
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 	return result;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76) extern void ia64_delay_loop (unsigned long loops);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) static __inline__ void
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) __delay (unsigned long loops)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) 	if (unlikely(loops < 1))
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 82) 		return;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 83) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 84) 	ia64_delay_loop (loops - 1);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 85) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 86) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 87) extern void udelay (unsigned long usecs);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 88) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 89) #endif /* _ASM_IA64_DELAY_H */