Orange Pi5 kernel

^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  1) // SPDX-License-Identifier: GPL-2.0-only
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  2) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  3)  * Hexagon Virtual Machine TLB functions
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  4)  *
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  5)  * Copyright (c) 2010-2011, The Linux Foundation. All rights reserved.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  6)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  7) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  8) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300  9)  * The Hexagon Virtual Machine conceals the real workings of
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 10)  * the TLB, but there are one or two functions that need to
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 11)  * be instantiated for it, differently from a native build.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 12)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 13) #include <linux/mm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 14) #include <linux/sched.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 15) #include <asm/page.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 16) #include <asm/hexagon_vm.h>
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 17) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 18) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 19)  * Initial VM implementation has only one map active at a time, with
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 20)  * TLB purgings on changes.  So either we're nuking the current map,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 21)  * or it's a no-op.  This operation is messy on true SMPs where other
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 22)  * processors must be induced to flush the copies in their local TLBs,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 23)  * but Hexagon thread-based virtual processors share the same MMU.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 24)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 25) void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 26) 			unsigned long end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 27) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 28) 	struct mm_struct *mm = vma->vm_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 29) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 30) 	if (mm->context.ptbase == current->active_mm->context.ptbase)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 31) 		__vmclrmap((void *)start, end - start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 32) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 33) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 34) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 35)  * Flush a page from the kernel virtual map - used by highmem
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 36)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 37) void flush_tlb_one(unsigned long vaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 38) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 39) 	__vmclrmap((void *)vaddr, PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 40) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 41) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 42) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 43)  * Flush all TLBs across all CPUs, virtual or real.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 44)  * A single Hexagon core has 6 thread contexts but
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 45)  * only one TLB.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 46)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 47) void tlb_flush_all(void)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 48) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 49) 	/*  should probably use that fixaddr end or whateve label  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 50) 	__vmclrmap(0, 0xffff0000);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 51) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 52) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 53) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 54)  * Flush TLB entries associated with a given mm_struct mapping.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 55)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 56) void flush_tlb_mm(struct mm_struct *mm)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 57) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 58) 	/* Current Virtual Machine has only one map active at a time */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 59) 	if (current->active_mm->context.ptbase == mm->context.ptbase)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 60) 		tlb_flush_all();
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 61) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 62) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 63) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 64)  * Flush TLB state associated with a page of a vma.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 65)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 66) void flush_tlb_page(struct vm_area_struct *vma, unsigned long vaddr)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 67) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 68) 	struct mm_struct *mm = vma->vm_mm;
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 69) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 70) 	if (mm->context.ptbase  == current->active_mm->context.ptbase)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 71) 		__vmclrmap((void *)vaddr, PAGE_SIZE);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 72) }
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 73) 
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 74) /*
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 75)  * Flush TLB entries associated with a kernel address range.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 76)  * Like flush range, but without the check on the vma->vm_mm.
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 77)  */
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 78) void flush_tlb_kernel_range(unsigned long start, unsigned long end)
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 79) {
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 80) 		__vmclrmap((void *)start, end - start);
^8f3ce5b39 (kx 2023-10-28 12:00:06 +0300 81) }